Remove X86_IPI_WRITE_MSR (and msr_ipifuncs.c), replace all uses in drivers
with xc_broadcast(). AMD K8 PowerNow driver tested by <jakllsch>, thanks! Closes PR/37665.
This commit is contained in:
rmind
parent
c9a5a18df3
commit
b619d660f4
@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.132 2009/08/18 16:41:02 jmcneill Exp $ */
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/* $NetBSD: machdep.c,v 1.133 2009/10/05 23:59:30 rmind Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008
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@ -112,7 +112,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.132 2009/08/18 16:41:02 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.133 2009/10/05 23:59:30 rmind Exp $");
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/* #define XENDEBUG_LOW */
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@ -180,7 +180,6 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.132 2009/08/18 16:41:02 jmcneill Exp $
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#include <machine/mpbiosvar.h>
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#include <x86/cputypes.h>
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#include <x86/cpu_msr.h>
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#include <x86/cpuvar.h>
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#include <x86/machdep.h>
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@ -1535,8 +1534,6 @@ init_x86_64(paddr_t first_avail)
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splraise(IPL_HIGH);
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x86_enable_intr();
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x86_init();
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#ifdef DDB
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if (boothowto & RB_KDB)
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Debugger();
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.671 2009/08/18 16:41:02 jmcneill Exp $ */
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/* $NetBSD: machdep.c,v 1.672 2009/10/05 23:59:30 rmind Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006, 2008, 2009
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@ -67,7 +67,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.671 2009/08/18 16:41:02 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.672 2009/10/05 23:59:30 rmind Exp $");
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#include "opt_beep.h"
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#include "opt_compat_ibcs2.h"
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@ -131,8 +131,6 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.671 2009/08/18 16:41:02 jmcneill Exp $
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#include <sys/sysctl.h>
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#include <x86/cpu_msr.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/cpuvar.h>
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@ -516,8 +514,6 @@ cpu_startup(void)
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cpu_init_tss(&cpu_info_primary);
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ltr(cpu_info_primary.ci_tss_sel);
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#endif
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x86_init();
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}
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/*
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@ -1,4 +1,4 @@
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# $NetBSD: files.x86,v 1.53 2009/10/02 18:50:03 jmcneill Exp $
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# $NetBSD: files.x86,v 1.54 2009/10/05 23:59:31 rmind Exp $
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# options for MP configuration through the MP spec
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defflag opt_mpbios.h MPBIOS MPVERBOSE MPDEBUG MPBIOS_SCANPCI
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@ -61,7 +61,6 @@ file arch/x86/x86/intr.c
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file arch/x86/x86/nmi.c
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file arch/x86/x86/idt.c
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file arch/x86/x86/ipi.c
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file arch/x86/x86/msr_ipifuncs.c
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file arch/x86/x86/mtrr_i686.c mtrr
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file arch/x86/x86/patch.c
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file arch/x86/x86/platform.c
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_msr.h,v 1.6 2007/10/17 19:58:14 garbled Exp $ */
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/* $NetBSD: cpu_msr.h,v 1.7 2009/10/05 23:59:31 rmind Exp $ */
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/*-
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* Copyright (c) 2007 Juan Romero Pardines.
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@ -29,22 +29,36 @@
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#define _X86_CPU_MSR_H
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#include <sys/param.h>
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#include <machine/cpu.h>
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#include <sys/types.h>
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#ifdef _KERNEL
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struct msr_cpu_broadcast {
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int msr_read;
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int msr_type;
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uint64_t msr_value;
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uint64_t msr_mask;
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struct msr_rw_info {
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int msr_read;
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int msr_type;
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uint64_t msr_value;
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uint64_t msr_mask;
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};
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void x86_init(void);
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void msr_write_ipi(struct cpu_info *);
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void msr_cpu_broadcast_initmtx(void);
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void msr_cpu_broadcast(struct msr_cpu_broadcast *);
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static inline void
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x86_msr_xcall(void *arg1, void *arg2)
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{
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struct msr_rw_info *msrdat = arg1;
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uint64_t msr = 0;
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KASSERT(msrdat->msr_type != 0);
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/* Read the MSR requested and apply the mask if defined. */
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if (msrdat->msr_read) {
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msr = rdmsr(msrdat->msr_type);
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if (msrdat->msr_mask) {
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msr &= ~msrdat->msr_mask;
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}
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}
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/* Assign (or extract, on read) the value and perform the write. */
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msr |= msrdat->msr_value;
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wrmsr(msrdat->msr_type, msr);
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}
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#endif /* ! _KERNEL */
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#endif /* ! _X86_CPU_MSR_H */
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@ -1,4 +1,4 @@
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/* $NetBSD: intrdefs.h,v 1.14 2008/11/11 13:45:10 ad Exp $ */
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/* $NetBSD: intrdefs.h,v 1.15 2009/10/05 23:59:31 rmind Exp $ */
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#ifndef _X86_INTRDEFS_H_
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#define _X86_INTRDEFS_H_
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@ -58,11 +58,11 @@
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#define X86_IPI_HALT 0x00000001
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#define X86_IPI_MICROSET 0x00000002
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#define X86_IPI__UNUSED 0x00000004
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#define X86_IPI__UNUSED1 0x00000004
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#define X86_IPI_SYNCH_FPU 0x00000008
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#define X86_IPI_MTRR 0x00000010
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#define X86_IPI_GDT 0x00000020
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#define X86_IPI_WRITE_MSR 0x00000040
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#define X86_IPI__UNUSED2 0x00000040
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#define X86_IPI_ACPI_CPU_SLEEP 0x00000080
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#define X86_IPI_KPREEMPT 0x00000100
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@ -70,7 +70,7 @@
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#define X86_IPI_NAMES { "halt IPI", "timeset IPI", "unused", \
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"FPU synch IPI", "MTRR update IPI", \
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"GDT update IPI", "MSR write IPI", \
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"GDT update IPI", "unused", \
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"ACPI CPU sleep IPI", "kpreempt IPI" }
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#define IREENT_MAGIC 0x18041969
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@ -1,4 +1,4 @@
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/* $NetBSD: est.c,v 1.12 2009/10/02 15:05:42 jmcneill Exp $ */
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/* $NetBSD: est.c,v 1.13 2009/10/05 23:59:31 rmind Exp $ */
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/*
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* Copyright (c) 2003 Michael Eriksson.
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* All rights reserved.
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@ -81,7 +81,7 @@
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/* #define EST_DEBUG */
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: est.c,v 1.12 2009/10/02 15:05:42 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: est.c,v 1.13 2009/10/05 23:59:31 rmind Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -89,6 +89,7 @@ __KERNEL_RCSID(0, "$NetBSD: est.c,v 1.12 2009/10/02 15:05:42 jmcneill Exp $");
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#include <sys/malloc.h>
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#include <sys/sysctl.h>
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#include <sys/once.h>
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#include <sys/xcall.h>
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#include <x86/cpuvar.h>
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#include <x86/cputypes.h>
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@ -1009,7 +1010,6 @@ static void est_init_main(int);
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static int
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est_sysctl_helper(SYSCTLFN_ARGS)
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{
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struct msr_cpu_broadcast mcb;
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struct sysctlnode node;
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int fq, oldfq, error;
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@ -1033,17 +1033,22 @@ est_sysctl_helper(SYSCTLFN_ARGS)
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/* support writing to ...frequency.target */
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if (rnode->sysctl_num == est_node_target && fq != oldfq) {
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int i;
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struct msr_rw_info msr;
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uint64_t where;
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int i;
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for (i = est_fqlist->n - 1; i > 0; i--)
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if (MSR2MHZ(est_fqlist->table[i], bus_clock) >= fq)
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break;
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fq = MSR2MHZ(est_fqlist->table[i], bus_clock);
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mcb.msr_read = true;
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mcb.msr_type = MSR_PERF_CTL;
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mcb.msr_mask = 0xffffULL;
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mcb.msr_value = est_fqlist->table[i];
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msr_cpu_broadcast(&mcb);
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msr.msr_read = true;
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msr.msr_type = MSR_PERF_CTL;
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msr.msr_mask = 0xffffULL;
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msr.msr_value = est_fqlist->table[i];
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where = xc_broadcast(0, (xcfunc_t)x86_msr_xcall, &msr, NULL);
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xc_wait(where);
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}
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return 0;
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@ -1,4 +1,4 @@
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/* $NetBSD: iclockmod.c,v 1.12 2008/05/11 14:44:54 ad Exp $ */
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/* $NetBSD: iclockmod.c,v 1.13 2009/10/05 23:59:31 rmind Exp $ */
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/* $OpenBSD: p4tcc.c,v 1.13 2006/12/20 17:50:40 gwk Exp $ */
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/*
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: iclockmod.c,v 1.12 2008/05/11 14:44:54 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: iclockmod.c,v 1.13 2009/10/05 23:59:31 rmind Exp $");
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#include "opt_intel_odcm.h"
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@ -49,6 +49,7 @@ __KERNEL_RCSID(0, "$NetBSD: iclockmod.c,v 1.12 2008/05/11 14:44:54 ad Exp $");
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#include <sys/malloc.h>
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#include <sys/sysctl.h>
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#include <sys/once.h>
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#include <sys/xcall.h>
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#include <machine/cpu.h>
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#include <machine/cpuvar.h>
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@ -60,7 +61,6 @@ __KERNEL_RCSID(0, "$NetBSD: iclockmod.c,v 1.12 2008/05/11 14:44:54 ad Exp $");
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#define ODCM_REGOFFSET 1
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#define ODCM_MAXSTATES 8
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static struct msr_cpu_broadcast mcb;
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static int clockmod_level;
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static int clockmod_state_target;
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static int clockmod_state_current;
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@ -111,6 +111,8 @@ clockmod_getstate(void)
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static void
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clockmod_setstate(int level)
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{
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struct msr_rw_info msr;
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uint64_t where;
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int i;
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for (i = 0; i < __arraycount(state); i++) {
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@ -119,16 +121,17 @@ clockmod_setstate(int level)
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}
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KASSERT(i != __arraycount(state));
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mcb.msr_read = true;
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mcb.msr_type = MSR_THERM_CONTROL;
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mcb.msr_mask = 0x1e;
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msr.msr_read = true;
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msr.msr_type = MSR_THERM_CONTROL;
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msr.msr_mask = 0x1e;
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if (state[i].reg != 0) /* bit 0 reserved */
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mcb.msr_value = (state[i].reg << ODCM_REGOFFSET) | ODCM_ENABLE;
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msr.msr_value = (state[i].reg << ODCM_REGOFFSET) | ODCM_ENABLE;
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else
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mcb.msr_value = 0; /* max state */
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msr.msr_value = 0; /* max state */
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msr_cpu_broadcast(&mcb);
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where = xc_broadcast(0, (xcfunc_t)x86_msr_xcall, &msr, NULL);
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xc_wait(where);
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}
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static int
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@ -1,4 +1,4 @@
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/* $NetBSD: ipi.c,v 1.15 2009/08/18 16:41:03 jmcneill Exp $ */
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/* $NetBSD: ipi.c,v 1.16 2009/10/05 23:59:31 rmind Exp $ */
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/*-
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* Copyright (c) 2000, 2008, 2009 The NetBSD Foundation, Inc.
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ipi.c,v 1.15 2009/08/18 16:41:03 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ipi.c,v 1.16 2009/10/05 23:59:31 rmind Exp $");
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#include "opt_mtrr.h"
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@ -53,8 +53,6 @@ __KERNEL_RCSID(0, "$NetBSD: ipi.c,v 1.15 2009/08/18 16:41:03 jmcneill Exp $");
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#include <machine/mtrr.h>
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#include <machine/gdt.h>
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#include <x86/cpu_msr.h>
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#include "acpica.h"
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#ifdef __x86_64__
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@ -94,7 +92,7 @@ void (*ipifunc[X86_NIPI])(struct cpu_info *) =
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x86_ipi_synch_fpu,
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x86_ipi_reload_mtrr,
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gdt_reload_cpu,
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msr_write_ipi,
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NULL,
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acpi_cpu_sleep,
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x86_ipi_kpreempt
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};
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@ -1,139 +0,0 @@
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/* $NetBSD: msr_ipifuncs.c,v 1.15 2008/01/04 21:17:45 ad Exp $ */
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/*-
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* Copyright (c) 2007 Juan Romero Pardines.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Generic IPI handler to make writes to a MSR on x86, in all
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* CPUs available in the system.
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*
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* Thanks to Andrew Doran, Michael Van Elst and Quentin Garnier for
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* help and information provided.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: msr_ipifuncs.c,v 1.15 2008/01/04 21:17:45 ad Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
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#include <sys/mutex.h>
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#include <sys/atomic.h>
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#include <sys/cpu.h>
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#include <x86/cpu_msr.h>
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#include <machine/intrdefs.h>
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#include <machine/cpufunc.h>
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static kmutex_t msr_mtx;
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static volatile uint64_t msr_setvalue, msr_setmask;
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static volatile int msr_type, msr_read;
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static volatile u_int msr_runcount;
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/*
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* This function will write the value of msr_setvalue in the MSR msr_type
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* and if a mask is provided, the value will be masked with msr_setmask.
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*/
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void
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msr_write_ipi(struct cpu_info *ci)
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{
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uint64_t msr = 0;
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/* Read the MSR requested and apply the mask if defined. */
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if (msr_read)
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msr = rdmsr(msr_type);
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if (msr_setmask)
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msr &= ~msr_setmask;
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/* Ok, assign value now.*/
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if (msr_read)
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msr |= msr_setvalue;
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else
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msr = msr_setvalue;
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/* Write it now */
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wrmsr(msr_type, msr);
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/* This cpu has finished making all tasks, update the counter. */
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atomic_inc_uint(&msr_runcount);
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}
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/*
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* Main function. Assigns values provided by the driver into the global
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* variables, necessary for the IPI handler.
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*/
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void
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msr_cpu_broadcast(struct msr_cpu_broadcast *mcb)
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{
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||||
if (!mcb->msr_type)
|
||||
panic("msr_type not defined");
|
||||
|
||||
/* We only want one CPU at a time sending these IPIs out. */
|
||||
mutex_enter(&msr_mtx);
|
||||
|
||||
/* Initialize counter, the task has not run in any cpu yet. */
|
||||
msr_runcount = 0;
|
||||
|
||||
/* Assign requested MSR type, value and mask. */
|
||||
msr_type = mcb->msr_type;
|
||||
msr_setvalue = mcb->msr_value;
|
||||
msr_setmask = mcb->msr_mask;
|
||||
msr_read = mcb->msr_read;
|
||||
|
||||
/*
|
||||
* Issue a full memory barrier, to make sure the operations
|
||||
* are done in a serialized way.
|
||||
*/
|
||||
membar_sync();
|
||||
|
||||
/* Run the IPI write handler in the CPUs. */
|
||||
msr_write_ipi(curcpu());
|
||||
|
||||
#ifdef MULTIPROCESSOR
|
||||
if (ncpu > 1)
|
||||
x86_broadcast_ipi(X86_IPI_WRITE_MSR);
|
||||
#endif
|
||||
|
||||
while (msr_runcount < ncpu)
|
||||
x86_pause();
|
||||
|
||||
/* We're done, so unlock. */
|
||||
mutex_exit(&msr_mtx);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initializes the mutex very early in the boot process
|
||||
* for future access.
|
||||
*/
|
||||
void
|
||||
msr_cpu_broadcast_initmtx(void)
|
||||
{
|
||||
|
||||
mutex_init(&msr_mtx, MUTEX_DEFAULT, IPL_NONE);
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: powernow_k8.c,v 1.25 2009/08/23 16:02:50 ahoka Exp $ */
|
||||
/* $NetBSD: powernow_k8.c,v 1.26 2009/10/05 23:59:31 rmind Exp $ */
|
||||
/* $OpenBSD: powernow-k8.c,v 1.8 2006/06/16 05:58:50 gwk Exp $ */
|
||||
|
||||
/*-
|
||||
@ -59,7 +59,7 @@
|
||||
/* AMD POWERNOW K8 driver */
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: powernow_k8.c,v 1.25 2009/08/23 16:02:50 ahoka Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: powernow_k8.c,v 1.26 2009/10/05 23:59:31 rmind Exp $");
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
@ -67,6 +67,7 @@ __KERNEL_RCSID(0, "$NetBSD: powernow_k8.c,v 1.25 2009/08/23 16:02:50 ahoka Exp $
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/once.h>
|
||||
#include <sys/xcall.h>
|
||||
|
||||
#include <x86/cpu_msr.h>
|
||||
#include <x86/powernow.h>
|
||||
@ -78,12 +79,6 @@ __KERNEL_RCSID(0, "$NetBSD: powernow_k8.c,v 1.25 2009/08/23 16:02:50 ahoka Exp $
|
||||
#include <machine/cpufunc.h>
|
||||
#include <machine/bus.h>
|
||||
|
||||
#define WRITE_FIDVID(fid, vid, ctrl) \
|
||||
mcb.msr_read = false; \
|
||||
mcb.msr_value = (((ctrl) << 32) | (1ULL << 16) | ((vid) << 8) | (fid)); \
|
||||
mcb.msr_type = MSR_AMDK7_FIDVID_CTL; \
|
||||
msr_cpu_broadcast(&mcb);
|
||||
|
||||
#ifdef _MODULE
|
||||
static struct sysctllog *sysctllog;
|
||||
#define SYSCTLLOG &sysctllog
|
||||
@ -91,11 +86,6 @@ static struct sysctllog *sysctllog;
|
||||
#define SYSCTLLOG NULL
|
||||
#endif
|
||||
|
||||
#define READ_PENDING_WAIT(status) \
|
||||
do { \
|
||||
(status) = rdmsr(MSR_AMDK7_FIDVID_STATUS); \
|
||||
} while (PN8_STA_PENDING(status))
|
||||
|
||||
static struct powernow_cpu_state *k8pnow_current_state;
|
||||
static unsigned int cur_freq;
|
||||
static int powernow_node_target, powernow_node_current;
|
||||
@ -110,6 +100,26 @@ static int k8_powernow_setperf(unsigned int);
|
||||
static int k8_powernow_init_once(void);
|
||||
static void k8_powernow_init_main(void);
|
||||
|
||||
static uint64_t
|
||||
k8pnow_wr_fidvid(u_int fid, uint64_t vid, uint64_t ctrl)
|
||||
{
|
||||
struct msr_rw_info msr;
|
||||
uint64_t where, status;
|
||||
|
||||
msr.msr_read = false;
|
||||
msr.msr_value = (ctrl << 32) | (1ULL << 16) | (vid << 8) | fid;
|
||||
msr.msr_type = MSR_AMDK7_FIDVID_CTL;
|
||||
|
||||
where = xc_broadcast(0, (xcfunc_t)x86_msr_xcall, &msr, NULL);
|
||||
xc_wait(where);
|
||||
|
||||
do {
|
||||
status = rdmsr(MSR_AMDK7_FIDVID_STATUS);
|
||||
} while (PN8_STA_PENDING(status));
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
k8pnow_sysctl_helper(SYSCTLFN_ARGS)
|
||||
{
|
||||
@ -151,7 +161,6 @@ k8_powernow_setperf(unsigned int freq)
|
||||
int cfid, cvid, fid = 0, vid = 0;
|
||||
int rvo;
|
||||
struct powernow_cpu_state *cstate;
|
||||
struct msr_cpu_broadcast mcb;
|
||||
|
||||
/*
|
||||
* We dont do a k8pnow_read_pending_wait here, need to ensure that the
|
||||
@ -186,8 +195,7 @@ k8_powernow_setperf(unsigned int freq)
|
||||
*/
|
||||
while (cvid > vid) {
|
||||
val = cvid - (1 << cstate->mvs);
|
||||
WRITE_FIDVID(cfid, (val > 0) ? val : 0, 1ULL);
|
||||
READ_PENDING_WAIT(status);
|
||||
status = k8pnow_wr_fidvid(cfid, (val > 0) ? val : 0, 1ULL);
|
||||
cvid = PN8_STA_CVID(status);
|
||||
COUNT_OFF_VST(cstate->vst);
|
||||
}
|
||||
@ -197,8 +205,7 @@ k8_powernow_setperf(unsigned int freq)
|
||||
/* XXX It's not clear from spec if we have to do that
|
||||
* in 0.25 step or in MVS. Therefore do it as it's done
|
||||
* under Linux */
|
||||
WRITE_FIDVID(cfid, cvid - 1, 1ULL);
|
||||
READ_PENDING_WAIT(status);
|
||||
status = k8pnow_wr_fidvid(cfid, cvid - 1, 1ULL);
|
||||
cvid = PN8_STA_CVID(status);
|
||||
COUNT_OFF_VST(cstate->vst);
|
||||
}
|
||||
@ -218,24 +225,23 @@ k8_powernow_setperf(unsigned int freq)
|
||||
val = FID_TO_VCO_FID(cfid) + 2;
|
||||
} else
|
||||
val = cfid - 2;
|
||||
WRITE_FIDVID(val, cvid, (uint64_t)cstate->pll * 1000 / 5);
|
||||
READ_PENDING_WAIT(status);
|
||||
status = k8pnow_wr_fidvid(val, cvid,
|
||||
(uint64_t)cstate->pll * 1000 / 5);
|
||||
cfid = PN8_STA_CFID(status);
|
||||
COUNT_OFF_IRT(cstate->irt);
|
||||
|
||||
vco_cfid = FID_TO_VCO_FID(cfid);
|
||||
}
|
||||
|
||||
WRITE_FIDVID(fid, cvid, (uint64_t) cstate->pll * 1000 / 5);
|
||||
READ_PENDING_WAIT(status);
|
||||
status = k8pnow_wr_fidvid(fid, cvid,
|
||||
(uint64_t)cstate->pll * 1000 / 5);
|
||||
cfid = PN8_STA_CFID(status);
|
||||
COUNT_OFF_IRT(cstate->irt);
|
||||
}
|
||||
|
||||
/* Phase 3: change to requested voltage */
|
||||
if (cvid != vid) {
|
||||
WRITE_FIDVID(cfid, vid, 1ULL);
|
||||
READ_PENDING_WAIT(status);
|
||||
status = k8pnow_wr_fidvid(cfid, vid, 1ULL);
|
||||
cvid = PN8_STA_CVID(status);
|
||||
COUNT_OFF_VST(cstate->vst);
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: x86_machdep.c,v 1.33 2009/08/05 20:15:36 jym Exp $ */
|
||||
/* $NetBSD: x86_machdep.c,v 1.34 2009/10/05 23:59:31 rmind Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2002, 2006, 2007 YAMAMOTO Takashi,
|
||||
@ -31,7 +31,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.33 2009/08/05 20:15:36 jym Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.34 2009/10/05 23:59:31 rmind Exp $");
|
||||
|
||||
#include "opt_modular.h"
|
||||
|
||||
@ -49,7 +49,6 @@ __KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.33 2009/08/05 20:15:36 jym Exp $")
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/extent.h>
|
||||
|
||||
#include <x86/cpu_msr.h>
|
||||
#include <x86/cpuvar.h>
|
||||
#include <x86/cputypes.h>
|
||||
#include <x86/machdep.h>
|
||||
@ -124,15 +123,6 @@ check_pa_acc(paddr_t pa, vm_prot_t prot)
|
||||
KAUTH_MACHDEP_UNMANAGEDMEM, NULL, NULL, NULL, NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is to initialize the mutex used by x86/msr_ipifuncs.c.
|
||||
*/
|
||||
void
|
||||
x86_init(void)
|
||||
{
|
||||
msr_cpu_broadcast_initmtx();
|
||||
}
|
||||
|
||||
#ifdef MODULAR
|
||||
/*
|
||||
* Push any modules loaded by the boot loader.
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.xen,v 1.104 2009/08/16 15:35:52 manu Exp $
|
||||
# $NetBSD: files.xen,v 1.105 2009/10/05 23:59:31 rmind Exp $
|
||||
# NetBSD: files.x86,v 1.10 2003/10/08 17:30:00 bouyer Exp
|
||||
# NetBSD: files.i386,v 1.254 2004/03/25 23:32:10 jmc Exp
|
||||
|
||||
@ -293,8 +293,6 @@ attach vcpu at xendevbus
|
||||
|
||||
file arch/xen/x86/cpu.c cpu | vcpu
|
||||
|
||||
file arch/x86/x86/msr_ipifuncs.c
|
||||
|
||||
#
|
||||
# Compatibility modules
|
||||
#
|
||||
|
||||
Loading…
Reference in New Issue
Block a user