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define mips3 COUNT and COMPARE cp0 registers (onchip cycle counter)

This commit is contained in:
jonathan 1998-04-23 10:32:08 +00:00
parent 3d2cea267e
commit b5798a80f0
1 changed files with 4 additions and 1 deletions
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5
sys/arch/mips/include/cpuregs.h
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@ -1,4 +1,4 @@
/* $NetBSD: cpuregs.h,v 1.13 1997/06/22 07:42:49 jonathan Exp $ */ /* $NetBSD: cpuregs.h,v 1.14 1998/04/23 10:32:08 jonathan Exp $ */
/* /*
* Copyright (c) 1992, 1993 * Copyright (c) 1992, 1993
@ -337,6 +337,9 @@
#define MIPS_COP_0_TLB_PG_MASK $5 #define MIPS_COP_0_TLB_PG_MASK $5
#define MIPS_COP_0_TLB_WIRED $6 #define MIPS_COP_0_TLB_WIRED $6
#define MIPS_COP_0_COUNT $9
#define MIPS_COP_0_COMPARE $11
#define MIPS_COP_0_CONFIG $16 #define MIPS_COP_0_CONFIG $16
#define MIPS_COP_0_LLADDR $17 #define MIPS_COP_0_LLADDR $17
#define MIPS_COP_0_WATCH_LO $18 #define MIPS_COP_0_WATCH_LO $18