Add the AltiVec data stream instructions that seemingly got lost between

binutils 2.9 and 2.11.
This commit is contained in:
matt 2001-09-06 21:02:29 +00:00
parent 2d2a66209d
commit b3fe7bae05
1 changed files with 21 additions and 0 deletions

View File

@ -430,6 +430,11 @@ const struct powerpc_operand powerpc_operands[] =
/* The SHB field in a VA form instruction. */
#define SHB UIMM + 1
{ 4, 6, 0, 0, 0 },
/* The VD or VS field in a VA, VX, VXR or X form instruction. */
#define TAG SHB + 1
#define TAG_MASK (0x3 << 21)
{2, 21, 0, 0, 0 },
};
/* The functions used to insert and extract complicated operands. */
@ -1157,6 +1162,12 @@ extract_tbr (insn, invalid)
/* The mask for a VXR form instruction. */
#define VXR_MASK VXR(0x3f, 0x3ff, 1)
/* An XV form instruction. */
#define XV(op, xop, to) (X ((op), (xop)) | ((((unsigned long)(to)) & 1) << 25))
/* The mask for a XV form instruction. */
#define XV_MASK XV(0x3f, 0x3ff, 1)
/* An X form instruction. */
#define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1))
@ -3201,6 +3212,16 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
{ "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
{ "dst", XV(31,342,0), XV_MASK, PPCVEC, { RA, RB, TAG } },
{ "dstt", XV(31,342,1), XV_MASK, PPCVEC, { RA, RB, TAG } },
{ "dstst", XV(31,374,0), XV_MASK, PPCVEC, { RA, RB, TAG } },
{ "dststt", XV(31,374,1), XV_MASK, PPCVEC, { RA, RB, TAG } },
{ "dss", XV(31,822,0), XV_MASK|RA_MASK|RB_MASK,
PPCVEC, { TAG } },
{ "dssall", XV(31,822,1), XV_MASK|RA_MASK|RB_MASK|TAG_MASK,
PPCVEC, { 0 } },
{ "lvebx", X(31, 7), X_MASK, PPCVEC, { VD, RA, RB } },
{ "lvehx", X(31, 39), X_MASK, PPCVEC, { VD, RA, RB } },
{ "lvewx", X(31, 71), X_MASK, PPCVEC, { VD, RA, RB } },