Clean up terminology: modern arm CPUs do properly implement IEEE 754

floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.
This commit is contained in:
martin 2019-01-30 12:16:28 +00:00
parent 950da10c7a
commit b39c506b5a
4 changed files with 16 additions and 16 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: h_segv.c,v 1.12 2019/01/27 16:29:56 christos Exp $ */
/* $NetBSD: h_segv.c,v 1.13 2019/01/30 12:16:28 martin Exp $ */
/*-
* Copyright (c) 2017 The NetBSD Foundation, Inc.
@ -29,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__RCSID("$NetBSD: h_segv.c,v 1.12 2019/01/27 16:29:56 christos Exp $");
__RCSID("$NetBSD: h_segv.c,v 1.13 2019/01/30 12:16:28 martin Exp $");
#define __TEST_FENV
@ -113,12 +113,12 @@ check_fpe(void)
{
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* skip these tests if running on them and compiled for
* Some NEON fpus do not trap on IEEE 754 FP excpeptions.
* Skip these tests if running on them and compiled for
* hard float.
*/
if (0 == fpsetmask(fpsetmask(FP_X_INV))) {
printf("FPU does not implement exception handling\n");
printf("FPU does not implement traps on FP exceptions\n");
exit(EXIT_FAILURE);
}
#endif

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@ -1,4 +1,4 @@
/* $NetBSD: t_fpsetmask.c,v 1.18 2019/01/23 17:36:01 martin Exp $ */
/* $NetBSD: t_fpsetmask.c,v 1.19 2019/01/30 12:16:28 martin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@ -60,13 +60,13 @@ ATF_TC_BODY(no_test, tc)
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* Some NEON fpus do not trap on IEEE 754 FP excpeptions.
* skip these tests if running on them and compiled for
* hard float.
*/
#define FPU_PREREQ() \
if (0 == fpsetmask(fpsetmask(FP_X_INV))) \
atf_tc_skip("FPU does not implement exception handling");
atf_tc_skip("FPU does not implement traps on FP exceptions");
#endif
#ifndef FPU_PREREQ

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@ -1,4 +1,4 @@
/* $NetBSD: t_siginfo.c,v 1.34 2019/01/26 15:46:27 martin Exp $ */
/* $NetBSD: t_siginfo.c,v 1.35 2019/01/30 12:16:28 martin Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@ -311,12 +311,12 @@ ATF_TC_BODY(sigfpe_flt, tc)
atf_tc_skip("Test does not run correctly under QEMU");
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* Some NEON fpus do not trap on IEEE 754 FP excpeptions.
* skip these tests if running on them and compiled for
* hard float.
*/
if (0 == fpsetmask(fpsetmask(FP_X_INV)))
atf_tc_skip("FPU does not implement exception handling");
atf_tc_skip("FPU does not implement traps on FP exceptions");
#endif
if (sigsetjmp(sigfpe_flt_env, 0) == 0) {
sa.sa_flags = SA_SIGINFO;

View File

@ -1,4 +1,4 @@
/* $NetBSD: t_fenv.c,v 1.4 2019/01/23 17:36:01 martin Exp $ */
/* $NetBSD: t_fenv.c,v 1.5 2019/01/30 12:16:28 martin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -29,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__RCSID("$NetBSD: t_fenv.c,v 1.4 2019/01/23 17:36:01 martin Exp $");
__RCSID("$NetBSD: t_fenv.c,v 1.5 2019/01/30 12:16:28 martin Exp $");
#include <atf-c.h>
@ -42,13 +42,13 @@ __RCSID("$NetBSD: t_fenv.c,v 1.4 2019/01/23 17:36:01 martin Exp $");
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* skip these tests if running on them and compiled for
* Some NEON fpus do not trap on IEEE 754 FP excpeptions.
* Skip these tests if running on them and compiled for
* hard float.
*/
#define FPU_EXC_PREREQ() \
if (0 == fpsetmask(fpsetmask(FP_X_INV))) \
atf_tc_skip("FPU does not implement exception handling");
atf_tc_skip("FPU does not implement traps on FP exceptions");
/*
* Same as above: some don't allow configuring the rounding mode.