augustss
parent
7e4459fe10
commit
b38958f960
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@ -1,4 +1,11 @@
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/* $NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $ */
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/* TODO
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Add intrinfo.
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USB 2 reset is 50 ms?
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Frame lengths of control and bulk are 64, 512?
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Indicator light bit.
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Check 7.1.7.3
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*/
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/* $NetBSD: ehci.c,v 1.11 2001/11/20 13:49:07 augustss Exp $ */
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/*
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -47,7 +54,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.11 2001/11/20 13:49:07 augustss Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -110,6 +117,8 @@ Static void ehci_power(int, void *);
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Static usbd_status ehci_open(usbd_pipe_handle);
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Static void ehci_poll(struct usbd_bus *);
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Static void ehci_softintr(void *);
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Static int ehci_intr1(ehci_softc_t *);
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Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
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Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
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@ -168,12 +177,10 @@ Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
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Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
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Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
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Static void ehci_hash_add_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
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Static void ehci_hash_rem_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
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Static ehci_soft_qtd_t *ehci_hash_find_qtd(ehci_softc_t *, ehci_physaddr_t);
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Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
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Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
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ehci_soft_qh_t *);
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Static void ehci_sync_hc(ehci_softc_t *);
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Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
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Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
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@ -188,6 +195,8 @@ Static void ehci_dump_qtd(ehci_qtd_t *);
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Static void ehci_dump_sqh(ehci_soft_qh_t *);
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#endif
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#define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
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#define EHCI_INTR_ENDPT 1
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Static struct usbd_bus_methods ehci_bus_methods = {
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@ -260,6 +269,7 @@ ehci_init(ehci_softc_t *sc)
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u_int32_t version, sparams, cparams, hcr;
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u_int i;
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usbd_status err;
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ehci_soft_qh_t *sqh;
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DPRINTF(("ehci_init: start\n"));
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#ifdef EHCI_DEBUG
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@ -296,9 +306,6 @@ ehci_init(ehci_softc_t *sc)
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sc->sc_bus.usbrev = USBREV_2_0;
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for (i = 0; i < EHCI_HASH_SIZE; i++)
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LIST_INIT(&sc->sc_hash_qtds[i]);
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/* Reset the controller */
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DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
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EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
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@ -337,48 +344,34 @@ ehci_init(ehci_softc_t *sc)
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sc->sc_eintrs = EHCI_NORMAL_INTRS;
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/* Allocate dummy QH that starts the bulk list. */
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sc->sc_bulk_head = ehci_alloc_sqh(sc);
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if (sc->sc_bulk_head == NULL) {
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/* Allocate dummy QH that starts the async list. */
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL) {
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err = USBD_NOMEM;
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goto bad1;
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}
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memset(&sc->sc_bulk_head->qh, 0, sizeof(ehci_qtd_t));
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sc->sc_bulk_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
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sc->sc_bulk_head->qh.qh_qtd.qtd_status =
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/* Fill the QH */
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sqh->qh.qh_endp =
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htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
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sqh->qh.qh_link =
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htole32(sqh->physaddr | EHCI_LINK_QH);
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sqh->qh.qh_curqtd = EHCI_NULL;
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sqh->next = NULL;
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/* Fill the overlay qTD */
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sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_status =
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htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
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sc->sc_bulk_head->qh.qh_link =
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htole32(EHCI_LINK_TERMINATE); /* XXX no bw reclaimation */
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sc->sc_bulk_head->next = NULL;
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sqh->sqtd = NULL;
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#ifdef EHCI_DEBUG
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if (ehcidebug) {
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ehci_dump_sqh(sc->sc_bulk_head);
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}
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#endif
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/* Allocate dummy QH that starts the control list. */
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sc->sc_ctrl_head = ehci_alloc_sqh(sc);
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if (sc->sc_ctrl_head == NULL) {
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err = USBD_NOMEM;
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goto bad2;
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}
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memset(&sc->sc_ctrl_head->qh, 0, sizeof(ehci_qtd_t));
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sc->sc_ctrl_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
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sc->sc_ctrl_head->qh.qh_qtd.qtd_status =
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htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
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sc->sc_ctrl_head->qh.qh_endp = htole32(EHCI_QH_HRECL);
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sc->sc_ctrl_head->qh.qh_link =
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htole32(sc->sc_bulk_head->physaddr | EHCI_LINK_QH);
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sc->sc_ctrl_head = sc->sc_bulk_head;
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#ifdef EHCI_DEBUG
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if (ehcidebug) {
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ehci_dump_sqh(sc->sc_ctrl_head);
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ehci_dump_sqh(sc->sc_async_head);
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}
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#endif
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/* Point to async list */
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EOWRITE4(sc, EHCI_ASYNCLISTADDR,
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sc->sc_ctrl_head->physaddr | EHCI_LINK_QH);
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sc->sc_async_head = sqh;
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EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
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usb_callout_init(sc->sc_tmo_pcd);
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@ -413,17 +406,15 @@ ehci_init(ehci_softc_t *sc)
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#if 0
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bad3:
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ehci_free_sqh(sc, sc->sc_bulk_head);
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#endif
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bad2:
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ehci_free_sqh(sc, sc->sc_ctrl_head);
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bad2:
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ehci_free_sqtd(sc, sc->sc_bulk_head->sqtd);
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#endif
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bad1:
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usb_freemem(&sc->sc_bus, &sc->sc_fldma);
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return (err);
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}
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Static int ehci_intr1(ehci_softc_t *);
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int
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ehci_intr(void *v)
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{
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@ -472,7 +463,7 @@ ehci_intr1(ehci_softc_t *sc)
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sc->sc_bus.no_intrs++;
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if (eintrs & EHCI_STS_IAA) {
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DPRINTF(("ehci_intr1: door bell\n"));
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wakeup(&sc->sc_bulk_head);
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wakeup(&sc->sc_async_head);
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eintrs &= ~EHCI_STS_INT;
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}
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if (eintrs & EHCI_STS_INT) {
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@ -859,7 +850,6 @@ ehci_open(usbd_pipe_handle pipe)
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u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
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struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
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ehci_soft_qh_t *sqh;
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ehci_soft_qtd_t *sqtd;
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usbd_status err;
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#if 0
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ehci_soft_itd_t *sitd;
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@ -887,7 +877,12 @@ ehci_open(usbd_pipe_handle pipe)
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return (USBD_NORMAL_COMPLETION);
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}
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speed = EHCI_QH_SPEED_HIGH; /* XXX */
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switch (dev->speed) {
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case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
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case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
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case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
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default: panic("ehci_open: bad device speed %d\n", dev->speed);
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}
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naks = 8; /* XXX */
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL)
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@ -905,39 +900,33 @@ ehci_open(usbd_pipe_handle pipe)
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);
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sqh->qh.qh_endphub = htole32(
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EHCI_QH_SET_MULT(1)
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/* XXX TT stuff */
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/* XXX interrupt mask */
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);
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sqh->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
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sqh->qh.qh_curqtd = EHCI_NULL;
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/* Fill the overlay qTD */
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sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_status =
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htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
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epipe->sqh = sqh;
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#if 0
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if (xfertype == UE_CONTROL || xfertype == UE_BULK) {
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sqtd = ehci_alloc_sqtd(sc);
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if (sqtd == NULL) {
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ehci_free_sqtd(sc, sqtd);
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goto bad1;
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}
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epipe->tail.qtd = sqtd;
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tdphys = sqtd->physaddr;
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} else
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sqtd = NULL;
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#endif
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switch (xfertype) {
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case UE_CONTROL:
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pipe->methods = &ehci_device_ctrl_methods;
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err = usb_allocmem(&sc->sc_bus,
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sizeof(usb_device_request_t),
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err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
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0, &epipe->u.ctl.reqdma);
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if (err)
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goto bad;
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goto bad1;
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pipe->methods = &ehci_device_ctrl_methods;
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s = splusb();
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ehci_add_qh(sqh, sc->sc_ctrl_head);
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ehci_add_qh(sqh, sc->sc_async_head);
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splx(s);
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break;
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case UE_BULK:
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pipe->methods = &ehci_device_bulk_methods;
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s = splusb();
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ehci_add_qh(sqh, sc->sc_bulk_head);
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ehci_add_qh(sqh, sc->sc_async_head);
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splx(s);
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break;
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default:
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@ -945,12 +934,8 @@ ehci_open(usbd_pipe_handle pipe)
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}
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return (USBD_NORMAL_COMPLETION);
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bad:
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if (sqtd != NULL)
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ehci_free_sqtd(sc, sqtd);
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/*bad1:*/
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if (sqh != NULL)
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ehci_free_sqh(sc, sqh);
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bad1:
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ehci_free_sqh(sc, sqh);
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bad0:
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return (USBD_NOMEM);
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}
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@ -983,7 +968,6 @@ void
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ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
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{
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ehci_soft_qh_t *p;
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int s;
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SPLUSBCHECK;
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/* XXX */
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@ -994,17 +978,25 @@ ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
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p->next = sqh->next;
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p->qh.qh_link = sqh->qh.qh_link;
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/*
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* Now we must ensure that the HC has released all references to the
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* QH. We do this by asking for a Async Advance Doorbell interrupt
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* and then we wait for the interrupt.
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* To make this easier we first obtain exclusive use ofthe doorbell.
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*/
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ehci_sync_hc(sc);
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}
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/*
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* Ensure that the HC has released all references to the QH. We do this
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* by asking for a Async Advance Doorbell interrupt and then we wait for
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* the interrupt.
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* To make this easier we first obtain exclusive use of the doorbell.
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*/
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void
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ehci_sync_hc(ehci_softc_t *sc)
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{
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int s;
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lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
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s = splhardusb();
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/* ask for doorbell */
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EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
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tsleep(&sc->sc_bulk_head, PZERO, "ehcidi", 0); /* wait for doorbell */
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tsleep(&sc->sc_async_head, PZERO, "ehcidi", 0); /* wait for doorbell */
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splx(s);
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lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
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}
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@ -1020,13 +1012,25 @@ Static usb_device_descriptor_t ehci_devd = {
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{0x00, 0x02}, /* USB version */
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UDCLASS_HUB, /* class */
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UDSUBCLASS_HUB, /* subclass */
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0, /* protocol */
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UDPROTO_HSHUBSTT, /* protocol */
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64, /* max packet */
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{0},{0},{0x00,0x01}, /* device id */
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1,2,0, /* string indicies */
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1 /* # of configurations */
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};
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Static usb_device_qualifier_t ehci_odevd = {
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USB_DEVICE_DESCRIPTOR_SIZE,
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UDESC_DEVICE_QUALIFIER, /* type */
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{0x00, 0x02}, /* USB version */
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UDCLASS_HUB, /* class */
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UDSUBCLASS_HUB, /* subclass */
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UDPROTO_FSHUB, /* protocol */
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64, /* max packet */
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1, /* # of configurations */
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0
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};
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Static usb_config_descriptor_t ehci_confd = {
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USB_CONFIG_DESCRIPTOR_SIZE,
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UDESC_CONFIG,
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@ -1048,7 +1052,7 @@ Static usb_interface_descriptor_t ehci_ifcd = {
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1,
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UICLASS_HUB,
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UISUBCLASS_HUB,
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0,
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UIPROTO_HSHUBSTT,
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0
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};
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@ -1169,6 +1173,23 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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USETW(ehci_devd.idVendor, sc->sc_id_vendor);
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memcpy(buf, &ehci_devd, l);
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break;
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/*
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* We can't really operate at another speed, but the spec says
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* we need this descriptor.
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*/
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case UDESC_DEVICE_QUALIFIER:
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if ((value & 0xff) != 0) {
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err = USBD_IOERROR;
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goto ret;
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}
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totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
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memcpy(buf, &ehci_odevd, l);
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break;
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/*
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* We can't really operate at another speed, but the spec says
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* we need this descriptor.
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*/
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case UDESC_OTHER_SPEED_CONFIGURATION:
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case UDESC_CONFIG:
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if ((value & 0xff) != 0) {
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err = USBD_IOERROR;
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@ -1176,6 +1197,8 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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}
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totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
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memcpy(buf, &ehci_confd, l);
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((usb_config_descriptor_t *)buf)->bDescriptorType =
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value >> 8;
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buf = (char *)buf + l;
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len -= l;
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l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
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@ -1348,7 +1371,7 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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v = EOREAD4(sc, EHCI_PORTSC(index));
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DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
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v));
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i = 0;
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i = UPS_HIGH_SPEED;
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if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
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if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
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if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
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@ -1423,11 +1446,25 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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"%d\n", index));
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EOWRITE4(sc, port, v | EHCI_PS_PP);
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break;
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case UHF_PORT_TEST:
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DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
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"%d\n", index));
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break;
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case UHF_PORT_INDICATOR:
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DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
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"%d\n", index));
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/* XXX */
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break;
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default:
|
||||
err = USBD_IOERROR;
|
||||
goto ret;
|
||||
}
|
||||
break;
|
||||
case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
|
||||
case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
|
||||
case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
|
||||
case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
|
||||
break;
|
||||
default:
|
||||
err = USBD_IOERROR;
|
||||
goto ret;
|
||||
|
|
@ -1567,10 +1604,10 @@ ehci_alloc_sqh(ehci_softc_t *sc)
|
|||
err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
|
||||
EHCI_PAGE_SIZE, &dma);
|
||||
if (err)
|
||||
return (0);
|
||||
return (NULL);
|
||||
for(i = 0; i < EHCI_SQH_CHUNK; i++) {
|
||||
offs = i * EHCI_SQH_SIZE;
|
||||
sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
|
||||
sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
|
||||
sqh->physaddr = DMAADDR(&dma) + offs;
|
||||
sqh->next = sc->sc_freeqhs;
|
||||
sc->sc_freeqhs = sqh;
|
||||
|
|
@ -1579,7 +1616,7 @@ ehci_alloc_sqh(ehci_softc_t *sc)
|
|||
sqh = sc->sc_freeqhs;
|
||||
sc->sc_freeqhs = sqh->next;
|
||||
memset(&sqh->qh, 0, sizeof(ehci_qh_t));
|
||||
sqh->next = 0;
|
||||
sqh->next = NULL;
|
||||
return (sqh);
|
||||
}
|
||||
|
||||
|
|
@ -1622,7 +1659,6 @@ ehci_alloc_sqtd(ehci_softc_t *sc)
|
|||
memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
|
||||
sqtd->nextqtd = NULL;
|
||||
sqtd->xfer = NULL;
|
||||
ehci_hash_add_qtd(sc, sqtd);
|
||||
splx(s);
|
||||
|
||||
return (sqtd);
|
||||
|
|
@ -1634,57 +1670,11 @@ ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
|
|||
int s;
|
||||
|
||||
s = splusb();
|
||||
ehci_hash_rem_qtd(sc, sqtd);
|
||||
sqtd->nextqtd = sc->sc_freeqtds;
|
||||
sc->sc_freeqtds = sqtd;
|
||||
splx(s);
|
||||
}
|
||||
|
||||
/*
|
||||
* When a transfer is completed the TD is added to the done queue by
|
||||
* the host controller. This queue is the processed by software.
|
||||
* Unfortunately the queue contains the physical address of the TD
|
||||
* and we have no simple way to translate this back to a kernel address.
|
||||
* To make the translation possible (and fast) we use a hash table of
|
||||
* TDs currently in the schedule. The physical address is used as the
|
||||
* hash value.
|
||||
*/
|
||||
|
||||
#define HASH(a) (((a) >> 4) % EHCI_HASH_SIZE)
|
||||
/* Called at splusb() */
|
||||
void
|
||||
ehci_hash_add_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
|
||||
{
|
||||
int h = HASH(sqtd->physaddr);
|
||||
|
||||
SPLUSBCHECK;
|
||||
|
||||
LIST_INSERT_HEAD(&sc->sc_hash_qtds[h], sqtd, hnext);
|
||||
}
|
||||
|
||||
/* Called at splusb() */
|
||||
void
|
||||
ehci_hash_rem_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
|
||||
{
|
||||
SPLUSBCHECK;
|
||||
|
||||
LIST_REMOVE(sqtd, hnext);
|
||||
}
|
||||
|
||||
ehci_soft_qtd_t *
|
||||
ehci_hash_find_qtd(ehci_softc_t *sc, ehci_physaddr_t a)
|
||||
{
|
||||
int h = HASH(a);
|
||||
ehci_soft_qtd_t *sqtd;
|
||||
|
||||
for (sqtd = LIST_FIRST(&sc->sc_hash_qtds[h]);
|
||||
sqtd != NULL;
|
||||
sqtd = LIST_NEXT(sqtd, hnext))
|
||||
if (sqtd->physaddr == a)
|
||||
return (sqtd);
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Close a reqular pipe.
|
||||
* Assumes that there are no pending transactions.
|
||||
|
|
@ -1722,14 +1712,55 @@ ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
|
|||
ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
|
||||
ehci_soft_td_t *p, *n;
|
||||
ehci_physaddr_t headp;
|
||||
int s, hit;
|
||||
int hit;
|
||||
#endif
|
||||
int s;
|
||||
|
||||
DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
|
||||
|
||||
if (xfer->device->bus->intr_context || !curproc)
|
||||
panic("ehci_abort_xfer: not in process context\n");
|
||||
|
||||
/*
|
||||
* Step 1: Make interrupt routine and hardware ignore xfer.
|
||||
*/
|
||||
s = splusb();
|
||||
xfer->status = status; /* make software ignore it */
|
||||
usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
|
||||
splx(s);
|
||||
/* XXX */
|
||||
|
||||
/*
|
||||
* Step 2: Wait until we know hardware has finished any possible
|
||||
* use of the xfer. Also make sure the soft interrupt routine
|
||||
* has run.
|
||||
*/
|
||||
usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
|
||||
/* XXX should have some communication with softintr() to know
|
||||
when it's done */
|
||||
usb_delay_ms(epipe->pipe.device->bus, 250);
|
||||
|
||||
/*
|
||||
* Step 3: Remove any vestiges of the xfer from the hardware.
|
||||
* The complication here is that the hardware may have executed
|
||||
* beyond the xfer we're trying to abort. So as we're scanning
|
||||
* the TDs of this xfer we check if the hardware points to
|
||||
* any of them.
|
||||
*/
|
||||
s = splusb(); /* XXX why? */
|
||||
/* XXX */
|
||||
|
||||
/*
|
||||
* Step 4: Turn on hardware again.
|
||||
*/
|
||||
/* XXX */
|
||||
|
||||
/*
|
||||
* Step 5: Execute callback.
|
||||
*/
|
||||
usb_transfer_complete(xfer);
|
||||
|
||||
splx(s);
|
||||
}
|
||||
|
||||
/************************/
|
||||
|
|
@ -1779,7 +1810,7 @@ ehci_device_ctrl_close(usbd_pipe_handle pipe)
|
|||
/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
|
||||
|
||||
DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
|
||||
ehci_close_pipe(pipe, sc->sc_ctrl_head);
|
||||
ehci_close_pipe(pipe, sc->sc_async_head);
|
||||
/*ehci_free_std(sc, epipe->tail.td);*/
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue