diff --git a/sys/arch/sparc64/dev/iommu.c b/sys/arch/sparc64/dev/iommu.c
index ef04d72a487a..9891b5044568 100644
--- a/sys/arch/sparc64/dev/iommu.c
+++ b/sys/arch/sparc64/dev/iommu.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: iommu.c,v 1.104 2011/07/01 18:48:36 dyoung Exp $	*/
+/*	$NetBSD: iommu.c,v 1.105 2011/10/08 08:49:07 nakayama Exp $	*/
 
 /*
  * Copyright (c) 1999, 2000 Matthew R. Green
@@ -59,7 +59,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iommu.c,v 1.104 2011/07/01 18:48:36 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iommu.c,v 1.105 2011/10/08 08:49:07 nakayama Exp $");
 
 #include "opt_ddb.h"
 
@@ -241,7 +241,7 @@ iommu_reset(struct iommu_state *is)
 			bus_space_write_8(is->is_bustag, is->is_sb[i]->sb_sb,
 				STRBUFREG(strbuf_ctl), STRBUF_EN);
 
-			membar_lookaside();
+			membar_Lookaside();
 
 			/* No streaming buffers? Disable them */
 			if (bus_space_read_8(is->is_bustag,
@@ -366,7 +366,7 @@ iommu_remove(struct iommu_state *is, vaddr_t va, size_t len)
 		 * until the next iommu_enter call.
 		 */
 		is->is_tsb[IOTSBSLOT(va,is->is_tsbsize)] &= ~IOTTE_V;
-		membar_storestore();
+		membar_StoreStore();
 #endif
 		IOMMUREG_WRITE(is, iommu_flush, va);
 
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h
index e8b8d997b004..f44af8519890 100644
--- a/sys/arch/sparc64/include/ctlreg.h
+++ b/sys/arch/sparc64/include/ctlreg.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: ctlreg.h,v 1.55 2011/03/16 02:35:48 mrg Exp $ */
+/*	$NetBSD: ctlreg.h,v 1.56 2011/10/08 08:49:07 nakayama Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath
@@ -900,22 +900,22 @@ dmmu_set_secondary_context(uint ctx)
  * SPARC V9 memory barrier instructions.
  */
 /* Make all stores complete before next store */
-#define	membar_storestore() __asm volatile("membar #StoreStore" : :)
+#define	membar_StoreStore() __asm volatile("membar #StoreStore" : :)
 /* Make all loads complete before next store */ 
-#define	membar_loadstore() __asm volatile("membar #LoadStore" : :)
+#define	membar_LoadStore() __asm volatile("membar #LoadStore" : :)
 /* Make all stores complete before next load */ 
-#define	membar_storeload() __asm volatile("membar #StoreLoad" : :)
+#define	membar_StoreLoad() __asm volatile("membar #StoreLoad" : :)
 /* Make all loads complete before next load */
-#define	membar_loadload() __asm volatile("membar #LoadLoad" : :)
+#define	membar_LoadLoad() __asm volatile("membar #LoadLoad" : :)
 /* Complete all outstanding memory operations and exceptions */
-#define	membar_sync() __asm volatile("membar #Sync" : :)
+#define	membar_Sync() __asm volatile("membar #Sync" : :)
 /* Complete all outstanding memory operations */
-#define	membar_memissue() __asm volatile("membar #MemIssue" : :)
+#define	membar_MemIssue() __asm volatile("membar #MemIssue" : :)
 /* Complete all outstanding stores before any new loads */
-#define	membar_lookaside() __asm volatile("membar #Lookaside" : :)
+#define	membar_Lookaside() __asm volatile("membar #Lookaside" : :)
 
-#define membar_load() __asm volatile("membar #LoadLoad | #LoadStore" : :)
-#define membar_store() __asm volatile("membar #LoadStore | #StoreStore" : :)
+#define membar_Load() __asm volatile("membar #LoadLoad | #LoadStore" : :)
+#define membar_Store() __asm volatile("membar #LoadStore | #StoreStore" : :)
 
 #endif
 
diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c
index 4292217dce95..31ffdf698609 100644
--- a/sys/arch/sparc64/sparc64/cpu.c
+++ b/sys/arch/sparc64/sparc64/cpu.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.100 2011/07/12 07:51:34 mrg Exp $ */
+/*	$NetBSD: cpu.c,v 1.101 2011/10/08 08:49:07 nakayama Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -52,7 +52,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.100 2011/07/12 07:51:34 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.101 2011/10/08 08:49:07 nakayama Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -432,7 +432,7 @@ cpu_boot_secondary_processors(void)
 		cpu_pmap_prepare(ci, false);
 		cpu_args->cb_node = ci->ci_node;
 		cpu_args->cb_cpuinfo = ci->ci_paddr;
-		membar_sync();
+		membar_Sync();
 
 		/* Disable interrupts and start another CPU. */
 		pstate = getpstate();
@@ -441,7 +441,7 @@ cpu_boot_secondary_processors(void)
 		prom_startcpu(ci->ci_node, (void *)cpu_spinup_trampoline, 0);
 
 		for (i = 0; i < 2000; i++) {
-			membar_sync();
+			membar_Sync();
 			if (CPUSET_HAS(cpus_active, ci->ci_index))
 				break;
 			delay(10000);
@@ -450,7 +450,7 @@ cpu_boot_secondary_processors(void)
 		/* synchronize %tick ( to some degree at least ) */
 		delay(1000);
 		sync_tick = 1;
-		membar_sync();
+		membar_Sync();
 		settick(0);
 
 		setpstate(pstate);
@@ -473,7 +473,7 @@ cpu_hatch(void)
 	CPUSET_ADD(cpus_active, cpu_number());
 	cpu_reset_fpustate();
 	curlwp = curcpu()->ci_data.cpu_idlelwp;
-	membar_sync();
+	membar_Sync();
 
 	/* wait for the boot CPU to flip the switch */
 	while (sync_tick == 0) {
diff --git a/sys/arch/sparc64/sparc64/ipifuncs.c b/sys/arch/sparc64/sparc64/ipifuncs.c
index 34bd53d58633..2095523f01b6 100644
--- a/sys/arch/sparc64/sparc64/ipifuncs.c
+++ b/sys/arch/sparc64/sparc64/ipifuncs.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: ipifuncs.c,v 1.42 2011/06/06 02:49:39 mrg Exp $ */
+/*	$NetBSD: ipifuncs.c,v 1.43 2011/10/08 08:49:07 nakayama Exp $ */
 
 /*-
  * Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.42 2011/06/06 02:49:39 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.43 2011/10/08 08:49:07 nakayama Exp $");
 
 #include "opt_ddb.h"
 
@@ -111,9 +111,9 @@ sparc64_do_pause(void)
 	CPUSET_ADD(cpus_paused, cpu_number());
 
 	do {
-		membar_sync();
+		membar_Sync();
 	} while(CPUSET_HAS(cpus_paused, cpu_number()));
-	membar_sync();
+	membar_Sync();
 	CPUSET_ADD(cpus_resumed, cpu_number());
 
 #if defined(DDB)
@@ -229,11 +229,11 @@ sparc64_send_ipi(int upaid, ipifunc_t func, uint64_t arg1, uint64_t arg2)
 		stxa(IDDR_1H, ASI_INTERRUPT_DISPATCH, arg1);
 		stxa(IDDR_2H, ASI_INTERRUPT_DISPATCH, arg2);
 		stxa(IDCR(upaid), ASI_INTERRUPT_DISPATCH, 0);
-		membar_sync();
+		membar_Sync();
 		/* Workaround for SpitFire erratum #54, from FreeBSD */
 		if (CPU_IS_SPITFIRE()) {
 			(void)ldxa(P_DCR_0, ASI_INTERRUPT_RECEIVE_DATA);
-			membar_sync();
+			membar_Sync();
 		}
 
 		for (ik = 0; ik < 1000000; ik++) {
@@ -271,7 +271,7 @@ sparc64_ipi_wait(sparc64_cpuset_t volatile *cpus_watchset, sparc64_cpuset_t cpus
 	uint64_t limit = gettick() + cpu_frequency(curcpu());
 
 	while (gettick() < limit) {
-		membar_sync();
+		membar_Sync();
 		if (CPUSET_EQUAL(*cpus_watchset, cpus_mask))
 			return 0;
 	}
@@ -345,7 +345,7 @@ void
 mp_resume_cpu(int cno)
 {
 	CPUSET_DEL(cpus_paused, cno);
-	membar_sync();
+	membar_Sync();
 }
 
 /*
@@ -358,7 +358,7 @@ mp_resume_cpus(void)
 
 	CPUSET_CLEAR(cpus_resumed);
 	CPUSET_ASSIGN(cpuset, cpus_paused);
-	membar_sync();
+	membar_Sync();
 	CPUSET_CLEAR(cpus_paused);
 
 	/* CPUs awake on cpus_paused clear */
diff --git a/sys/arch/sparc64/sparc64/machdep.c b/sys/arch/sparc64/sparc64/machdep.c
index 29cc34d31a11..1c7fcc8dbefc 100644
--- a/sys/arch/sparc64/sparc64/machdep.c
+++ b/sys/arch/sparc64/sparc64/machdep.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: machdep.c,v 1.261 2011/07/17 23:29:10 dyoung Exp $ */
+/*	$NetBSD: machdep.c,v 1.262 2011/10/08 08:49:07 nakayama Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -71,7 +71,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.261 2011/07/17 23:29:10 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.262 2011/10/08 08:49:07 nakayama Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -1371,7 +1371,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
 		 * Don't really need to do anything, but flush any pending
 		 * writes anyway. 
 		 */
-		membar_sync();
+		membar_Sync();
 	}
 	if (ops & BUS_DMASYNC_POSTREAD) {
 		/* Invalidate the vcache */
diff --git a/sys/arch/sparc64/sparc64/vm_machdep.c b/sys/arch/sparc64/sparc64/vm_machdep.c
index 496d9ebd9030..ae75a875afa1 100644
--- a/sys/arch/sparc64/sparc64/vm_machdep.c
+++ b/sys/arch/sparc64/sparc64/vm_machdep.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: vm_machdep.c,v 1.97 2011/07/01 18:49:24 dyoung Exp $ */
+/*	$NetBSD: vm_machdep.c,v 1.98 2011/10/08 08:49:07 nakayama Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath.  All rights reserved.
@@ -50,7 +50,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.97 2011/07/01 18:49:24 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.98 2011/10/08 08:49:07 nakayama Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -325,7 +325,7 @@ fpusave_lwp(struct lwp *l, bool save)
 
 		spincount = 0;
 		while (ci->ci_fplwp == l) {
-			membar_sync();
+			membar_Sync();
 			spincount++;
 			if (spincount > 10000000)
 				panic("fpusave_lwp ipi didn't");