Include latent support for coherent dma though for now it seems that isn't
possible.
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7065e56460
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@ -1,4 +1,4 @@
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/* $NetBSD: awin_board.c,v 1.8 2014/02/24 16:50:49 matt Exp $ */
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/* $NetBSD: awin_board.c,v 1.9 2014/02/26 00:19:01 matt Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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@ -34,7 +34,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.8 2014/02/24 16:50:49 matt Exp $");
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__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.9 2014/02/26 00:19:01 matt Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -63,6 +63,23 @@ struct arm32_bus_dma_tag awin_dma_tag = {
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_BUS_DMATAG_FUNCS,
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};
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struct arm32_dma_range awin_coherent_dma_ranges[] = {
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[0] = {
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.dr_sysbase = AWIN_SDRAM_PBASE,
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.dr_busbase = AWIN_SDRAM_PBASE,
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.dr_flags = _BUS_DMAMAP_COHERENT,
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},
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};
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struct arm32_bus_dma_tag awin_coherent_dma_tag = {
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._ranges = awin_coherent_dma_ranges,
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._nranges = __arraycount(awin_coherent_dma_ranges),
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_BUS_DMAMAP_FUNCS,
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_BUS_DMAMEM_FUNCS,
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_BUS_DMATAG_FUNCS,
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};
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#ifdef AWIN_CONSOLE_EARLY
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#include <dev/ic/ns16550reg.h>
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#include <dev/ic/comreg.h>
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@ -181,6 +198,14 @@ awin_bootstrap(vaddr_t iobase, vaddr_t uartbase)
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#endif
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}
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#if 0
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void
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awin_dma_bootstrap(psize_t psize)
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{
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awin_coherent_dma_ranges[0].dr_len = psize;
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}
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#endif
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#ifdef MULTIPROCESSOR
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void
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awin_cpu_hatch(struct cpu_info *ci)
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.7 2014/02/25 00:08:29 jmcneill Exp $");
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__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.8 2014/02/26 00:19:01 matt Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -56,6 +56,7 @@ static struct awinio_softc {
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bus_space_handle_t sc_bsh;
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bus_space_handle_t sc_ccm_bsh;
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bus_dma_tag_t sc_dmat;
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bus_dma_tag_t sc_coherent_dmat;
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} awinio_sc;
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CFATTACH_DECL_NEW(awin_io, 0,
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@ -152,6 +153,7 @@ awinio_attach(device_t parent, device_t self, void *aux)
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sc->sc_a4x_bst = &awin_a4x_bs_tag;
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sc->sc_bsh = awin_core_bsh;
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sc->sc_dmat = &awin_dma_tag;
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sc->sc_coherent_dmat = &awin_coherent_dma_tag;
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bus_space_subregion(sc->sc_bst, sc->sc_bsh, AWIN_CCM_OFFSET, 0x1000,
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&sc->sc_ccm_bsh);
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@ -188,6 +190,7 @@ awinio_attach(device_t parent, device_t self, void *aux)
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.aio_core_bsh = sc->sc_bsh,
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.aio_ccm_bsh = sc->sc_ccm_bsh,
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.aio_dmat = sc->sc_dmat,
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.aio_coherent_dmat = sc->sc_coherent_dmat,
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};
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cfdata_t cf = config_search_ia(awinio_find,
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sc->sc_dev, "awinio", &aio);
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@ -1,4 +1,4 @@
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/* $NetBSD: awin_var.h,v 1.8 2014/02/25 00:08:29 jmcneill Exp $ */
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/* $NetBSD: awin_var.h,v 1.9 2014/02/26 00:19:01 matt Exp $ */
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/*-
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* Copyright (c) 2013 The NetBSD Foundation, Inc.
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* All rights reserved.
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@ -58,6 +58,7 @@ struct awinio_attach_args {
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bus_space_handle_t aio_core_bsh;
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bus_space_handle_t aio_ccm_bsh;
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bus_dma_tag_t aio_dmat;
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bus_dma_tag_t aio_coherent_dmat;
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};
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struct awin_gpio_pinset {
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@ -75,9 +76,11 @@ extern struct bus_space awin_bs_tag;
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extern struct bus_space awin_a4x_bs_tag;
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extern bus_space_handle_t awin_core_bsh;
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extern struct arm32_bus_dma_tag awin_dma_tag;
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extern struct arm32_bus_dma_tag awin_coherent_dma_tag;
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psize_t awin_memprobe(void);
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void awin_bootstrap(vaddr_t, vaddr_t);
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void awin_dma_bootstrap(psize_t);
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void awin_pll6_enable(void);
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void awin_cpu_hatch(struct cpu_info *);
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