Implement port reset sequence correctly.
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bdb84bd0cd
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b2b2b2b448
@ -1,4 +1,4 @@
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/* $NetBSD: ehci.c,v 1.7 2001/11/16 15:33:13 augustss Exp $ */
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/* $NetBSD: ehci.c,v 1.8 2001/11/16 23:52:10 augustss Exp $ */
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/*
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -47,7 +47,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.7 2001/11/16 15:33:13 augustss Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.8 2001/11/16 23:52:10 augustss Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -310,6 +310,17 @@ ehci_init(ehci_softc_t *sc)
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/* Take over port ownership */
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EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
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for (i = 0; i < 100; i++) {
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delay(10);
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hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
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if (!hcr)
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break;
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}
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if (hcr) {
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printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
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return (USBD_IOERROR);
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}
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return (USBD_NORMAL_COMPLETION);
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}
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@ -597,13 +608,11 @@ OOO
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void
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ehci_shutdown(void *v)
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{
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//ehci_softc_t *sc = v;
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ehci_softc_t *sc = v;
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DPRINTF(("ehci_shutdown: stopping the HC\n"));
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#if 0
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OOO
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OWRITE4(sc, EHCI_CONTROL, EHCI_HCFS_RESET);
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#endif
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EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
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EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
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}
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usbd_status
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@ -1186,20 +1195,29 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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ehci_disown(sc, index, 1);
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break;
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}
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/* Start reset sequence. */
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v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
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EOWRITE4(sc, port, v | EHCI_PS_PR);
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for (i = 0; i < 10; i++) {
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usb_delay_ms(&sc->sc_bus, 10); /* XXX */
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v = EOREAD4(sc, port);
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if ((v & EHCI_PS_PR) == 0)
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break;
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/* Wait for reset to complete. */
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usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2);
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/* Terminate reset sequence. */
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EOWRITE4(sc, port, v);
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/* Wait for HC to complete reset. */
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usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2);
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v = EOREAD4(sc, port);
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DPRINTF(("ehci after reset, status=0x%08x\n", v));
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if (v & EHCI_PS_PR) {
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printf("%s: port reset timeout\n",
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USBDEVNAME(sc->sc_bus.bdev));
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return (USBD_TIMEOUT);
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}
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if ((v & EHCI_PS_PE) == 0) {
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if (!(v & EHCI_PS_PE)) {
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/* Not a high speed device, give up ownership.*/
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ehci_disown(sc, index, 0);
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break;
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}
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sc->sc_isreset = 1;
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DPRINTF(("ehci port %d reset, status = 0x%04x\n",
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DPRINTF(("ehci port %d reset, status = 0x%08x\n",
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index, v));
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break;
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case UHF_PORT_POWER:
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@ -1,4 +1,4 @@
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/* $NetBSD: ehcireg.h,v 1.7 2001/11/16 15:33:13 augustss Exp $ */
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/* $NetBSD: ehcireg.h,v 1.8 2001/11/16 23:52:10 augustss Exp $ */
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/*
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -165,6 +165,8 @@
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#define EHCI_PS_CS 0x00000001 /* RO connect status */
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#define EHCI_PS_CLEAR (EHCI_PS_OCC|EHCI_PS_PEC|EHCI_PS_CSC)
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#define EHCI_PORT_RESET_COMPLETE 2 /* ms */
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#define EHCI_FLALIGN_ALIGN 0x1000
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typedef u_int32_t ehci_link_t;
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