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Cleanup OMAP2 files. Change most omap2430* to omap2_*. This is in 

preperation for the OMAP 3530 (OMAP 3) support.  Some 3530 definitions
added.
This commit is contained in:
matt 2008-08-27 11:03:09 +00:00
parent c041c3f557
commit b1623157a5
24 changed files with 277 additions and 232 deletions
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18
sys/arch/arm/omap/files.omap2
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@ -1,6 +1,6 @@
# $NetBSD: files.omap2,v 1.2 2008/04/27 18:58:45 matt Exp $ # $NetBSD: files.omap2,v 1.3 2008/08/27 11:03:10 matt Exp $
# #
# Configuration info for Texas Instruments OMAP2 CPU support # Configuration info for Texas Instruments OMAP2/OMAP3 CPU support
# Based on xscale/files.pxa2x0 # Based on xscale/files.pxa2x0
# #
@ -12,8 +12,10 @@ file arch/arm/arm32/irq_dispatch.S
defparam opt_omap.h MEMSIZE defparam opt_omap.h MEMSIZE
defparam opt_omap.h OMAP_EMIFF_PBASE OMAP_EMIFF_SIZE defparam opt_omap.h OMAP_EMIFF_PBASE OMAP_EMIFF_SIZE
defflag opt_omap.h OMAP2 defflag opt_omap.h OMAP2
defflag opt_omap.h OMAP3: OMAP2
defflag opt_omap.h OMAP_2430: OMAP2 defflag opt_omap.h OMAP_2430: OMAP2
defflag opt_omap.h OMAP_2420: OMAP2 defflag opt_omap.h OMAP_2420: OMAP2
defflag opt_omap.h OMAP_3530: OMAP3
# OBIO just an attach point # OBIO just an attach point
device obio { [addr=-1], [size=0], [intr=-1], [mult=1], [intrbase=-1], [nobyteacc=0] device obio { [addr=-1], [size=0], [intr=-1], [mult=1], [intrbase=-1], [nobyteacc=0]
@ -31,21 +33,21 @@ file arch/arm/xscale/pxa2x0_a4x_io.S obio
# OMAP2 interrupt controller # OMAP2 interrupt controller
device omapicu: pic device omapicu: pic
attach omapicu at obio with omap2icu attach omapicu at obio with omap2icu
file arch/arm/omap/omap2_icu.c omap2 & omapicu file arch/arm/omap/omap2_icu.c (omap2 | omap3) & omapicu
file arch/arm/omap/omap2430_intr.c omap2 & !omapicu file arch/arm/omap/omap2430_intr.c omap2 & !omapicu
# OMAP2 GPIO controllers # OMAP2 GPIO controllers
device omapgpio: gpiobus device omapgpio: gpiobus
attach omapgpio at obio with omap2gpio attach omapgpio at obio with omap2gpio
file arch/arm/omap/omap2_gpio.c omap2 & omapgpio file arch/arm/omap/omap2_gpio.c (omap2 | omap3) & omapgpio
# OMAP 2430 General Purpose Timer # OMAP 2430 General Purpose Timer
device omap2430mputmr device omapmputmr
file arch/arm/omap/omap2430_mputmr.c omap2430mputmr file arch/arm/omap/omap2_mputmr.c omapmputmr
defparam opt_omap.h OMAP_GP_TIMER_CLOCK_FREQ defparam opt_omap.h OMAP_GP_TIMER_CLOCK_FREQ
# OBIO/2430 GP Timer # OBIO/2430 GP Timer
attach omap2430mputmr at obio with obiomputmr attach omapmputmr at obio with obiomputmr
file arch/arm/omap/obio_mputmr.c obiomputmr file arch/arm/omap/obio_mputmr.c obiomputmr
# Dual Mode (General Purpose) Timer # Dual Mode (General Purpose) Timer
@ -66,7 +68,7 @@ file arch/arm/omap/obio_wdt.c obiowdt32k
device L3i { [addr=-1], [size=0], [intr=-1], [mult=1], [nobyteacc=0] device L3i { [addr=-1], [size=0], [intr=-1], [mult=1], [nobyteacc=0]
} : bus_space_generic } : bus_space_generic
attach L3i at mainbus attach L3i at mainbus
file arch/arm/omap/omap2_l3i.c omap2 file arch/arm/omap/omap2_l3i.c omap2 | omap3
# General Purpose Memory Controller # General Purpose Memory Controller
# XXX some addl. chip select config parms may be desired here (e.g. timing) # XXX some addl. chip select config parms may be desired here (e.g. timing)

8
sys/arch/arm/omap/obio_com.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: obio_com.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Based on arch/arm/omap/omap_com.c * Based on arch/arm/omap/omap_com.c
@ -39,7 +39,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
#include "opt_omap.h" #include "opt_omap.h"
#include "opt_com.h" #include "opt_com.h"
@ -55,8 +55,8 @@ __KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
#include <dev/ic/comreg.h> #include <dev/ic/comreg.h>
#include <dev/ic/comvar.h> #include <dev/ic/comvar.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#include <arm/omap/omap_com.h> #include <arm/omap/omap_com.h>
#include "locators.h" #include "locators.h"

8
sys/arch/arm/omap/obio_mputmr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: obio_mputmr.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Based on omap_mputmr.c * Based on omap_mputmr.c
@ -101,7 +101,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
#include "opt_omap.h" #include "opt_omap.h"
#include "opt_cpuoptions.h" #include "opt_cpuoptions.h"
@ -118,13 +118,13 @@ __KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $")
#include <machine/bus.h> #include <machine/bus.h>
#include <machine/intr.h> #include <machine/intr.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
#include <arm/omap/omap2_mputmrvar.h> #include <arm/omap/omap2_mputmrvar.h>
#include <arm/omap/omap2_mputmrreg.h> #include <arm/omap/omap2_mputmrreg.h>
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#ifndef OMAP_MPU_TIMER_CLOCK_FREQ #ifndef OMAP_MPU_TIMER_CLOCK_FREQ
#error Specify the timer frequency in Hz with the OMAP_MPU_TIMER_CLOCK_FREQ option. #error Specify the timer frequency in Hz with the OMAP_MPU_TIMER_CLOCK_FREQ option.

4
sys/arch/arm/omap/obio_wdt.c
View File

@ -33,7 +33,7 @@
#include "opt_omap.h" #include "opt_omap.h"
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.2 2008/04/27 18:58:45 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
#include <sys/param.h> #include <sys/param.h>
#include <sys/callout.h> #include <sys/callout.h>
@ -47,7 +47,7 @@ __KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
#include <machine/bus.h> #include <machine/bus.h>
#include <dev/sysmon/sysmonvar.h> #include <dev/sysmon/sysmonvar.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
#include <arm/omap/omap_wdtvar.h> #include <arm/omap/omap_wdtvar.h>
#include <arm/omap/omap_wdtreg.h> #include <arm/omap/omap_wdtreg.h>

7
sys/arch/arm/omap/omap2430_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2430_intr.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Define the SDP2430 specific information and then include the generic OMAP * Define the SDP2430 specific information and then include the generic OMAP
* interrupt header. * interrupt header.
@ -35,7 +35,7 @@
#include "opt_omap.h" #include "opt_omap.h"
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
#include <sys/param.h> #include <sys/param.h>
#include <sys/evcnt.h> #include <sys/evcnt.h>
@ -48,8 +48,7 @@ __KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $
#include <arm/armreg.h> #include <arm/armreg.h>
#include <arm/cpufunc.h> #include <arm/cpufunc.h>
#include <machine/atomic.h> #include <machine/atomic.h>
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#include <arm/omap/omap2430reg.h>
#include <machine/bus.h> #include <machine/bus.h>

42
sys/arch/arm/omap/omap2430obioreg.h
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@ -1,42 +0,0 @@
/* $NetBSD: omap2430obioreg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2007 Microsoft
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Microsoft
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _OMAP2430OBIOREG_H
#define _OMAP2430OBIOREG_H
#include <arm/omap/omap2430reg.h>
#define OMAP2430_OBIO_0_BASE OMAP2430_L4_CORE_BASE
#define OMAP2430_OBIO_0_SIZE OMAP2430_L4_CORE_SIZE
#define OMAP2430_OBIO_1_BASE OMAP2430_L4_WAKEUP_BASE
#define OMAP2430_OBIO_1_SIZE OMAP2430_L4_WAKEUP_SIZE
#endif /* _OMAP2430OBIOREG_H */

42
sys/arch/arm/omap/omap2_gpio.c
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@ -1,4 +1,4 @@
/* $NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $ */ /* $NetBSD: omap2_gpio.c,v 1.5 2008/08/27 11:03:10 matt Exp $ */
/*- /*-
* Copyright (c) 2007 The NetBSD Foundation, Inc. * Copyright (c) 2007 The NetBSD Foundation, Inc.
* All rights reserved. * All rights reserved.
@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.5 2008/08/27 11:03:10 matt Exp $");
#define _INTR_PRIVATE #define _INTR_PRIVATE
@ -50,8 +50,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $");
#include <machine/atomic.h> #include <machine/atomic.h>
#include <machine/bus.h> #include <machine/bus.h>
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
#include <arm/pic/picvar.h> #include <arm/pic/picvar.h>
#if NGPIO > 0 #if NGPIO > 0
@ -323,23 +323,33 @@ gpio_match(device_t parent, cfdata_t cfdata, void *aux)
struct obio_attach_args *oa = aux; struct obio_attach_args *oa = aux;
#ifdef OMAP_2420 #ifdef OMAP_2420
if (oa->obio_addr != GPIO1_BASE_2420 if (oa->obio_addr == GPIO1_BASE_2420
&& oa->obio_addr != GPIO2_BASE_2420 || oa->obio_addr == GPIO2_BASE_2420
&& oa->obio_addr != GPIO3_BASE_2420 || oa->obio_addr == GPIO3_BASE_2420
&& oa->obio_addr != GPIO4_BASE_2420) || oa->obio_addr == GPIO4_BASE_2420)
return 0; return 1;
#endif #endif
#ifdef OMAP_2430 #ifdef OMAP_2430
if (oa->obio_addr != GPIO1_BASE_2430 if (oa->obio_addr == GPIO1_BASE_2430
&& oa->obio_addr != GPIO2_BASE_2430 || oa->obio_addr == GPIO2_BASE_2430
&& oa->obio_addr != GPIO3_BASE_2430 || oa->obio_addr == GPIO3_BASE_2430
&& oa->obio_addr != GPIO4_BASE_2430 || oa->obio_addr == GPIO4_BASE_2430
&& oa->obio_addr != GPIO5_BASE_2430) || oa->obio_addr == GPIO5_BASE_2430)
return 0; return 1;
#endif #endif
return 1; #ifdef OMAP_3530
if (oa->obio_addr == GPIO1_BASE_3530
|| oa->obio_addr == GPIO2_BASE_3530
|| oa->obio_addr == GPIO3_BASE_3530
|| oa->obio_addr == GPIO4_BASE_3530
|| oa->obio_addr == GPIO5_BASE_3530
|| oa->obio_addr == GPIO6_BASE_3530)
return 1;
#endif
return 0;
} }
void void

10
sys/arch/arm/omap/omap2_gpmc.c
View File

@ -1,7 +1,7 @@
/* $Id: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $Id: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* adapted from: */ /* adapted from: */
/* $NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $NetBSD: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* /*
@ -102,7 +102,7 @@
#include "opt_omap.h" #include "opt_omap.h"
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
#include "locators.h" #include "locators.h"
@ -119,8 +119,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $"
#include <arm/mainbus/mainbus.h> #include <arm/mainbus/mainbus.h>
#include <arm/omap/omap_var.h> #include <arm/omap/omap_var.h>
#include <arm/omap/omap2430gpmcreg.h> #include <arm/omap/omap2_gpmcreg.h>
#include <arm/omap/omap2430gpmcvar.h> #include <arm/omap/omap2_gpmcvar.h>
typedef struct { typedef struct {
boolean_t cs_valid; boolean_t cs_valid;

2
sys/arch/arm/omap/omap2430gpmcreg.h → sys/arch/arm/omap/omap2_gpmcreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430gpmcreg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_gpmcreg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
* All rights reserved. * All rights reserved.

2
sys/arch/arm/omap/omap2430gpmcvar.h → sys/arch/arm/omap/omap2_gpmcvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430gpmcvar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_gpmcvar.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
* All rights reserved. * All rights reserved.

16
sys/arch/arm/omap/omap2_icu.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $ */ /* $NetBSD: omap2_icu.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Define the SDP2430 specific information and then include the generic OMAP * Define the SDP2430 specific information and then include the generic OMAP
* interrupt header. * interrupt header.
@ -30,7 +30,7 @@
#define _INTR_PRIVATE #define _INTR_PRIVATE
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
#include <sys/param.h> #include <sys/param.h>
#include <sys/evcnt.h> #include <sys/evcnt.h>
@ -45,8 +45,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $");
#include <arm/cpufunc.h> #include <arm/cpufunc.h>
#include <arm/atomic.h> #include <arm/atomic.h>
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
#define INTC_READ(sc, g, o) \ #define INTC_READ(sc, g, o) \
@ -169,7 +169,13 @@ omap2icu_match(device_t parent, cfdata_t cf, void *aux)
{ {
struct obio_attach_args * const oa = aux; struct obio_attach_args * const oa = aux;
return (oa->obio_addr == INTC_BASE); #if defined(OMAP_2430) || defined(OMAP_2420)
return oa->obio_addr == INTC_BASE;
#elif defined(OMAP3530)
return oa->obio_addr == INTC_BASE_3530;
#else
#error unsupported OMAP variant
#endif
} }
void void

44
sys/arch/arm/omap/omap2_intr.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2_intr.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_intr.h,v 1.3 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Define the SDP2430 specific information and then include the generic OMAP * Define the SDP2430 specific information and then include the generic OMAP
@ -47,11 +47,16 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
#define IRQ_COMMTX 2 /* MPU emulation (1) */ #define IRQ_COMMTX 2 /* MPU emulation (1) */
#define IRQ_BENCH 3 /* MPU emulation (1) */ #define IRQ_BENCH 3 /* MPU emulation (1) */
#define IRQ_XTI 4 /* (2430) XTI module (2) (3) */ #define IRQ_XTI 4 /* (2430) XTI module (2) (3) */
#define IRQ_MCBSP2_ST 4 /* (3530) Sidetone MCBSP2 overflow */
#define IRQ_XTI_WKUP 5 /* (2430) XTI module (3) */ #define IRQ_XTI_WKUP 5 /* (2430) XTI module (3) */
#define IRQ_MCBSP3_ST 5 /* (3530) Sidetone MCBSP3 overflow */
#define IRQ_SSM_ABORT 6 /* (2430) MPU subsystem secure state-machine abort */ #define IRQ_SSM_ABORT 6 /* (2430) MPU subsystem secure state-machine abort */
#define IRQ_SYS_nIRQ0 7 /* External interrupt (active low) */ #define IRQ_SYS_nIRQ0 7 /* External interrupt (active low) */
#define IRQ_D2D_FW_STACKED 8 /* (2430) Occurs when modem does a security violation and has been automatically put DEVICE_SECURITY [0] under reset. */ #define IRQ_D2D_FW_STACKED 8 /* (2430) Occurs when modem does a security violation and has been automatically put DEVICE_SECURITY [0] under reset. */
#define IRQ_RSVD8 8 /* (3530) */
#define IRQ_SMX_DBG 9 /* (3530) SMX error for debug */
#define IRQ_RSVD9 9 /* Reserved */ #define IRQ_RSVD9 9 /* Reserved */
#define IRQ_SMX_APP 10 /* (3530) SMX error for application */
#define IRQ_L3 10 /* (2420) L2 interconnect (transaction error) */ #define IRQ_L3 10 /* (2420) L2 interconnect (transaction error) */
#define IRQ_SMX_APE_IA_ARM1136 10 /* (2430) Error flag for reporting application and unknown errors from SMX-APE (4) rd_wrSError_o */ #define IRQ_SMX_APE_IA_ARM1136 10 /* (2430) Error flag for reporting application and unknown errors from SMX-APE (4) rd_wrSError_o */
#define IRQ_PRCM_MPU 11 /* PRCM */ #define IRQ_PRCM_MPU 11 /* PRCM */
@ -62,25 +67,33 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
#define IRQ_McBSP2_COMMON 16 /* (2430) McBSP2 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */ #define IRQ_McBSP2_COMMON 16 /* (2430) McBSP2 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
#define IRQ_McBSP3_COMMON 17 /* (2430) McBSP3 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */ #define IRQ_McBSP3_COMMON 17 /* (2430) McBSP3 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
#define IRQ_McBSP4_COMMON 18 /* (2430) McBSP4 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */ #define IRQ_McBSP4_COMMON 18 /* (2430) McBSP4 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
#define IRQ_SR1 18 /* (3530) SmartReflex 1 */
#define IRQ_McBSP5_COMMON 19 /* (2430) McBSP5 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */ #define IRQ_McBSP5_COMMON 19 /* (2430) McBSP5 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
#define IRQ_SR2 19 /* (3530) SmartReflex 2 */
#define IRQ_GPMC 20 /* General-purpose memory controller module */ #define IRQ_GPMC 20 /* General-purpose memory controller module */
#define IRQ_GFX 21 /* (2430) 2D/3D graphics module */ #define IRQ_GFX 21 /* (2430) 2D/3D graphics module */
#define IRQ_RSVD22 22 /* Reserved */ #define IRQ_RSVD22 22 /* Reserved */
#define IRQ_MCBSP3 22 /* McBSP module 3 */
#define IRQ_EAC 23 /* Audio Controller (2420) */ #define IRQ_EAC 23 /* Audio Controller (2420) */
#define IRQ_MCBSP4 22 /* McBSP module 4 */
#define IRQ_CAM0 24 /* Camera interface interrupt request 0 */ #define IRQ_CAM0 24 /* Camera interface interrupt request 0 */
#define IRQ_DSS 25 /* Display subsystem module (5) */ #define IRQ_DSS 25 /* Display subsystem module (5) */
#define IRQ_MAIL_U0_MPU 26 /* Mailbox user 0 interrupt request */ #define IRQ_MAIL_U0_MPU 26 /* Mailbox user 0 interrupt request */
#define IRQ_DSP_UMA 27 /* (2420) DSP UMA core s/w interrupt */ #define IRQ_DSP_UMA 27 /* (2420) DSP UMA core s/w interrupt */
#define IRQ_MCBSP5 27 /* McBSP module 5 */
#define IRQ_DSP_MMU 28 /* (2420) DSP MMU interrupt */ #define IRQ_DSP_MMU 28 /* (2420) DSP MMU interrupt */
#define IRQ_IVA2_MMU 28 /* (2430) IVA2 MMU interrupt */ #define IRQ_IVA2_MMU 28 /* (2430) IVA2 MMU interrupt */
#define IRQ_GPIO1_MPU 29 /* GPIO module 1 (5) (3) */ #define IRQ_GPIO1_MPU 29 /* GPIO module 1 (5) (3) */
#define IRQ_GPIO2_MPU 30 /* GPIO module 2 (5) (3) */ #define IRQ_GPIO2_MPU 30 /* GPIO module 2 (5) (3) */
#define IRQ_GPIO3_MPU 31 /* GPIO module 3 (5) (3) */ #define IRQ_GPIO3_MPU 31 /* GPIO module 3 (5) (3) */
#define IRQ_GPIO4_MPU 32 /* GPIO module 4 (5) (3) */ #define IRQ_GPIO4_MPU 32 /* GPIO module 4 (5) (3) */
#define IRQ_GPIO5_MPU 33 /* (2430) GPIO module 5 */ #define IRQ_GPIO5_MPU 33 /* (2430/2530) GPIO module 5 */
#define IRQ_GPIO6_MPU 34 /* (3530) GPIO module 5 */
#define IRQ_MAIL_U2_MPU 34 /* (2420) Mailbox user 2 */ #define IRQ_MAIL_U2_MPU 34 /* (2420) Mailbox user 2 */
#define IRQ_WDT3 35 /* (2420) Watchdog timer module 3 overflow */ #define IRQ_WDT3 35 /* (2420) Watchdog timer module 3 overflow */
#define IRQ_USIM 35 /* (3530) USIM interrupt (HS devices only) */
#define IRQ_WDT4 36 /* (2420) Watchdog timer module 4 overflow */ #define IRQ_WDT4 36 /* (2420) Watchdog timer module 4 overflow */
#define IRQ_WDT3_3530 36 /* (3530) Watchdog timer module 3 overflow */
#define IRQ_IVA2WDT 36 /* (2430) IVA2 watchdog timer interrupt */ #define IRQ_IVA2WDT 36 /* (2430) IVA2 watchdog timer interrupt */
#define IRQ_GPT1 37 /* General-purpose timer module 1 */ #define IRQ_GPT1 37 /* General-purpose timer module 1 */
#define IRQ_GPT2 38 /* General-purpose timer module 2 */ #define IRQ_GPT2 38 /* General-purpose timer module 2 */
@ -94,7 +107,9 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
#define IRQ_GPT10 46 /* General-purpose timer module 10 */ #define IRQ_GPT10 46 /* General-purpose timer module 10 */
#define IRQ_GPT11 47 /* General-purpose timer module 11 (PWM) */ #define IRQ_GPT11 47 /* General-purpose timer module 11 (PWM) */
#define IRQ_GPT12 48 /* General-purpose timer module 12 (PWM) */ #define IRQ_GPT12 48 /* General-purpose timer module 12 (PWM) */
#define IRQ_SPI4_IRQ 48 /* (3530) McSPI module 4 */
#define IRQ_RSVD49 49 /* Reserved */ #define IRQ_RSVD49 49 /* Reserved */
#define IRQ_SHA1MD5_2 49 /* (350) SHA-1/MD5 crypto-accelerator 2 */
#define IRQ_PKA 50 /* (2430) PKA crypto-accelerator */ #define IRQ_PKA 50 /* (2430) PKA crypto-accelerator */
#define IRQ_SHA1MD5 51 /* (2430) SHA-1/MD5 crypto-accelerator */ #define IRQ_SHA1MD5 51 /* (2430) SHA-1/MD5 crypto-accelerator */
#define IRQ_RNG 52 /* (2430) RNG module */ #define IRQ_RNG 52 /* (2430) RNG module */
@ -107,9 +122,11 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
#define IRQ_McBSP1_TX 59 /* McBSP module 1 transmit (5) */ #define IRQ_McBSP1_TX 59 /* McBSP module 1 transmit (5) */
#define IRQ_McBSP1_RX 60 /* McBSP module 1 receive (5) */ #define IRQ_McBSP1_RX 60 /* McBSP module 1 receive (5) */
#define IRQ_MCBSP1_OVR 61 /* (2430) McBSP module 1 overflow interrupt (5) */ #define IRQ_MCBSP1_OVR 61 /* (2430) McBSP module 1 overflow interrupt (5) */
#define IRQ_I2C3 61 /* (3530) I2C module 3 */
#define IRQ_McBSP2_TX 62 /* McBSP module 2 transmit (5) */ #define IRQ_McBSP2_TX 62 /* McBSP module 2 transmit (5) */
#define IRQ_McBSP2_RX 63 /* McBSP module 2 receive (5) */ #define IRQ_McBSP2_RX 63 /* McBSP module 2 receive (5) */
#define IRQ_McBSP1_COMMON 64 /* (2430) McBSP1 common IRQ. This IRQ regroups all the interrupt sources of the McBSPLP. Not backward compatible with previous McBSP. */ #define IRQ_McBSP1_COMMON 64 /* (2430) McBSP1 common IRQ. This IRQ regroups all the interrupt sources of the McBSPLP. Not backward compatible with previous McBSP. */
#define IRQ_FPKA_ERROR 64 /* (3530) PKA crypto-accelerator */
#define IRQ_SPI1 65 /* McSPI module 1 */ #define IRQ_SPI1 65 /* McSPI module 1 */
#define IRQ_SPI2 66 /* McSPI module 2 */ #define IRQ_SPI2 66 /* McSPI module 2 */
#define IRQ_SSI_P1_MPU0 67 /* (2430) Dual SSI port 1 interrupt request 0 (5) */ #define IRQ_SSI_P1_MPU0 67 /* (2430) Dual SSI port 1 interrupt request 0 (5) */
@ -120,27 +137,34 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
#define IRQ_UART1 72 /* UART module 1 (3) */ #define IRQ_UART1 72 /* UART module 1 (3) */
#define IRQ_UART2 73 /* UART module 2 (3) */ #define IRQ_UART2 73 /* UART module 2 (3) */
#define IRQ_UART3 74 /* UART module 3 (also infrared) (5) (3) */ #define IRQ_UART3 74 /* UART module 3 (also infrared) (5) (3) */
#define IRQ_PBIAS 75 /* (3530) Merged intr. for PBIASite 1 & 2 */
#define IRQ_USB_GEN 75 /* USB device general interrupt (3) */ #define IRQ_USB_GEN 75 /* USB device general interrupt (3) */
#define IRQ_OCHI 76 /* (3530) OHCI controller HSUSB MP Host Interrupt */
#define IRQ_USB_NISO 76 /* USB device non-ISO (3) */ #define IRQ_USB_NISO 76 /* USB device non-ISO (3) */
#define IRQ_EHCI 77 /* (3530) EHCI controller HSUSB MP Host Interrupt */
#define IRQ_USB_ISO 77 /* USB device ISO (3) */ #define IRQ_USB_ISO 77 /* USB device ISO (3) */
#define IRQ_TLL 78 /* (3530) HSUSB MP TLL interrupt (3) */
#define IRQ_USB_HGEN 78 /* USB host general interrupt (3) */ #define IRQ_USB_HGEN 78 /* USB host general interrupt (3) */
#define IRQ_PARTHASH 79 /* (3530) SHA2/MD5 accel 1 */
#define IRQ_USB_HSOF 79 /* USB host start-of-frame (3) */ #define IRQ_USB_HSOF 79 /* USB host start-of-frame (3) */
#define IRQ_USB_OTG 80 /* USB OTG */ #define IRQ_USB_OTG 80 /* USB OTG */
#define IRQ_MCBSP5_TX 81 /* (2430) McBSP module 5 transmit (5) */ #define IRQ_MCBSP5_TX 81 /* (2430/3530) McBSP module 5 transmit (5) */
#define IRQ_MCBSP5_RX 82 /* (2430) McBSP module 5 receive (5) */ #define IRQ_MCBSP5_RX 82 /* (2430/3530) McBSP module 5 receive (5) */
#define IRQ_MMC1 83 /* (2430) MMC/SD module 1 (3) */ #define IRQ_MMC1 83 /* (2430/3530) MMC/SD module 1 (3) */
#define IRQ_MS 84 /* (2430) MS-PRO module */ #define IRQ_MS 84 /* (2430/3530) MS-PRO module */
#define IRQ_FAC 85 /* (2430) FAC module */ #define IRQ_FAC 85 /* (2430) FAC module */
#define IRQ_MMC2 86 /* (2430) MMC/SD module 2 */ #define IRQ_MMC2 86 /* (2430/3530) MMC/SD module 2 */
#define IRQ_ARM11_ICR 87 /* (2430) ARM11 ICR interrupt */ #define IRQ_ARM11_ICR 87 /* (2430) ARM11 ICR interrupt */
#define IRQ_MPU_ICR 87 /* (3530) MPU ICR interrupt */
#define IRQ_D2DFRINT 88 /* (2430) From 3G coprocessor hardware when used in chassis mode */ #define IRQ_D2DFRINT 88 /* (2430) From 3G coprocessor hardware when used in chassis mode */
#define IRQ_MCBSP3_TX 89 /* (2430) McBSP module 3 transmit (5) */ #define IRQ_MCBSP3_TX 89 /* (2430) McBSP module 3 transmit (5) */
#define IRQ_MCBSP3_RX 90 /* (2430) McBSP module 3 receive (5) */ #define IRQ_MCBSP3_RX 90 /* (2430) McBSP module 3 receive (5) */
#define IRQ_SPI3 91 /* (2430) Module McSPI 3 */ #define IRQ_SPI3 91 /* (2430) Module McSPI 3 */
#define IRQ_HS_USB_MC 92 /* (2430) Module HS USB OTG controller (3) */ #define IRQ_HS_USB_MC 92 /* (2430) Module HS USB OTG controller (3) */
#define IRQ_HS_USB_DMA 93 /* (2430) Module HS USB OTG DMA controller interrupt (3) */ #define IRQ_HS_USB_MC 92 /* (2430) Module HS USB OTG controller (3) */
#define IRQ_Carkit 94 /* (2430) Carkit interrupt when the external HS USB transceiver is used in carkit mode (2) */ #define IRQ_Carkit 94 /* (2430) Carkit interrupt when the external HS USB transceiver is used in carkit mode (2) */
#define IRQ_RSVD95 95 /* Reserved */ #define IRQ_MMC3 94 /* (3530) MMC/SD module 3 */
#define IRQ_GPT12_3530 95 /* (3530) GPT12 */
#define PIC_MAXSOURCES 96 #define PIC_MAXSOURCES 96
#define PIC_MAXMAXSOURCES (96+160) #define PIC_MAXMAXSOURCES (96+160)

24
sys/arch/arm/omap/omap2_l3i.c
View File

@ -1,7 +1,7 @@
/* $Id: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $Id: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* adapted from: */ /* adapted from: */
/* $NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $NetBSD: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* /*
@ -103,7 +103,7 @@
#include "opt_omap.h" #include "opt_omap.h"
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
#include "locators.h" #include "locators.h"
@ -120,10 +120,10 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $")
#include <arm/mainbus/mainbus.h> #include <arm/mainbus/mainbus.h>
#include <arm/omap/omap_var.h> #include <arm/omap/omap_var.h>
#if defined(OMAP2) #if defined(OMAP2) || defined(OMAP3)
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
#ifdef NOTYET #ifdef NOTYET
#include <arm/omap/omap2430var.h> #include <arm/omap/omap2_var.h>
#endif #endif
#else #else
/* /*
@ -160,7 +160,7 @@ static int L3i_print(void *, const char *);
#endif #endif
#define TARGET_AGENT_REGS_ENTRY(reg) \ #define TARGET_AGENT_REGS_ENTRY(reg) \
{ .offset = OMAP2430_TA_ ## reg, \ { .offset = OMAP2_TA_ ## reg, \
.decode = L3i_decode_ta_ ## reg, \ .decode = L3i_decode_ta_ ## reg, \
.name = #reg } .name = #reg }
struct { struct {
@ -211,8 +211,8 @@ L3i_attach(struct device *parent, struct device *self, void *aux)
L3i_attached = 1; L3i_attached = 1;
#ifdef L3I_DEBUG #ifdef L3I_DEBUG
L3i_target_agent_check(sc, (bus_addr_t)OMAP2430_TA_L4_CORE, "L4 core"); L3i_target_agent_check(sc, (bus_addr_t)OMAP2_TA_L4_CORE, "L4 core");
L3i_target_agent_check(sc, (bus_addr_t)OMAP2430_TA_GPMC, "GPMC"); L3i_target_agent_check(sc, (bus_addr_t)OMAP2_TA_GPMC, "GPMC");
#endif #endif
#ifdef NOTYET #ifdef NOTYET
@ -369,15 +369,15 @@ L3i_search(struct device *parent, struct cfdata *cf,
aa.L3i_intr = cf->cf_loc[L3iCF_INTR]; aa.L3i_intr = cf->cf_loc[L3iCF_INTR];
#if defined(OMAP2) #if defined(OMAP2)
if ((aa.L3i_addr >= OMAP2430_L3i_BASE) if ((aa.L3i_addr >= OMAP2_L3i_BASE)
&& (aa.L3i_addr < (OMAP2430_L4_CORE_BASE + OMAP2430_L3i_SIZE))) { && (aa.L3i_addr < (OMAP2_L4_CORE_BASE + OMAP2_L3i_SIZE))) {
/* XXX /* XXX
* if size was specified, then check it too * if size was specified, then check it too
* otherwise just assume it is OK * otherwise just assume it is OK
*/ */
if ((aa.L3i_size != L3iCF_SIZE_DEFAULT) if ((aa.L3i_size != L3iCF_SIZE_DEFAULT)
&& ((aa.L3i_addr + aa.L3i_size) && ((aa.L3i_addr + aa.L3i_size)
>= (OMAP2430_L4_CORE_BASE + OMAP2430_L3i_SIZE))) >= (OMAP2_L4_CORE_BASE + OMAP2_L3i_SIZE)))
return 1; /* NG */ return 1; /* NG */
if (config_match(parent, cf, &aa)) { if (config_match(parent, cf, &aa)) {
config_attach(parent, cf, &aa, L3i_print); config_attach(parent, cf, &aa, L3i_print);

30
sys/arch/arm/omap/omap2430_mputmr.c → sys/arch/arm/omap/omap2_mputmr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp $ */ /* $NetBSD: omap2_mputmr.c,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* OMAP 2430 GP timers * OMAP 2430 GP timers
@ -77,7 +77,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_mputmr.c,v 1.1 2008/08/27 11:03:10 matt Exp $");
#include "opt_omap.h" #include "opt_omap.h"
#include "opt_cpuoptions.h" #include "opt_cpuoptions.h"
@ -96,14 +96,14 @@ __KERNEL_RCSID(0, "$NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp
#include <machine/intr.h> #include <machine/intr.h>
#include <arm/omap/omap_gptmrreg.h> #include <arm/omap/omap_gptmrreg.h>
#include <arm/omap/omap2430mputmrvar.h> #include <arm/omap/omap2_mputmrvar.h>
#ifndef ARM11_PMC #ifndef ARM11_PMC
uint32_t counts_per_usec, counts_per_hz; uint32_t counts_per_usec, counts_per_hz;
#endif #endif
struct omap2430mputmr_softc *clock_sc; struct mputmr_softc *clock_sc;
struct omap2430mputmr_softc *stat_sc; struct mputmr_softc *stat_sc;
struct omap2430mputmr_softc *ref_sc; struct mputmr_softc *ref_sc;
static uint32_t mpu_get_timecount(struct timecounter *); static uint32_t mpu_get_timecount(struct timecounter *);
static struct timecounter mpu_timecounter = { static struct timecounter mpu_timecounter = {
@ -116,37 +116,37 @@ static struct timecounter mpu_timecounter = {
}; };
static inline void static inline void
_timer_intr_dis(struct omap2430mputmr_softc *sc) _timer_intr_dis(struct mputmr_softc *sc)
{ {
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, 0); bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, 0);
} }
static inline void static inline void
_timer_intr_enb(struct omap2430mputmr_softc *sc) _timer_intr_enb(struct mputmr_softc *sc)
{ {
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, TIER_OVF_IT_ENA); bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, TIER_OVF_IT_ENA);
} }
static inline uint32_t static inline uint32_t
_timer_intr_sts(struct omap2430mputmr_softc *sc) _timer_intr_sts(struct mputmr_softc *sc)
{ {
return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TISR); return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TISR);
} }
static inline void static inline void
_timer_intr_ack(struct omap2430mputmr_softc *sc) _timer_intr_ack(struct mputmr_softc *sc)
{ {
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TISR, TIER_OVF_IT_ENA); bus_space_write_4(sc->sc_iot, sc->sc_ioh, TISR, TIER_OVF_IT_ENA);
} }
static inline uint32_t static inline uint32_t
_timer_read(struct omap2430mputmr_softc *sc) _timer_read(struct mputmr_softc *sc)
{ {
return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TCRR); return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TCRR);
} }
static inline void static inline void
_timer_stop(struct omap2430mputmr_softc *sc) _timer_stop(struct mputmr_softc *sc)
{ {
uint32_t r; uint32_t r;
@ -156,14 +156,14 @@ _timer_stop(struct omap2430mputmr_softc *sc)
} }
static inline void static inline void
_timer_reload(struct omap2430mputmr_softc *sc, uint32_t val) _timer_reload(struct mputmr_softc *sc, uint32_t val)
{ {
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TLDR, val); bus_space_write_4(sc->sc_iot, sc->sc_ioh, TLDR, val);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TCRR, val); bus_space_write_4(sc->sc_iot, sc->sc_ioh, TCRR, val);
} }
static inline void static inline void
_timer_start(struct omap2430mputmr_softc *sc, timer_factors *tfp) _timer_start(struct mputmr_softc *sc, timer_factors *tfp)
{ {
uint32_t r=0; uint32_t r=0;
@ -199,7 +199,7 @@ statintr(void *frame)
} }
static void static void
setclockrate(struct omap2430mputmr_softc *sc, int schz) setclockrate(struct mputmr_softc *sc, int schz)
{ {
timer_factors tf; timer_factors tf;

64
sys/arch/arm/omap/omap2_obio.c
View File

@ -1,7 +1,7 @@
/* $Id: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $Id: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* adapted from: */ /* adapted from: */
/* $NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */ /* $NetBSD: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* /*
@ -103,7 +103,7 @@
#include "opt_omap.h" #include "opt_omap.h"
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $"); __KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
#include "locators.h" #include "locators.h"
#include "obio.h" #include "obio.h"
@ -121,8 +121,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $"
#include <arm/mainbus/mainbus.h> #include <arm/mainbus/mainbus.h>
#include <arm/omap/omap_var.h> #include <arm/omap/omap_var.h>
#include <arm/omap/omap2430obioreg.h> #include <arm/omap/omap2_obioreg.h>
#include <arm/omap/omap2430obiovar.h> #include <arm/omap/omap2_obiovar.h>
typedef struct { typedef struct {
boolean_t cs_valid; boolean_t cs_valid;
@ -152,25 +152,39 @@ static void obio_attach_critical(struct obio_softc *);
CFATTACH_DECL(obio, sizeof(struct obio_softc), CFATTACH_DECL(obio, sizeof(struct obio_softc),
obio_match, obio_attach, NULL, NULL); obio_match, obio_attach, NULL, NULL);
static uint8_t obio_attached[NOBIO]; static uint8_t obio_attached;
static int static int
obio_match(device_t parent, cfdata_t match, void *aux) obio_match(device_t parent, cfdata_t match, void *aux)
{ {
struct mainbus_attach_args *mb = aux; struct mainbus_attach_args *mb = aux;
#ifdef OMAP2_OBIO_0_BASE
if (mb->mb_iobase == OMAP2_OBIO_0_BASE
&& mb->mb_iosize == OMAP2_OBIO_0_SIZE
&& (obio_attached & 1) == 0)
return 1;
#endif
#if defined(OMAP2) #ifdef OMAP2_OBIO_1_BASE
if ((mb->mb_iobase == OMAP2430_OBIO_0_BASE) if (mb->mb_iobase == OMAP2_OBIO_1_BASE
&& (mb->mb_iosize == OMAP2430_OBIO_0_SIZE) && mb->mb_iosize == OMAP2_OBIO_1_SIZE
&& (obio_attached[0] == 0)) && (obio_attached & 2) == 0)
return 1; return 1;
if ((mb->mb_iobase == OMAP2430_OBIO_1_BASE) #endif
&& (mb->mb_iosize == OMAP2430_OBIO_1_SIZE)
&& (obio_attached[1] == 0)) #ifdef OMAP2_OBIO_2_BASE
if (mb->mb_iobase == OMAP2_OBIO_2_BASE
&& mb->mb_iosize == OMAP2_OBIO_2_SIZE
&& (obio_attached & 4) == 0)
return 1;
#endif
#ifdef OMAP2_OBIO_3_BASE
if (mb->mb_iobase == OMAP2_OBIO_3_BASE
&& mb->mb_iosize == OMAP2_OBIO_3_SIZE
&& (obio_attached & 8) == 0)
return 1; return 1;
#else
# error unknown OMAP implementation
#endif #endif
return 0; return 0;
@ -193,11 +207,21 @@ obio_attach(device_t parent, device_t self, void *aux)
sc->sc_base = mb->mb_iobase; sc->sc_base = mb->mb_iobase;
sc->sc_size = mb->mb_iosize; sc->sc_size = mb->mb_iosize;
#if defined(OMAP2) #ifdef OMAP2_OBIO_0_BASE
if (mb->mb_iobase == OMAP2430_OBIO_0_BASE) if (mb->mb_iobase == OMAP2_OBIO_0_BASE)
obio_attached[0] = 1; obio_attached |= 1;
if (mb->mb_iobase == OMAP2430_OBIO_1_BASE) #endif
obio_attached[1] = 1; #ifdef OMAP2_OBIO_1_BASE
else if (mb->mb_iobase == OMAP2_OBIO_1_BASE)
obio_attached |= 2;
#endif
#ifdef OMAP2_OBIO_2_BASE
else if (mb->mb_iobase == OMAP2_OBIO_2_BASE)
obio_attached |= 4;
#endif
#ifdef OMAP2_OBIO_3_BASE
else if (mb->mb_iobase == OMAP2_OBIO_3_BASE)
obio_attached |= 8;
#endif #endif
/* /*

53
sys/arch/arm/omap/omap2430mputmrvar.h → sys/arch/arm/omap/omap2_obioreg.h
View File

@ -1,4 +1,5 @@
/* $NetBSD: omap2430mputmrvar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_obioreg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
* All rights reserved. * All rights reserved.
@ -27,43 +28,31 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
/* #ifndef _ARM_OMAP_OMAP2_OBIOREG_H_
* derived from omapmputmrvar.h #define _ARM_OMAP_OMAP2_OBIOREG_H_
*/
#ifndef _OMAP2430GPTMRVAR_H #include <arm/omap/omap2_reg.h>
#define _OMAP2430GPTMRVAR_H
#if defined(OMAP_2430) || defined(OMAP_2420)
#define OMAP2_OBIO_0_BASE OMAP2430_L4_CORE_BASE
#define OMAP2_OBIO_0_SIZE OMAP2430_L4_CORE_SIZE
#ifndef STATHZ #define OMAP2_OBIO_1_BASE OMAP2430_L4_WAKEUP_BASE
# define STATHZ 64 #define OMAP2_OBIO_1_SIZE OMAP2430_L4_WAKEUP_SIZE
#endif #endif
typedef struct timer_factors { #if defined(OMAP_3530)
uint32_t ptv; #define OMAP2_OBIO_0_BASE OMAP3530_L4_CORE_BASE
uint32_t reload; #define OMAP2_OBIO_0_SIZE OMAP3530_L4_CORE_SIZE
uint32_t counts_per_usec;
} timer_factors;
struct omap2430mputmr_softc { #define OMAP2_OBIO_1_BASE OMAP3530_L4_WAKEUP_BASE
struct device sc_dev; #define OMAP2_OBIO_1_SIZE OMAP3530_L4_WAKEUP_SIZE
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_intr;
};
#define OMAP2_OBIO_2_BASE OMAP3530_L4_PERPIHERAL_BASE
#define OMAP2_OBIO_2_SIZE OMAP3530_L4_PERPIHERAL_SIZE
#define OMAP2_OBIO_3_BASE OMAP3530_L4_EMULATION_BASE
#define OMAP2_OBIO_3_SIZE OMAP3530_L4_EMULATION_SIZE
#endif
extern uint32_t counts_per_usec, counts_per_hz; #endif /* _ARM_OMAP_OMAP2_OBIOREG_H_ */
extern uint32_t hardref;
extern struct timeval hardtime;
extern struct omap2430mputmr_softc *clock_sc;
extern struct omap2430mputmr_softc *stat_sc;
extern struct omap2430mputmr_softc *ref_sc;
extern void calc_timer_factors(int, struct timer_factors *);
extern int clockintr(void *);
extern int statintr(void *);
extern void rtcinit(void);
#endif /* _OMAP2430GPTMRVAR_H */

8
sys/arch/arm/omap/omap2430obiovar.h → sys/arch/arm/omap/omap2_obiovar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430obiovar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_obiovar.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
@ -28,8 +28,8 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
#ifndef _OMAP2430OBIOVAR_H #ifndef _ARM_OMAP_OMAP2_OBIOVAR_H_
#define _OMAP2430OBIOVAR_H #define _ARM_OMAP_OMAP2_OBIOVAR_H_
struct obio_attach_args { struct obio_attach_args {
bus_space_tag_t obio_iot; bus_space_tag_t obio_iot;
@ -41,4 +41,4 @@ struct obio_attach_args {
unsigned int obio_intrbase; unsigned int obio_intrbase;
}; };
#endif /* _OMAP2430OBIOVAR_H */ #endif /* _ARM_OMAP_OMAP2_OBIOVAR_H_ */

80
sys/arch/arm/omap/omap2430reg.h → sys/arch/arm/omap/omap2_reg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: omap2430reg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */ /* $NetBSD: omap2_reg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
@ -29,8 +29,8 @@
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
#ifndef _OMAP2430REG_H #ifndef _ARM_OMAP_OMAP2_REG_H_
#define _OMAP2430REG_H #define _ARM_OMAP_OMAP2_REG_H_
/* /*
* Header for misc. omap2430 registers * Header for misc. omap2430 registers
@ -39,9 +39,23 @@
/* /*
* L4 Interconnect WAKEUP address space * L4 Interconnect WAKEUP address space
*/ */
#define OMAP2430_L4_WAKEUP_BASE 0x49000000 #define OMAP2430_L4_CORE_BASE 0x48000000
#define OMAP2430_L4_WAKEUP_SIZE (8 << 20) /* 8 MB */ #define OMAP2430_L4_CORE_SIZE (16 << 20) /* 16 MB */
#define OMAP2430_L4_WAKEUP_BASE 0x49000000
#define OMAP2430_L4_WAKEUP_SIZE (8 << 20) /* 8 MB */
#define OMAP3530_L4_CORE_BASE 0x48000000
#define OMAP3530_L4_CORE_SIZE 0x01000000 /* 16 MB */
#define OMAP3530_L4_WAKEUP_BASE 0x48300000
#define OMAP3530_L4_WAKEUP_SIZE 0x00040000 /* 256KB */
#define OMAP3530_L4_PERIPHERAL_BASE 0x49000000
#define OMAP3530_L4_PERIPHERAL_SIZE 0x00100000 /* 1MB */
#define OMAP3530_L4_EMULATION_BASE 0x54000000
#define OMAP3530_L4_EMULATION_SIZE 0x00800000 /* 8MB */
/* /*
* Clock Management registers base, offsets, and size * Clock Management registers base, offsets, and size
@ -52,6 +66,9 @@
#ifdef OMAP_2420 #ifdef OMAP_2420
#define OMAP2_CM_BASE 0x48008000 #define OMAP2_CM_BASE 0x48008000
#endif #endif
#ifdef OMAP_3530
#define OMAP2_CM_BASE 0x48004000
#endif
#define OMAP2_CM_CLKSEL_MPU 0x140 #define OMAP2_CM_CLKSEL_MPU 0x140
#define OMAP2_CM_FCLKEN1_CORE 0x200 #define OMAP2_CM_FCLKEN1_CORE 0x200
@ -216,33 +233,33 @@
/* /*
* L3 Interconnect Target Agent Common Registers * L3 Interconnect Target Agent Common Registers
*/ */
#define OMAP2430_TA_GPMC 0x68002400 #define OMAP2_TA_GPMC 0x68002400
#define OMAP2430_TA_L4_CORE 0x68006800 #define OMAP2_TA_L4_CORE 0x68006800
/* /*
* L3 Interconnect Target Agent Common Register offsets * L3 Interconnect Target Agent Common Register offsets
*/ */
#define OMAP2430_TA_COMPONENT 0x0 #define OMAP2_TA_COMPONENT 0x00
#define OMAP2430_TA_CORE 0x18 #define OMAP2_TA_CORE 0x18
#define OMAP2430_TA_AGENT_CONTROL 0x20 #define OMAP2_TA_AGENT_CONTROL 0x20
#define OMAP2430_TA_AGENT_STATUS 0x28 #define OMAP2_TA_AGENT_STATUS 0x28
#define OMAP2430_TA_ERROR_LOG 0x58 #define OMAP2_TA_ERROR_LOG 0x58
#define OMAP2430_TA_ERROR_LOG_ADDR 0x60 #define OMAP2_TA_ERROR_LOG_ADDR 0x60
/* /*
* OMAP2430_TA_COMPONENT bits * OMAP2_TA_COMPONENT bits
*/ */
#define TA_COMPONENT_REV(r) ((r) & __BITS(15,0)) #define TA_COMPONENT_REV(r) ((r) & __BITS(15,0))
#define TA_COMPONENT_CODE(r) (((r) >> 16) & __BITS(15,0)) #define TA_COMPONENT_CODE(r) (((r) >> 16) & __BITS(15,0))
/* /*
* OMAP2430_TA_CORE bits * OMAP2_TA_CORE bits
*/ */
#define TA_AGENT_CORE_REV(r) ((r) & __BITS(15,0)) #define TA_AGENT_CORE_REV(r) ((r) & __BITS(15,0))
#define TA_AGENT_CORE_CODE(r) (((r) >> 16) & __BITS(15,0)) #define TA_AGENT_CORE_CODE(r) (((r) >> 16) & __BITS(15,0))
/* /*
* OMAP2430_TA_AGENT_CONTROL bits * OMAP2_TA_AGENT_CONTROL bits
*/ */
#define TA_AGENT_CONTROL_CORE_RESET __BIT(0) #define TA_AGENT_CONTROL_CORE_RESET __BIT(0)
#define TA_AGENT_CONTROL_CORE_REJECT __BIT(4) #define TA_AGENT_CONTROL_CORE_REJECT __BIT(4)
@ -257,7 +274,7 @@
#define TA_AGENT_CONTROL_CORE_REQ_TIMEOUT_REP __BIT(25) #define TA_AGENT_CONTROL_CORE_REQ_TIMEOUT_REP __BIT(25)
/* /*
* OMAP2430_TA_AGENT_STATUS bits * OMAP2_TA_AGENT_STATUS bits
*/ */
#define TA_AGENT_STATUS_CORE_RESET __BIT(0) #define TA_AGENT_STATUS_CORE_RESET __BIT(0)
#define TA_AGENT_STATUS_RESVa __BITS(3,1) #define TA_AGENT_STATUS_RESVa __BITS(3,1)
@ -274,7 +291,7 @@
#define TA_AGENT_STATUS_RESVd __BITS(31,25) #define TA_AGENT_STATUS_RESVd __BITS(31,25)
/* /*
* OMAP2430_TA_ERROR_LOG bits * OMAP2_TA_ERROR_LOG bits
*/ */
#define TA_ERROR_LOG_CMD __BITS(2,0) #define TA_ERROR_LOG_CMD __BITS(2,0)
#define TA_ERROR_LOG_RESa __BITS(7,3) #define TA_ERROR_LOG_RESa __BITS(7,3)
@ -287,9 +304,6 @@
/* /*
* L4 Interconnect CORE address space * L4 Interconnect CORE address space
*/ */
#define OMAP2430_L4_CORE_BASE 0x48000000
#define OMAP2430_L4_CORE_SIZE (16 << 20) /* 16 MB */
#define OMAP2430_L4_S3220_2430_WATCHDOGOCP24 0x48027000 #define OMAP2430_L4_S3220_2430_WATCHDOGOCP24 0x48027000
#define OMAP2430_L4_S3220_2430_DMTIMER_DMC2 0x4802B000 #define OMAP2430_L4_S3220_2430_DMTIMER_DMC2 0x4802B000
#define OMAP2430_L4_S3220_2430_AP 0x48040000 #define OMAP2430_L4_S3220_2430_AP 0x48040000
@ -344,21 +358,22 @@
/* /*
* L3 Interconnect Sideband Interconnect register base * L3 Interconnect Sideband Interconnect register base
*/ */
#define OMAP2430_SI_BASE 0x68000400 #define OMAP2_SI_BASE 0x68000400
/* /*
* L3 Interconnect Sideband Interconnect register offsets * L3 Interconnect Sideband Interconnect register offsets
*/ */
#define OMAP2430_SI_CONTOL 0x20 #define OMAP2_SI_CONTOL 0x0020
#define OMAP2430_SI_FLAG_STATUS_0 0x110 /* APE_app */ #define OMAP2_SI_FLAG_STATUS_0 0x0110 /* APE_app */
#define OMAP2430_SI_FLAG_STATUS_1 0x130 /* APE_dbg */ #define OMAP2_SI_FLAG_STATUS_1 0x0130 /* APE_dbg */
#define OMAP2430_SI_FLAG_STATUS_2 0x150 /* MODEM_app */ #define OMAP2_SI_FLAG_STATUS_2 0x0150 /* MODEM_app */
#define OMAP2430_SI_FLAG_STATUS_3 0x170 /* MODEM_dbg */ #define OMAP2_SI_FLAG_STATUS_3 0x0170 /* MODEM_dbg */
/* /*
* Interrupts * Interrupts
*/ */
#define INTC_BASE 0x480FE000 #define INTC_BASE 0x480FE000
#define INTC_BASE_3530 0x48200000
#define INTC_REVISISON 0x0000 #define INTC_REVISISON 0x0000
#define INTC_SYSCONFIG 0x0010 #define INTC_SYSCONFIG 0x0010
#define INTC_SYSSTATUS 0x0014 #define INTC_SYSSTATUS 0x0014
@ -426,6 +441,13 @@
#define GPIO3_BASE_2420 0x4801c000 #define GPIO3_BASE_2420 0x4801c000
#define GPIO4_BASE_2420 0x4801e000 #define GPIO4_BASE_2420 0x4801e000
#define GPIO1_BASE_3530 0x48310000
#define GPIO2_BASE_3530 0x49050000
#define GPIO3_BASE_3530 0x49052000
#define GPIO4_BASE_3530 0x49054000
#define GPIO5_BASE_3530 0x49056000
#define GPIO6_BASE_3530 0x49058000
#define GPIO_IRQSTATUS1 0x018 #define GPIO_IRQSTATUS1 0x018
#define GPIO_IRQENABLE1 0x01c #define GPIO_IRQENABLE1 0x01c
#define GPIO_WAKEUPENABLE 0x020 #define GPIO_WAKEUPENABLE 0x020
@ -450,4 +472,4 @@
#define GPIO_CLEARDATAOUT 0x090 #define GPIO_CLEARDATAOUT 0x090
#define GPIO_SETDATAOUT 0x094 #define GPIO_SETDATAOUT 0x094
#endif /* _OMAP2430H */ #endif /* _ARM_OMAP_OMAP2_REG_H_ */

9
sys/arch/evbarm/conf/TISDP2420
View File

@ -1,5 +1,5 @@
# #
# $NetBSD: TISDP2420,v 1.4 2008/07/31 07:41:00 simonb Exp $ # $NetBSD: TISDP2420,v 1.5 2008/08/27 11:03:09 matt Exp $
# #
# TISDP2420 -- TI OMAP 2420 Eval Board Kernel # TISDP2420 -- TI OMAP 2420 Eval Board Kernel
# #
@ -19,6 +19,7 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
options CPU_ARM1136 options CPU_ARM1136
options OMAP_2420 options OMAP_2420
options PMAPCOUNTERS
# Architecture options # Architecture options
@ -216,11 +217,11 @@ options CONSADDR=0x4806a000, CONSPEED=57600
##omap2430intc0 at obio? # Interrupt controller ##omap2430intc0 at obio? # Interrupt controller
# Operating System Timer # Operating System Timer
omap2430mputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2 omapmputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
# Statistics Timer # Statistics Timer
omap2430mputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3 omapmputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
# Microtime Reference Timer # Microtime Reference Timer
omap2430mputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4 omapmputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
options OMAP_MPU_TIMER_CLOCK_FREQ=12000000 options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
# Watchdog timers # Watchdog timers

8
sys/arch/evbarm/conf/TISDP2430
View File

@ -1,5 +1,5 @@
# #
# $NetBSD: TISDP2430,v 1.4 2008/07/31 07:41:00 simonb Exp $ # $NetBSD: TISDP2430,v 1.5 2008/08/27 11:03:10 matt Exp $
# #
# TISDP2430 -- TI OMAP 2430 Eval Board Kernel # TISDP2430 -- TI OMAP 2430 Eval Board Kernel
# #
@ -207,11 +207,11 @@ options CONSADDR=0x4806a000, CONSPEED=115200
##omap2430intc0 at obio? # Interrupt controller ##omap2430intc0 at obio? # Interrupt controller
# Operating System Timer # Operating System Timer
omap2430mputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2 omapmputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
# Statistics Timer # Statistics Timer
omap2430mputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3 omapmputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
# Microtime Reference Timer # Microtime Reference Timer
omap2430mputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4 omapmputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
options OMAP_MPU_TIMER_CLOCK_FREQ=12000000 options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
# Watchdog timers # Watchdog timers

4
sys/arch/evbarm/tisdp24xx/if_sm_gpmc.c
View File

@ -36,7 +36,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.2 2008/04/27 18:58:47 matt Exp $"); __KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
#include "locators.h" #include "locators.h"
@ -57,7 +57,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.2 2008/04/27 18:58:47 matt Exp $");
#include <dev/ic/smc91cxxreg.h> #include <dev/ic/smc91cxxreg.h>
#include <dev/ic/smc91cxxvar.h> #include <dev/ic/smc91cxxvar.h>
#include <arch/arm/omap/omap2430gpmcvar.h> #include <arch/arm/omap/omap2_gpmcvar.h>
#include <arch/arm/omap/omap_gpio.h> #include <arch/arm/omap/omap_gpio.h>
static int sm_gpmc_match(struct device *, struct cfdata *, void *); static int sm_gpmc_match(struct device *, struct cfdata *, void *);

4
sys/arch/evbarm/tisdp24xx/sdp24xx.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: sdp24xx.h,v 1.2 2008/04/27 18:58:47 matt Exp $ */ /* $NetBSD: sdp24xx.h,v 1.3 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Copyright (c) 2007 Microsoft * Copyright (c) 2007 Microsoft
* All rights reserved. * All rights reserved.
@ -31,7 +31,7 @@
#ifndef _EVBARM_TISDP24XX_SDP24XX_H #ifndef _EVBARM_TISDP24XX_SDP24XX_H
#define _EVBARM_TISDP24XX_SDP24XX_H #define _EVBARM_TISDP24XX_SDP24XX_H
#include <arm/omap/omap2430reg.h> #include <arm/omap/omap2_reg.h>
/* /*
* Kernel VM space: 192MB at KERNEL_VM_BASE * Kernel VM space: 192MB at KERNEL_VM_BASE

18
sys/arch/evbarm/tisdp24xx/sdp24xx_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sdp24xx_machdep.c,v 1.3 2008/06/30 00:49:31 perry Exp $ */ /* $NetBSD: sdp24xx_machdep.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
/* /*
* Machine dependent functions for kernel setup for TI OSK5912 board. * Machine dependent functions for kernel setup for TI OSK5912 board.
@ -125,7 +125,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: sdp24xx_machdep.c,v 1.3 2008/06/30 00:49:31 perry Exp $"); __KERNEL_RCSID(0, "$NetBSD: sdp24xx_machdep.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
#include "opt_machdep.h" #include "opt_machdep.h"
#include "opt_ddb.h" #include "opt_ddb.h"
@ -187,6 +187,7 @@ u_int cpu_reset_address = 0;
/* Define various stack sizes in pages */ /* Define various stack sizes in pages */
#define IRQ_STACK_SIZE 1 #define IRQ_STACK_SIZE 1
#define FIQ_STACK_SIZE 1
#define ABT_STACK_SIZE 1 #define ABT_STACK_SIZE 1
#ifdef IPKDB #ifdef IPKDB
#define UND_STACK_SIZE 2 #define UND_STACK_SIZE 2
@ -210,6 +211,7 @@ static paddr_t physical_freestart, physical_freeend;
static u_int free_pages; static u_int free_pages;
/* Physical and virtual addresses for some global pages */ /* Physical and virtual addresses for some global pages */
pv_addr_t fiqstack;
pv_addr_t irqstack; pv_addr_t irqstack;
pv_addr_t undstack; pv_addr_t undstack;
pv_addr_t abtstack; pv_addr_t abtstack;
@ -469,7 +471,7 @@ initarm(void *arg)
#ifdef VERBOSE_INIT_ARM #ifdef VERBOSE_INIT_ARM
/* Talk to the user */ /* Talk to the user */
printf("\nNetBSD/evbarm (SDP2430) booting ...\n"); printf("\nNetBSD/evbarm (SDP24xx) booting ...\n");
#endif #endif
#ifdef BOOT_ARGS #ifdef BOOT_ARGS
@ -540,6 +542,7 @@ initarm(void *arg)
printf("init subsystems: stacks "); printf("init subsystems: stacks ");
#endif #endif
set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
@ -621,7 +624,7 @@ static void
init_clocks(void) init_clocks(void)
{ {
#ifdef NOTYET #ifdef NOTYET
static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP2430_L4_WAKEUP_VBASE + OMAP2430_CM_BASE + OMAP2430_CM_CLKSEL_MPU - OMAP2430_L4_WAKEUP_BASE); static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP2430_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP2430_L4_WAKEUP_BASE);
uint32_t v; uint32_t v;
sdp_putchar('E'); sdp_putchar('E');
v = *clksel_reg; v = *clksel_reg;
@ -788,6 +791,7 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
systempage.pv_va = ARM_VECTORS_HIGH; systempage.pv_va = ARM_VECTORS_HIGH;
/* Allocate stacks for all modes */ /* Allocate stacks for all modes */
valloc_pages(fiqstack, FIQ_STACK_SIZE);
valloc_pages(irqstack, IRQ_STACK_SIZE); valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE); valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE); valloc_pages(undstack, UND_STACK_SIZE);
@ -855,6 +859,8 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
#endif #endif
/* Map the stack pages */ /* Map the stack pages */
pmap_map_chunk(l1_va, fiqstack.pv_va, fiqstack.pv_pa,
FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1_va, irqstack.pv_va, irqstack.pv_pa, pmap_map_chunk(l1_va, irqstack.pv_va, irqstack.pv_pa,
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1_va, abtstack.pv_va, abtstack.pv_pa, pmap_map_chunk(l1_va, abtstack.pv_va, abtstack.pv_pa,
@ -919,6 +925,10 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1, systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1,
(vaddr_t)ARM_VECTORS_HIGH, (vaddr_t)ARM_VECTORS_HIGH + PAGE_SIZE - 1, (vaddr_t)ARM_VECTORS_HIGH, (vaddr_t)ARM_VECTORS_HIGH + PAGE_SIZE - 1,
1); 1);
printf(mem_fmt, "FIQ stack",
fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
FIQ_STACK_SIZE);
printf(mem_fmt, "IRQ stack", printf(mem_fmt, "IRQ stack",
irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,
irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,

4
sys/arch/evbarm/tisdp24xx/sdp24xx_start.S
View File

@ -96,10 +96,10 @@
#include <arm/armreg.h> #include <arm/armreg.h>
#undef DOMAIN_CLIENT /* assym.h defines as 1, but pte.h defines as 0x01 */ #undef DOMAIN_CLIENT /* assym.h defines as 1, but pte.h defines as 0x01 */
#include <arm/arm32/pmap.h> #include <arm/arm32/pmap.h>
#include <arm/omap/omap2430obioreg.h> #include <arm/omap/omap2_obioreg.h>
#include <evbarm/tisdp24xx/sdp24xx.h> #include <evbarm/tisdp24xx/sdp24xx.h>
RCSID("$NetBSD: sdp24xx_start.S,v 1.2 2008/04/27 18:58:47 matt Exp $") RCSID("$NetBSD: sdp24xx_start.S,v 1.3 2008/08/27 11:03:10 matt Exp $")
#if 0 #if 0
#define Invalidate_I_cache(reg) \ #define Invalidate_I_cache(reg) \