Cleanup OMAP2 files. Change most omap2430* to omap2_*. This is in
preperation for the OMAP 3530 (OMAP 3) support. Some 3530 definitions added.
This commit is contained in:
matt
parent
c041c3f557
commit
b1623157a5
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@ -1,6 +1,6 @@
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# $NetBSD: files.omap2,v 1.2 2008/04/27 18:58:45 matt Exp $
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# $NetBSD: files.omap2,v 1.3 2008/08/27 11:03:10 matt Exp $
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#
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# Configuration info for Texas Instruments OMAP2 CPU support
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# Configuration info for Texas Instruments OMAP2/OMAP3 CPU support
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# Based on xscale/files.pxa2x0
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#
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@ -12,8 +12,10 @@ file arch/arm/arm32/irq_dispatch.S
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defparam opt_omap.h MEMSIZE
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defparam opt_omap.h OMAP_EMIFF_PBASE OMAP_EMIFF_SIZE
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defflag opt_omap.h OMAP2
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defflag opt_omap.h OMAP3: OMAP2
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defflag opt_omap.h OMAP_2430: OMAP2
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defflag opt_omap.h OMAP_2420: OMAP2
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defflag opt_omap.h OMAP_3530: OMAP3
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# OBIO just an attach point
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device obio { [addr=-1], [size=0], [intr=-1], [mult=1], [intrbase=-1], [nobyteacc=0]
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@ -31,21 +33,21 @@ file arch/arm/xscale/pxa2x0_a4x_io.S obio
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# OMAP2 interrupt controller
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device omapicu: pic
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attach omapicu at obio with omap2icu
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file arch/arm/omap/omap2_icu.c omap2 & omapicu
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file arch/arm/omap/omap2_icu.c (omap2 | omap3) & omapicu
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file arch/arm/omap/omap2430_intr.c omap2 & !omapicu
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# OMAP2 GPIO controllers
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device omapgpio: gpiobus
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attach omapgpio at obio with omap2gpio
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file arch/arm/omap/omap2_gpio.c omap2 & omapgpio
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file arch/arm/omap/omap2_gpio.c (omap2 | omap3) & omapgpio
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# OMAP 2430 General Purpose Timer
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device omap2430mputmr
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file arch/arm/omap/omap2430_mputmr.c omap2430mputmr
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device omapmputmr
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file arch/arm/omap/omap2_mputmr.c omapmputmr
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defparam opt_omap.h OMAP_GP_TIMER_CLOCK_FREQ
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# OBIO/2430 GP Timer
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attach omap2430mputmr at obio with obiomputmr
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attach omapmputmr at obio with obiomputmr
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file arch/arm/omap/obio_mputmr.c obiomputmr
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# Dual Mode (General Purpose) Timer
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@ -66,7 +68,7 @@ file arch/arm/omap/obio_wdt.c obiowdt32k
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device L3i { [addr=-1], [size=0], [intr=-1], [mult=1], [nobyteacc=0]
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} : bus_space_generic
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attach L3i at mainbus
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file arch/arm/omap/omap2_l3i.c omap2
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file arch/arm/omap/omap2_l3i.c omap2 | omap3
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# General Purpose Memory Controller
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# XXX some addl. chip select config parms may be desired here (e.g. timing)
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@ -1,4 +1,4 @@
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/* $NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/* $NetBSD: obio_com.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Based on arch/arm/omap/omap_com.c
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@ -39,7 +39,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
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#include "opt_omap.h"
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#include "opt_com.h"
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@ -55,8 +55,8 @@ __KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#include <arm/omap/omap2430obiovar.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2_obiovar.h>
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#include <arm/omap/omap2_reg.h>
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#include <arm/omap/omap_com.h>
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#include "locators.h"
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@ -1,4 +1,4 @@
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/* $NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/* $NetBSD: obio_mputmr.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Based on omap_mputmr.c
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@ -101,7 +101,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
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#include "opt_omap.h"
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#include "opt_cpuoptions.h"
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@ -118,13 +118,13 @@ __KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.2 2008/04/27 18:58:45 matt Exp $")
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/omap/omap2430obiovar.h>
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#include <arm/omap/omap2_obiovar.h>
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#include <arm/omap/omap2_mputmrvar.h>
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#include <arm/omap/omap2_mputmrreg.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2_reg.h>
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#ifndef OMAP_MPU_TIMER_CLOCK_FREQ
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#error Specify the timer frequency in Hz with the OMAP_MPU_TIMER_CLOCK_FREQ option.
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@ -33,7 +33,7 @@
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#include "opt_omap.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
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#include <sys/param.h>
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#include <sys/callout.h>
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@ -47,7 +47,7 @@ __KERNEL_RCSID(0, "$NetBSD: obio_wdt.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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#include <machine/bus.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <arm/omap/omap2430obiovar.h>
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#include <arm/omap/omap2_obiovar.h>
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#include <arm/omap/omap_wdtvar.h>
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#include <arm/omap/omap_wdtreg.h>
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/* $NetBSD: omap2430_intr.c,v 1.3 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Define the SDP2430 specific information and then include the generic OMAP
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* interrupt header.
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@ -35,7 +35,7 @@
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#include "opt_omap.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
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#include <sys/param.h>
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#include <sys/evcnt.h>
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@ -48,8 +48,7 @@ __KERNEL_RCSID(0, "$NetBSD: omap2430_intr.c,v 1.2 2008/04/27 18:58:45 matt Exp $
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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#include <machine/atomic.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2_reg.h>
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#include <machine/bus.h>
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@ -1,42 +0,0 @@
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/* $NetBSD: omap2430obioreg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Microsoft
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _OMAP2430OBIOREG_H
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#define _OMAP2430OBIOREG_H
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#include <arm/omap/omap2430reg.h>
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#define OMAP2430_OBIO_0_BASE OMAP2430_L4_CORE_BASE
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#define OMAP2430_OBIO_0_SIZE OMAP2430_L4_CORE_SIZE
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#define OMAP2430_OBIO_1_BASE OMAP2430_L4_WAKEUP_BASE
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#define OMAP2430_OBIO_1_SIZE OMAP2430_L4_WAKEUP_SIZE
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#endif /* _OMAP2430OBIOREG_H */
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $ */
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/* $NetBSD: omap2_gpio.c,v 1.5 2008/08/27 11:03:10 matt Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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@ -28,7 +28,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.5 2008/08/27 11:03:10 matt Exp $");
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#define _INTR_PRIVATE
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@ -50,8 +50,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_gpio.c,v 1.4 2008/07/03 06:17:24 matt Exp $");
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#include <machine/atomic.h>
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#include <machine/bus.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2430obiovar.h>
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#include <arm/omap/omap2_reg.h>
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#include <arm/omap/omap2_obiovar.h>
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#include <arm/pic/picvar.h>
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#if NGPIO > 0
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@ -323,23 +323,33 @@ gpio_match(device_t parent, cfdata_t cfdata, void *aux)
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struct obio_attach_args *oa = aux;
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#ifdef OMAP_2420
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if (oa->obio_addr != GPIO1_BASE_2420
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&& oa->obio_addr != GPIO2_BASE_2420
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&& oa->obio_addr != GPIO3_BASE_2420
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&& oa->obio_addr != GPIO4_BASE_2420)
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return 0;
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if (oa->obio_addr == GPIO1_BASE_2420
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|| oa->obio_addr == GPIO2_BASE_2420
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|| oa->obio_addr == GPIO3_BASE_2420
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|| oa->obio_addr == GPIO4_BASE_2420)
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return 1;
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#endif
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#ifdef OMAP_2430
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if (oa->obio_addr != GPIO1_BASE_2430
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&& oa->obio_addr != GPIO2_BASE_2430
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&& oa->obio_addr != GPIO3_BASE_2430
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&& oa->obio_addr != GPIO4_BASE_2430
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&& oa->obio_addr != GPIO5_BASE_2430)
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return 0;
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if (oa->obio_addr == GPIO1_BASE_2430
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|| oa->obio_addr == GPIO2_BASE_2430
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|| oa->obio_addr == GPIO3_BASE_2430
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|| oa->obio_addr == GPIO4_BASE_2430
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|| oa->obio_addr == GPIO5_BASE_2430)
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return 1;
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#endif
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return 1;
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#ifdef OMAP_3530
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if (oa->obio_addr == GPIO1_BASE_3530
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|| oa->obio_addr == GPIO2_BASE_3530
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|| oa->obio_addr == GPIO3_BASE_3530
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|| oa->obio_addr == GPIO4_BASE_3530
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|| oa->obio_addr == GPIO5_BASE_3530
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|| oa->obio_addr == GPIO6_BASE_3530)
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return 1;
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#endif
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return 0;
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}
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void
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/* $Id: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
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/* $Id: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
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/* adapted from: */
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/* $NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
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/* $NetBSD: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
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/*
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@ -102,7 +102,7 @@
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#include "opt_omap.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
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#include "locators.h"
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@ -119,8 +119,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_gpmc.c,v 1.3 2008/05/02 23:46:12 martin Exp $"
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#include <arm/mainbus/mainbus.h>
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#include <arm/omap/omap_var.h>
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#include <arm/omap/omap2430gpmcreg.h>
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#include <arm/omap/omap2430gpmcvar.h>
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#include <arm/omap/omap2_gpmcreg.h>
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#include <arm/omap/omap2_gpmcvar.h>
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typedef struct {
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boolean_t cs_valid;
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2430gpmcreg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/* $NetBSD: omap2_gpmcreg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2430gpmcvar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
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/* $NetBSD: omap2_gpmcvar.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $ */
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/* $NetBSD: omap2_icu.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
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/*
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* Define the SDP2430 specific information and then include the generic OMAP
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* interrupt header.
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@ -30,7 +30,7 @@
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#define _INTR_PRIVATE
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
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#include <sys/param.h>
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#include <sys/evcnt.h>
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@ -45,8 +45,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_icu.c,v 1.3 2008/07/03 06:18:01 matt Exp $");
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#include <arm/cpufunc.h>
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#include <arm/atomic.h>
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#include <arm/omap/omap2430reg.h>
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#include <arm/omap/omap2430obiovar.h>
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#include <arm/omap/omap2_reg.h>
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#include <arm/omap/omap2_obiovar.h>
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#define INTC_READ(sc, g, o) \
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@ -169,7 +169,13 @@ omap2icu_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct obio_attach_args * const oa = aux;
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return (oa->obio_addr == INTC_BASE);
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#if defined(OMAP_2430) || defined(OMAP_2420)
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return oa->obio_addr == INTC_BASE;
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#elif defined(OMAP3530)
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return oa->obio_addr == INTC_BASE_3530;
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#else
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#error unsupported OMAP variant
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#endif
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: omap2_intr.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
|
||||
/* $NetBSD: omap2_intr.h,v 1.3 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Define the SDP2430 specific information and then include the generic OMAP
|
||||
|
|
@ -47,11 +47,16 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
|
|||
#define IRQ_COMMTX 2 /* MPU emulation (1) */
|
||||
#define IRQ_BENCH 3 /* MPU emulation (1) */
|
||||
#define IRQ_XTI 4 /* (2430) XTI module (2) (3) */
|
||||
#define IRQ_MCBSP2_ST 4 /* (3530) Sidetone MCBSP2 overflow */
|
||||
#define IRQ_XTI_WKUP 5 /* (2430) XTI module (3) */
|
||||
#define IRQ_MCBSP3_ST 5 /* (3530) Sidetone MCBSP3 overflow */
|
||||
#define IRQ_SSM_ABORT 6 /* (2430) MPU subsystem secure state-machine abort */
|
||||
#define IRQ_SYS_nIRQ0 7 /* External interrupt (active low) */
|
||||
#define IRQ_D2D_FW_STACKED 8 /* (2430) Occurs when modem does a security violation and has been automatically put DEVICE_SECURITY [0] under reset. */
|
||||
#define IRQ_D2D_FW_STACKED 8 /* (2430) Occurs when modem does a security violation and has been automatically put DEVICE_SECURITY [0] under reset. */
|
||||
#define IRQ_RSVD8 8 /* (3530) */
|
||||
#define IRQ_SMX_DBG 9 /* (3530) SMX error for debug */
|
||||
#define IRQ_RSVD9 9 /* Reserved */
|
||||
#define IRQ_SMX_APP 10 /* (3530) SMX error for application */
|
||||
#define IRQ_L3 10 /* (2420) L2 interconnect (transaction error) */
|
||||
#define IRQ_SMX_APE_IA_ARM1136 10 /* (2430) Error flag for reporting application and unknown errors from SMX-APE (4) rd_wrSError_o */
|
||||
#define IRQ_PRCM_MPU 11 /* PRCM */
|
||||
|
|
@ -62,25 +67,33 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
|
|||
#define IRQ_McBSP2_COMMON 16 /* (2430) McBSP2 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
|
||||
#define IRQ_McBSP3_COMMON 17 /* (2430) McBSP3 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
|
||||
#define IRQ_McBSP4_COMMON 18 /* (2430) McBSP4 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
|
||||
#define IRQ_SR1 18 /* (3530) SmartReflex 1 */
|
||||
#define IRQ_McBSP5_COMMON 19 /* (2430) McBSP5 common IRQ. This IRQ regroups all interrupt sources of the McBSPLP. Not backward-compatible with the previous McBSP. */
|
||||
#define IRQ_SR2 19 /* (3530) SmartReflex 2 */
|
||||
#define IRQ_GPMC 20 /* General-purpose memory controller module */
|
||||
#define IRQ_GFX 21 /* (2430) 2D/3D graphics module */
|
||||
#define IRQ_RSVD22 22 /* Reserved */
|
||||
#define IRQ_MCBSP3 22 /* McBSP module 3 */
|
||||
#define IRQ_EAC 23 /* Audio Controller (2420) */
|
||||
#define IRQ_MCBSP4 22 /* McBSP module 4 */
|
||||
#define IRQ_CAM0 24 /* Camera interface interrupt request 0 */
|
||||
#define IRQ_DSS 25 /* Display subsystem module (5) */
|
||||
#define IRQ_MAIL_U0_MPU 26 /* Mailbox user 0 interrupt request */
|
||||
#define IRQ_DSP_UMA 27 /* (2420) DSP UMA core s/w interrupt */
|
||||
#define IRQ_MCBSP5 27 /* McBSP module 5 */
|
||||
#define IRQ_DSP_MMU 28 /* (2420) DSP MMU interrupt */
|
||||
#define IRQ_IVA2_MMU 28 /* (2430) IVA2 MMU interrupt */
|
||||
#define IRQ_GPIO1_MPU 29 /* GPIO module 1 (5) (3) */
|
||||
#define IRQ_GPIO2_MPU 30 /* GPIO module 2 (5) (3) */
|
||||
#define IRQ_GPIO3_MPU 31 /* GPIO module 3 (5) (3) */
|
||||
#define IRQ_GPIO4_MPU 32 /* GPIO module 4 (5) (3) */
|
||||
#define IRQ_GPIO5_MPU 33 /* (2430) GPIO module 5 */
|
||||
#define IRQ_GPIO5_MPU 33 /* (2430/2530) GPIO module 5 */
|
||||
#define IRQ_GPIO6_MPU 34 /* (3530) GPIO module 5 */
|
||||
#define IRQ_MAIL_U2_MPU 34 /* (2420) Mailbox user 2 */
|
||||
#define IRQ_WDT3 35 /* (2420) Watchdog timer module 3 overflow */
|
||||
#define IRQ_USIM 35 /* (3530) USIM interrupt (HS devices only) */
|
||||
#define IRQ_WDT4 36 /* (2420) Watchdog timer module 4 overflow */
|
||||
#define IRQ_WDT3_3530 36 /* (3530) Watchdog timer module 3 overflow */
|
||||
#define IRQ_IVA2WDT 36 /* (2430) IVA2 watchdog timer interrupt */
|
||||
#define IRQ_GPT1 37 /* General-purpose timer module 1 */
|
||||
#define IRQ_GPT2 38 /* General-purpose timer module 2 */
|
||||
|
|
@ -94,7 +107,9 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
|
|||
#define IRQ_GPT10 46 /* General-purpose timer module 10 */
|
||||
#define IRQ_GPT11 47 /* General-purpose timer module 11 (PWM) */
|
||||
#define IRQ_GPT12 48 /* General-purpose timer module 12 (PWM) */
|
||||
#define IRQ_SPI4_IRQ 48 /* (3530) McSPI module 4 */
|
||||
#define IRQ_RSVD49 49 /* Reserved */
|
||||
#define IRQ_SHA1MD5_2 49 /* (350) SHA-1/MD5 crypto-accelerator 2 */
|
||||
#define IRQ_PKA 50 /* (2430) PKA crypto-accelerator */
|
||||
#define IRQ_SHA1MD5 51 /* (2430) SHA-1/MD5 crypto-accelerator */
|
||||
#define IRQ_RNG 52 /* (2430) RNG module */
|
||||
|
|
@ -107,9 +122,11 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
|
|||
#define IRQ_McBSP1_TX 59 /* McBSP module 1 transmit (5) */
|
||||
#define IRQ_McBSP1_RX 60 /* McBSP module 1 receive (5) */
|
||||
#define IRQ_MCBSP1_OVR 61 /* (2430) McBSP module 1 overflow interrupt (5) */
|
||||
#define IRQ_I2C3 61 /* (3530) I2C module 3 */
|
||||
#define IRQ_McBSP2_TX 62 /* McBSP module 2 transmit (5) */
|
||||
#define IRQ_McBSP2_RX 63 /* McBSP module 2 receive (5) */
|
||||
#define IRQ_McBSP1_COMMON 64 /* (2430) McBSP1 common IRQ. This IRQ regroups all the interrupt sources of the McBSPLP. Not backward compatible with previous McBSP. */
|
||||
#define IRQ_FPKA_ERROR 64 /* (3530) PKA crypto-accelerator */
|
||||
#define IRQ_SPI1 65 /* McSPI module 1 */
|
||||
#define IRQ_SPI2 66 /* McSPI module 2 */
|
||||
#define IRQ_SSI_P1_MPU0 67 /* (2430) Dual SSI port 1 interrupt request 0 (5) */
|
||||
|
|
@ -120,27 +137,34 @@ uint32_t omap_microtimer_interval(uint32_t start, uint32_t end);
|
|||
#define IRQ_UART1 72 /* UART module 1 (3) */
|
||||
#define IRQ_UART2 73 /* UART module 2 (3) */
|
||||
#define IRQ_UART3 74 /* UART module 3 (also infrared) (5) (3) */
|
||||
#define IRQ_PBIAS 75 /* (3530) Merged intr. for PBIASite 1 & 2 */
|
||||
#define IRQ_USB_GEN 75 /* USB device general interrupt (3) */
|
||||
#define IRQ_OCHI 76 /* (3530) OHCI controller HSUSB MP Host Interrupt */
|
||||
#define IRQ_USB_NISO 76 /* USB device non-ISO (3) */
|
||||
#define IRQ_EHCI 77 /* (3530) EHCI controller HSUSB MP Host Interrupt */
|
||||
#define IRQ_USB_ISO 77 /* USB device ISO (3) */
|
||||
#define IRQ_TLL 78 /* (3530) HSUSB MP TLL interrupt (3) */
|
||||
#define IRQ_USB_HGEN 78 /* USB host general interrupt (3) */
|
||||
#define IRQ_PARTHASH 79 /* (3530) SHA2/MD5 accel 1 */
|
||||
#define IRQ_USB_HSOF 79 /* USB host start-of-frame (3) */
|
||||
#define IRQ_USB_OTG 80 /* USB OTG */
|
||||
#define IRQ_MCBSP5_TX 81 /* (2430) McBSP module 5 transmit (5) */
|
||||
#define IRQ_MCBSP5_RX 82 /* (2430) McBSP module 5 receive (5) */
|
||||
#define IRQ_MMC1 83 /* (2430) MMC/SD module 1 (3) */
|
||||
#define IRQ_MS 84 /* (2430) MS-PRO module */
|
||||
#define IRQ_MCBSP5_TX 81 /* (2430/3530) McBSP module 5 transmit (5) */
|
||||
#define IRQ_MCBSP5_RX 82 /* (2430/3530) McBSP module 5 receive (5) */
|
||||
#define IRQ_MMC1 83 /* (2430/3530) MMC/SD module 1 (3) */
|
||||
#define IRQ_MS 84 /* (2430/3530) MS-PRO module */
|
||||
#define IRQ_FAC 85 /* (2430) FAC module */
|
||||
#define IRQ_MMC2 86 /* (2430) MMC/SD module 2 */
|
||||
#define IRQ_MMC2 86 /* (2430/3530) MMC/SD module 2 */
|
||||
#define IRQ_ARM11_ICR 87 /* (2430) ARM11 ICR interrupt */
|
||||
#define IRQ_MPU_ICR 87 /* (3530) MPU ICR interrupt */
|
||||
#define IRQ_D2DFRINT 88 /* (2430) From 3G coprocessor hardware when used in chassis mode */
|
||||
#define IRQ_MCBSP3_TX 89 /* (2430) McBSP module 3 transmit (5) */
|
||||
#define IRQ_MCBSP3_RX 90 /* (2430) McBSP module 3 receive (5) */
|
||||
#define IRQ_SPI3 91 /* (2430) Module McSPI 3 */
|
||||
#define IRQ_HS_USB_MC 92 /* (2430) Module HS USB OTG controller (3) */
|
||||
#define IRQ_HS_USB_DMA 93 /* (2430) Module HS USB OTG DMA controller interrupt (3) */
|
||||
#define IRQ_HS_USB_MC 92 /* (2430) Module HS USB OTG controller (3) */
|
||||
#define IRQ_Carkit 94 /* (2430) Carkit interrupt when the external HS USB transceiver is used in carkit mode (2) */
|
||||
#define IRQ_RSVD95 95 /* Reserved */
|
||||
#define IRQ_MMC3 94 /* (3530) MMC/SD module 3 */
|
||||
#define IRQ_GPT12_3530 95 /* (3530) GPT12 */
|
||||
|
||||
#define PIC_MAXSOURCES 96
|
||||
#define PIC_MAXMAXSOURCES (96+160)
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* $Id: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
|
||||
/* $Id: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/* adapted from: */
|
||||
/* $NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
|
||||
/* $NetBSD: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -103,7 +103,7 @@
|
|||
|
||||
#include "opt_omap.h"
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
|
||||
|
||||
#include "locators.h"
|
||||
|
||||
|
|
@ -120,10 +120,10 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_l3i.c,v 1.3 2008/05/02 23:46:12 martin Exp $")
|
|||
#include <arm/mainbus/mainbus.h>
|
||||
#include <arm/omap/omap_var.h>
|
||||
|
||||
#if defined(OMAP2)
|
||||
#include <arm/omap/omap2430reg.h>
|
||||
#if defined(OMAP2) || defined(OMAP3)
|
||||
#include <arm/omap/omap2_reg.h>
|
||||
#ifdef NOTYET
|
||||
#include <arm/omap/omap2430var.h>
|
||||
#include <arm/omap/omap2_var.h>
|
||||
#endif
|
||||
#else
|
||||
/*
|
||||
|
|
@ -160,7 +160,7 @@ static int L3i_print(void *, const char *);
|
|||
#endif
|
||||
|
||||
#define TARGET_AGENT_REGS_ENTRY(reg) \
|
||||
{ .offset = OMAP2430_TA_ ## reg, \
|
||||
{ .offset = OMAP2_TA_ ## reg, \
|
||||
.decode = L3i_decode_ta_ ## reg, \
|
||||
.name = #reg }
|
||||
struct {
|
||||
|
|
@ -211,8 +211,8 @@ L3i_attach(struct device *parent, struct device *self, void *aux)
|
|||
L3i_attached = 1;
|
||||
|
||||
#ifdef L3I_DEBUG
|
||||
L3i_target_agent_check(sc, (bus_addr_t)OMAP2430_TA_L4_CORE, "L4 core");
|
||||
L3i_target_agent_check(sc, (bus_addr_t)OMAP2430_TA_GPMC, "GPMC");
|
||||
L3i_target_agent_check(sc, (bus_addr_t)OMAP2_TA_L4_CORE, "L4 core");
|
||||
L3i_target_agent_check(sc, (bus_addr_t)OMAP2_TA_GPMC, "GPMC");
|
||||
#endif
|
||||
|
||||
#ifdef NOTYET
|
||||
|
|
@ -369,15 +369,15 @@ L3i_search(struct device *parent, struct cfdata *cf,
|
|||
aa.L3i_intr = cf->cf_loc[L3iCF_INTR];
|
||||
|
||||
#if defined(OMAP2)
|
||||
if ((aa.L3i_addr >= OMAP2430_L3i_BASE)
|
||||
&& (aa.L3i_addr < (OMAP2430_L4_CORE_BASE + OMAP2430_L3i_SIZE))) {
|
||||
if ((aa.L3i_addr >= OMAP2_L3i_BASE)
|
||||
&& (aa.L3i_addr < (OMAP2_L4_CORE_BASE + OMAP2_L3i_SIZE))) {
|
||||
/* XXX
|
||||
* if size was specified, then check it too
|
||||
* otherwise just assume it is OK
|
||||
*/
|
||||
if ((aa.L3i_size != L3iCF_SIZE_DEFAULT)
|
||||
&& ((aa.L3i_addr + aa.L3i_size)
|
||||
>= (OMAP2430_L4_CORE_BASE + OMAP2430_L3i_SIZE)))
|
||||
>= (OMAP2_L4_CORE_BASE + OMAP2_L3i_SIZE)))
|
||||
return 1; /* NG */
|
||||
if (config_match(parent, cf, &aa)) {
|
||||
config_attach(parent, cf, &aa, L3i_print);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp $ */
|
||||
/* $NetBSD: omap2_mputmr.c,v 1.1 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* OMAP 2430 GP timers
|
||||
|
|
@ -77,7 +77,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2_mputmr.c,v 1.1 2008/08/27 11:03:10 matt Exp $");
|
||||
|
||||
#include "opt_omap.h"
|
||||
#include "opt_cpuoptions.h"
|
||||
|
|
@ -96,14 +96,14 @@ __KERNEL_RCSID(0, "$NetBSD: omap2430_mputmr.c,v 1.3 2008/07/03 06:19:18 matt Exp
|
|||
#include <machine/intr.h>
|
||||
|
||||
#include <arm/omap/omap_gptmrreg.h>
|
||||
#include <arm/omap/omap2430mputmrvar.h>
|
||||
#include <arm/omap/omap2_mputmrvar.h>
|
||||
|
||||
#ifndef ARM11_PMC
|
||||
uint32_t counts_per_usec, counts_per_hz;
|
||||
#endif
|
||||
struct omap2430mputmr_softc *clock_sc;
|
||||
struct omap2430mputmr_softc *stat_sc;
|
||||
struct omap2430mputmr_softc *ref_sc;
|
||||
struct mputmr_softc *clock_sc;
|
||||
struct mputmr_softc *stat_sc;
|
||||
struct mputmr_softc *ref_sc;
|
||||
static uint32_t mpu_get_timecount(struct timecounter *);
|
||||
|
||||
static struct timecounter mpu_timecounter = {
|
||||
|
|
@ -116,37 +116,37 @@ static struct timecounter mpu_timecounter = {
|
|||
};
|
||||
|
||||
static inline void
|
||||
_timer_intr_dis(struct omap2430mputmr_softc *sc)
|
||||
_timer_intr_dis(struct mputmr_softc *sc)
|
||||
{
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, 0);
|
||||
}
|
||||
|
||||
static inline void
|
||||
_timer_intr_enb(struct omap2430mputmr_softc *sc)
|
||||
_timer_intr_enb(struct mputmr_softc *sc)
|
||||
{
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TIER, TIER_OVF_IT_ENA);
|
||||
}
|
||||
|
||||
static inline uint32_t
|
||||
_timer_intr_sts(struct omap2430mputmr_softc *sc)
|
||||
_timer_intr_sts(struct mputmr_softc *sc)
|
||||
{
|
||||
return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TISR);
|
||||
}
|
||||
|
||||
static inline void
|
||||
_timer_intr_ack(struct omap2430mputmr_softc *sc)
|
||||
_timer_intr_ack(struct mputmr_softc *sc)
|
||||
{
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TISR, TIER_OVF_IT_ENA);
|
||||
}
|
||||
|
||||
static inline uint32_t
|
||||
_timer_read(struct omap2430mputmr_softc *sc)
|
||||
_timer_read(struct mputmr_softc *sc)
|
||||
{
|
||||
return bus_space_read_4(sc->sc_iot, sc->sc_ioh, TCRR);
|
||||
}
|
||||
|
||||
static inline void
|
||||
_timer_stop(struct omap2430mputmr_softc *sc)
|
||||
_timer_stop(struct mputmr_softc *sc)
|
||||
{
|
||||
uint32_t r;
|
||||
|
||||
|
|
@ -156,14 +156,14 @@ _timer_stop(struct omap2430mputmr_softc *sc)
|
|||
}
|
||||
|
||||
static inline void
|
||||
_timer_reload(struct omap2430mputmr_softc *sc, uint32_t val)
|
||||
_timer_reload(struct mputmr_softc *sc, uint32_t val)
|
||||
{
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TLDR, val);
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh, TCRR, val);
|
||||
}
|
||||
|
||||
static inline void
|
||||
_timer_start(struct omap2430mputmr_softc *sc, timer_factors *tfp)
|
||||
_timer_start(struct mputmr_softc *sc, timer_factors *tfp)
|
||||
{
|
||||
uint32_t r=0;
|
||||
|
||||
|
|
@ -199,7 +199,7 @@ statintr(void *frame)
|
|||
}
|
||||
|
||||
static void
|
||||
setclockrate(struct omap2430mputmr_softc *sc, int schz)
|
||||
setclockrate(struct mputmr_softc *sc, int schz)
|
||||
{
|
||||
timer_factors tf;
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/* $Id: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
|
||||
/* $Id: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/* adapted from: */
|
||||
/* $NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $ */
|
||||
/* $NetBSD: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -103,7 +103,7 @@
|
|||
|
||||
#include "opt_omap.h"
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
|
||||
|
||||
#include "locators.h"
|
||||
#include "obio.h"
|
||||
|
|
@ -121,8 +121,8 @@ __KERNEL_RCSID(0, "$NetBSD: omap2_obio.c,v 1.3 2008/05/02 23:46:12 martin Exp $"
|
|||
#include <arm/mainbus/mainbus.h>
|
||||
#include <arm/omap/omap_var.h>
|
||||
|
||||
#include <arm/omap/omap2430obioreg.h>
|
||||
#include <arm/omap/omap2430obiovar.h>
|
||||
#include <arm/omap/omap2_obioreg.h>
|
||||
#include <arm/omap/omap2_obiovar.h>
|
||||
|
||||
typedef struct {
|
||||
boolean_t cs_valid;
|
||||
|
|
@ -152,25 +152,39 @@ static void obio_attach_critical(struct obio_softc *);
|
|||
CFATTACH_DECL(obio, sizeof(struct obio_softc),
|
||||
obio_match, obio_attach, NULL, NULL);
|
||||
|
||||
static uint8_t obio_attached[NOBIO];
|
||||
static uint8_t obio_attached;
|
||||
|
||||
static int
|
||||
obio_match(device_t parent, cfdata_t match, void *aux)
|
||||
{
|
||||
struct mainbus_attach_args *mb = aux;
|
||||
|
||||
#ifdef OMAP2_OBIO_0_BASE
|
||||
if (mb->mb_iobase == OMAP2_OBIO_0_BASE
|
||||
&& mb->mb_iosize == OMAP2_OBIO_0_SIZE
|
||||
&& (obio_attached & 1) == 0)
|
||||
return 1;
|
||||
#endif
|
||||
|
||||
#if defined(OMAP2)
|
||||
if ((mb->mb_iobase == OMAP2430_OBIO_0_BASE)
|
||||
&& (mb->mb_iosize == OMAP2430_OBIO_0_SIZE)
|
||||
&& (obio_attached[0] == 0))
|
||||
#ifdef OMAP2_OBIO_1_BASE
|
||||
if (mb->mb_iobase == OMAP2_OBIO_1_BASE
|
||||
&& mb->mb_iosize == OMAP2_OBIO_1_SIZE
|
||||
&& (obio_attached & 2) == 0)
|
||||
return 1;
|
||||
if ((mb->mb_iobase == OMAP2430_OBIO_1_BASE)
|
||||
&& (mb->mb_iosize == OMAP2430_OBIO_1_SIZE)
|
||||
&& (obio_attached[1] == 0))
|
||||
#endif
|
||||
|
||||
#ifdef OMAP2_OBIO_2_BASE
|
||||
if (mb->mb_iobase == OMAP2_OBIO_2_BASE
|
||||
&& mb->mb_iosize == OMAP2_OBIO_2_SIZE
|
||||
&& (obio_attached & 4) == 0)
|
||||
return 1;
|
||||
#endif
|
||||
|
||||
#ifdef OMAP2_OBIO_3_BASE
|
||||
if (mb->mb_iobase == OMAP2_OBIO_3_BASE
|
||||
&& mb->mb_iosize == OMAP2_OBIO_3_SIZE
|
||||
&& (obio_attached & 8) == 0)
|
||||
return 1;
|
||||
#else
|
||||
# error unknown OMAP implementation
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
|
@ -193,11 +207,21 @@ obio_attach(device_t parent, device_t self, void *aux)
|
|||
sc->sc_base = mb->mb_iobase;
|
||||
sc->sc_size = mb->mb_iosize;
|
||||
|
||||
#if defined(OMAP2)
|
||||
if (mb->mb_iobase == OMAP2430_OBIO_0_BASE)
|
||||
obio_attached[0] = 1;
|
||||
if (mb->mb_iobase == OMAP2430_OBIO_1_BASE)
|
||||
obio_attached[1] = 1;
|
||||
#ifdef OMAP2_OBIO_0_BASE
|
||||
if (mb->mb_iobase == OMAP2_OBIO_0_BASE)
|
||||
obio_attached |= 1;
|
||||
#endif
|
||||
#ifdef OMAP2_OBIO_1_BASE
|
||||
else if (mb->mb_iobase == OMAP2_OBIO_1_BASE)
|
||||
obio_attached |= 2;
|
||||
#endif
|
||||
#ifdef OMAP2_OBIO_2_BASE
|
||||
else if (mb->mb_iobase == OMAP2_OBIO_2_BASE)
|
||||
obio_attached |= 4;
|
||||
#endif
|
||||
#ifdef OMAP2_OBIO_3_BASE
|
||||
else if (mb->mb_iobase == OMAP2_OBIO_3_BASE)
|
||||
obio_attached |= 8;
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,5 @@
|
|||
/* $NetBSD: omap2430mputmrvar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
|
||||
/* $NetBSD: omap2_obioreg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2007 Microsoft
|
||||
* All rights reserved.
|
||||
|
|
@ -27,43 +28,31 @@
|
|||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
/*
|
||||
* derived from omapmputmrvar.h
|
||||
*/
|
||||
#ifndef _ARM_OMAP_OMAP2_OBIOREG_H_
|
||||
#define _ARM_OMAP_OMAP2_OBIOREG_H_
|
||||
|
||||
#ifndef _OMAP2430GPTMRVAR_H
|
||||
#define _OMAP2430GPTMRVAR_H
|
||||
#include <arm/omap/omap2_reg.h>
|
||||
|
||||
#if defined(OMAP_2430) || defined(OMAP_2420)
|
||||
#define OMAP2_OBIO_0_BASE OMAP2430_L4_CORE_BASE
|
||||
#define OMAP2_OBIO_0_SIZE OMAP2430_L4_CORE_SIZE
|
||||
|
||||
#ifndef STATHZ
|
||||
# define STATHZ 64
|
||||
#define OMAP2_OBIO_1_BASE OMAP2430_L4_WAKEUP_BASE
|
||||
#define OMAP2_OBIO_1_SIZE OMAP2430_L4_WAKEUP_SIZE
|
||||
#endif
|
||||
|
||||
typedef struct timer_factors {
|
||||
uint32_t ptv;
|
||||
uint32_t reload;
|
||||
uint32_t counts_per_usec;
|
||||
} timer_factors;
|
||||
#if defined(OMAP_3530)
|
||||
#define OMAP2_OBIO_0_BASE OMAP3530_L4_CORE_BASE
|
||||
#define OMAP2_OBIO_0_SIZE OMAP3530_L4_CORE_SIZE
|
||||
|
||||
struct omap2430mputmr_softc {
|
||||
struct device sc_dev;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
int sc_intr;
|
||||
};
|
||||
#define OMAP2_OBIO_1_BASE OMAP3530_L4_WAKEUP_BASE
|
||||
#define OMAP2_OBIO_1_SIZE OMAP3530_L4_WAKEUP_SIZE
|
||||
|
||||
#define OMAP2_OBIO_2_BASE OMAP3530_L4_PERPIHERAL_BASE
|
||||
#define OMAP2_OBIO_2_SIZE OMAP3530_L4_PERPIHERAL_SIZE
|
||||
|
||||
#define OMAP2_OBIO_3_BASE OMAP3530_L4_EMULATION_BASE
|
||||
#define OMAP2_OBIO_3_SIZE OMAP3530_L4_EMULATION_SIZE
|
||||
#endif
|
||||
|
||||
extern uint32_t counts_per_usec, counts_per_hz;
|
||||
extern uint32_t hardref;
|
||||
extern struct timeval hardtime;
|
||||
extern struct omap2430mputmr_softc *clock_sc;
|
||||
extern struct omap2430mputmr_softc *stat_sc;
|
||||
extern struct omap2430mputmr_softc *ref_sc;
|
||||
|
||||
extern void calc_timer_factors(int, struct timer_factors *);
|
||||
extern int clockintr(void *);
|
||||
extern int statintr(void *);
|
||||
extern void rtcinit(void);
|
||||
|
||||
#endif /* _OMAP2430GPTMRVAR_H */
|
||||
#endif /* _ARM_OMAP_OMAP2_OBIOREG_H_ */
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap2430obiovar.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
|
||||
/* $NetBSD: omap2_obiovar.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2007 Microsoft
|
||||
|
|
@ -28,8 +28,8 @@
|
|||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef _OMAP2430OBIOVAR_H
|
||||
#define _OMAP2430OBIOVAR_H
|
||||
#ifndef _ARM_OMAP_OMAP2_OBIOVAR_H_
|
||||
#define _ARM_OMAP_OMAP2_OBIOVAR_H_
|
||||
|
||||
struct obio_attach_args {
|
||||
bus_space_tag_t obio_iot;
|
||||
|
|
@ -41,4 +41,4 @@ struct obio_attach_args {
|
|||
unsigned int obio_intrbase;
|
||||
};
|
||||
|
||||
#endif /* _OMAP2430OBIOVAR_H */
|
||||
#endif /* _ARM_OMAP_OMAP2_OBIOVAR_H_ */
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap2430reg.h,v 1.2 2008/04/27 18:58:45 matt Exp $ */
|
||||
/* $NetBSD: omap2_reg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2007 Microsoft
|
||||
|
|
@ -29,8 +29,8 @@
|
|||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _OMAP2430REG_H
|
||||
#define _OMAP2430REG_H
|
||||
#ifndef _ARM_OMAP_OMAP2_REG_H_
|
||||
#define _ARM_OMAP_OMAP2_REG_H_
|
||||
|
||||
/*
|
||||
* Header for misc. omap2430 registers
|
||||
|
|
@ -39,9 +39,23 @@
|
|||
/*
|
||||
* L4 Interconnect WAKEUP address space
|
||||
*/
|
||||
#define OMAP2430_L4_WAKEUP_BASE 0x49000000
|
||||
#define OMAP2430_L4_WAKEUP_SIZE (8 << 20) /* 8 MB */
|
||||
#define OMAP2430_L4_CORE_BASE 0x48000000
|
||||
#define OMAP2430_L4_CORE_SIZE (16 << 20) /* 16 MB */
|
||||
|
||||
#define OMAP2430_L4_WAKEUP_BASE 0x49000000
|
||||
#define OMAP2430_L4_WAKEUP_SIZE (8 << 20) /* 8 MB */
|
||||
|
||||
#define OMAP3530_L4_CORE_BASE 0x48000000
|
||||
#define OMAP3530_L4_CORE_SIZE 0x01000000 /* 16 MB */
|
||||
|
||||
#define OMAP3530_L4_WAKEUP_BASE 0x48300000
|
||||
#define OMAP3530_L4_WAKEUP_SIZE 0x00040000 /* 256KB */
|
||||
|
||||
#define OMAP3530_L4_PERIPHERAL_BASE 0x49000000
|
||||
#define OMAP3530_L4_PERIPHERAL_SIZE 0x00100000 /* 1MB */
|
||||
|
||||
#define OMAP3530_L4_EMULATION_BASE 0x54000000
|
||||
#define OMAP3530_L4_EMULATION_SIZE 0x00800000 /* 8MB */
|
||||
|
||||
/*
|
||||
* Clock Management registers base, offsets, and size
|
||||
|
|
@ -52,6 +66,9 @@
|
|||
#ifdef OMAP_2420
|
||||
#define OMAP2_CM_BASE 0x48008000
|
||||
#endif
|
||||
#ifdef OMAP_3530
|
||||
#define OMAP2_CM_BASE 0x48004000
|
||||
#endif
|
||||
|
||||
#define OMAP2_CM_CLKSEL_MPU 0x140
|
||||
#define OMAP2_CM_FCLKEN1_CORE 0x200
|
||||
|
|
@ -216,33 +233,33 @@
|
|||
/*
|
||||
* L3 Interconnect Target Agent Common Registers
|
||||
*/
|
||||
#define OMAP2430_TA_GPMC 0x68002400
|
||||
#define OMAP2430_TA_L4_CORE 0x68006800
|
||||
#define OMAP2_TA_GPMC 0x68002400
|
||||
#define OMAP2_TA_L4_CORE 0x68006800
|
||||
|
||||
/*
|
||||
* L3 Interconnect Target Agent Common Register offsets
|
||||
*/
|
||||
#define OMAP2430_TA_COMPONENT 0x0
|
||||
#define OMAP2430_TA_CORE 0x18
|
||||
#define OMAP2430_TA_AGENT_CONTROL 0x20
|
||||
#define OMAP2430_TA_AGENT_STATUS 0x28
|
||||
#define OMAP2430_TA_ERROR_LOG 0x58
|
||||
#define OMAP2430_TA_ERROR_LOG_ADDR 0x60
|
||||
#define OMAP2_TA_COMPONENT 0x00
|
||||
#define OMAP2_TA_CORE 0x18
|
||||
#define OMAP2_TA_AGENT_CONTROL 0x20
|
||||
#define OMAP2_TA_AGENT_STATUS 0x28
|
||||
#define OMAP2_TA_ERROR_LOG 0x58
|
||||
#define OMAP2_TA_ERROR_LOG_ADDR 0x60
|
||||
|
||||
/*
|
||||
* OMAP2430_TA_COMPONENT bits
|
||||
* OMAP2_TA_COMPONENT bits
|
||||
*/
|
||||
#define TA_COMPONENT_REV(r) ((r) & __BITS(15,0))
|
||||
#define TA_COMPONENT_CODE(r) (((r) >> 16) & __BITS(15,0))
|
||||
|
||||
/*
|
||||
* OMAP2430_TA_CORE bits
|
||||
* OMAP2_TA_CORE bits
|
||||
*/
|
||||
#define TA_AGENT_CORE_REV(r) ((r) & __BITS(15,0))
|
||||
#define TA_AGENT_CORE_CODE(r) (((r) >> 16) & __BITS(15,0))
|
||||
|
||||
/*
|
||||
* OMAP2430_TA_AGENT_CONTROL bits
|
||||
* OMAP2_TA_AGENT_CONTROL bits
|
||||
*/
|
||||
#define TA_AGENT_CONTROL_CORE_RESET __BIT(0)
|
||||
#define TA_AGENT_CONTROL_CORE_REJECT __BIT(4)
|
||||
|
|
@ -257,7 +274,7 @@
|
|||
#define TA_AGENT_CONTROL_CORE_REQ_TIMEOUT_REP __BIT(25)
|
||||
|
||||
/*
|
||||
* OMAP2430_TA_AGENT_STATUS bits
|
||||
* OMAP2_TA_AGENT_STATUS bits
|
||||
*/
|
||||
#define TA_AGENT_STATUS_CORE_RESET __BIT(0)
|
||||
#define TA_AGENT_STATUS_RESVa __BITS(3,1)
|
||||
|
|
@ -274,7 +291,7 @@
|
|||
#define TA_AGENT_STATUS_RESVd __BITS(31,25)
|
||||
|
||||
/*
|
||||
* OMAP2430_TA_ERROR_LOG bits
|
||||
* OMAP2_TA_ERROR_LOG bits
|
||||
*/
|
||||
#define TA_ERROR_LOG_CMD __BITS(2,0)
|
||||
#define TA_ERROR_LOG_RESa __BITS(7,3)
|
||||
|
|
@ -287,9 +304,6 @@
|
|||
/*
|
||||
* L4 Interconnect CORE address space
|
||||
*/
|
||||
#define OMAP2430_L4_CORE_BASE 0x48000000
|
||||
#define OMAP2430_L4_CORE_SIZE (16 << 20) /* 16 MB */
|
||||
|
||||
#define OMAP2430_L4_S3220_2430_WATCHDOGOCP24 0x48027000
|
||||
#define OMAP2430_L4_S3220_2430_DMTIMER_DMC2 0x4802B000
|
||||
#define OMAP2430_L4_S3220_2430_AP 0x48040000
|
||||
|
|
@ -344,21 +358,22 @@
|
|||
/*
|
||||
* L3 Interconnect Sideband Interconnect register base
|
||||
*/
|
||||
#define OMAP2430_SI_BASE 0x68000400
|
||||
#define OMAP2_SI_BASE 0x68000400
|
||||
|
||||
/*
|
||||
* L3 Interconnect Sideband Interconnect register offsets
|
||||
*/
|
||||
#define OMAP2430_SI_CONTOL 0x20
|
||||
#define OMAP2430_SI_FLAG_STATUS_0 0x110 /* APE_app */
|
||||
#define OMAP2430_SI_FLAG_STATUS_1 0x130 /* APE_dbg */
|
||||
#define OMAP2430_SI_FLAG_STATUS_2 0x150 /* MODEM_app */
|
||||
#define OMAP2430_SI_FLAG_STATUS_3 0x170 /* MODEM_dbg */
|
||||
#define OMAP2_SI_CONTOL 0x0020
|
||||
#define OMAP2_SI_FLAG_STATUS_0 0x0110 /* APE_app */
|
||||
#define OMAP2_SI_FLAG_STATUS_1 0x0130 /* APE_dbg */
|
||||
#define OMAP2_SI_FLAG_STATUS_2 0x0150 /* MODEM_app */
|
||||
#define OMAP2_SI_FLAG_STATUS_3 0x0170 /* MODEM_dbg */
|
||||
|
||||
/*
|
||||
* Interrupts
|
||||
*/
|
||||
#define INTC_BASE 0x480FE000
|
||||
#define INTC_BASE 0x480FE000
|
||||
#define INTC_BASE_3530 0x48200000
|
||||
#define INTC_REVISISON 0x0000
|
||||
#define INTC_SYSCONFIG 0x0010
|
||||
#define INTC_SYSSTATUS 0x0014
|
||||
|
|
@ -426,6 +441,13 @@
|
|||
#define GPIO3_BASE_2420 0x4801c000
|
||||
#define GPIO4_BASE_2420 0x4801e000
|
||||
|
||||
#define GPIO1_BASE_3530 0x48310000
|
||||
#define GPIO2_BASE_3530 0x49050000
|
||||
#define GPIO3_BASE_3530 0x49052000
|
||||
#define GPIO4_BASE_3530 0x49054000
|
||||
#define GPIO5_BASE_3530 0x49056000
|
||||
#define GPIO6_BASE_3530 0x49058000
|
||||
|
||||
#define GPIO_IRQSTATUS1 0x018
|
||||
#define GPIO_IRQENABLE1 0x01c
|
||||
#define GPIO_WAKEUPENABLE 0x020
|
||||
|
|
@ -450,4 +472,4 @@
|
|||
#define GPIO_CLEARDATAOUT 0x090
|
||||
#define GPIO_SETDATAOUT 0x094
|
||||
|
||||
#endif /* _OMAP2430H */
|
||||
#endif /* _ARM_OMAP_OMAP2_REG_H_ */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
#
|
||||
# $NetBSD: TISDP2420,v 1.4 2008/07/31 07:41:00 simonb Exp $
|
||||
# $NetBSD: TISDP2420,v 1.5 2008/08/27 11:03:09 matt Exp $
|
||||
#
|
||||
# TISDP2420 -- TI OMAP 2420 Eval Board Kernel
|
||||
#
|
||||
|
|
@ -19,6 +19,7 @@ options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
|
|||
|
||||
options CPU_ARM1136
|
||||
options OMAP_2420
|
||||
options PMAPCOUNTERS
|
||||
|
||||
# Architecture options
|
||||
|
||||
|
|
@ -216,11 +217,11 @@ options CONSADDR=0x4806a000, CONSPEED=57600
|
|||
##omap2430intc0 at obio? # Interrupt controller
|
||||
|
||||
# Operating System Timer
|
||||
omap2430mputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
|
||||
omapmputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
|
||||
# Statistics Timer
|
||||
omap2430mputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
|
||||
omapmputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
|
||||
# Microtime Reference Timer
|
||||
omap2430mputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
|
||||
omapmputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
|
||||
options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
|
||||
|
||||
# Watchdog timers
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#
|
||||
# $NetBSD: TISDP2430,v 1.4 2008/07/31 07:41:00 simonb Exp $
|
||||
# $NetBSD: TISDP2430,v 1.5 2008/08/27 11:03:10 matt Exp $
|
||||
#
|
||||
# TISDP2430 -- TI OMAP 2430 Eval Board Kernel
|
||||
#
|
||||
|
|
@ -207,11 +207,11 @@ options CONSADDR=0x4806a000, CONSPEED=115200
|
|||
##omap2430intc0 at obio? # Interrupt controller
|
||||
|
||||
# Operating System Timer
|
||||
omap2430mputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
|
||||
omapmputmr0 at obio? addr 0x4802a000 intr 38 # GP Timer 2
|
||||
# Statistics Timer
|
||||
omap2430mputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
|
||||
omapmputmr1 at obio? addr 0x48078000 intr 39 # GP Timer 3
|
||||
# Microtime Reference Timer
|
||||
omap2430mputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
|
||||
omapmputmr2 at obio? addr 0x4807A000 intr 40 # GP Timer 4
|
||||
options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
|
||||
|
||||
# Watchdog timers
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.2 2008/04/27 18:58:47 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.3 2008/08/27 11:03:10 matt Exp $");
|
||||
|
||||
#include "locators.h"
|
||||
|
||||
|
|
@ -57,7 +57,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_sm_gpmc.c,v 1.2 2008/04/27 18:58:47 matt Exp $");
|
|||
#include <dev/ic/smc91cxxreg.h>
|
||||
#include <dev/ic/smc91cxxvar.h>
|
||||
|
||||
#include <arch/arm/omap/omap2430gpmcvar.h>
|
||||
#include <arch/arm/omap/omap2_gpmcvar.h>
|
||||
#include <arch/arm/omap/omap_gpio.h>
|
||||
|
||||
static int sm_gpmc_match(struct device *, struct cfdata *, void *);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sdp24xx.h,v 1.2 2008/04/27 18:58:47 matt Exp $ */
|
||||
/* $NetBSD: sdp24xx.h,v 1.3 2008/08/27 11:03:10 matt Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2007 Microsoft
|
||||
* All rights reserved.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
#ifndef _EVBARM_TISDP24XX_SDP24XX_H
|
||||
#define _EVBARM_TISDP24XX_SDP24XX_H
|
||||
|
||||
#include <arm/omap/omap2430reg.h>
|
||||
#include <arm/omap/omap2_reg.h>
|
||||
|
||||
/*
|
||||
* Kernel VM space: 192MB at KERNEL_VM_BASE
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sdp24xx_machdep.c,v 1.3 2008/06/30 00:49:31 perry Exp $ */
|
||||
/* $NetBSD: sdp24xx_machdep.c,v 1.4 2008/08/27 11:03:10 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Machine dependent functions for kernel setup for TI OSK5912 board.
|
||||
|
|
@ -125,7 +125,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: sdp24xx_machdep.c,v 1.3 2008/06/30 00:49:31 perry Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: sdp24xx_machdep.c,v 1.4 2008/08/27 11:03:10 matt Exp $");
|
||||
|
||||
#include "opt_machdep.h"
|
||||
#include "opt_ddb.h"
|
||||
|
|
@ -187,6 +187,7 @@ u_int cpu_reset_address = 0;
|
|||
|
||||
/* Define various stack sizes in pages */
|
||||
#define IRQ_STACK_SIZE 1
|
||||
#define FIQ_STACK_SIZE 1
|
||||
#define ABT_STACK_SIZE 1
|
||||
#ifdef IPKDB
|
||||
#define UND_STACK_SIZE 2
|
||||
|
|
@ -210,6 +211,7 @@ static paddr_t physical_freestart, physical_freeend;
|
|||
static u_int free_pages;
|
||||
|
||||
/* Physical and virtual addresses for some global pages */
|
||||
pv_addr_t fiqstack;
|
||||
pv_addr_t irqstack;
|
||||
pv_addr_t undstack;
|
||||
pv_addr_t abtstack;
|
||||
|
|
@ -469,7 +471,7 @@ initarm(void *arg)
|
|||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
/* Talk to the user */
|
||||
printf("\nNetBSD/evbarm (SDP2430) booting ...\n");
|
||||
printf("\nNetBSD/evbarm (SDP24xx) booting ...\n");
|
||||
#endif
|
||||
|
||||
#ifdef BOOT_ARGS
|
||||
|
|
@ -540,6 +542,7 @@ initarm(void *arg)
|
|||
printf("init subsystems: stacks ");
|
||||
#endif
|
||||
|
||||
set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
|
||||
set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
|
||||
set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
|
||||
set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
|
||||
|
|
@ -621,7 +624,7 @@ static void
|
|||
init_clocks(void)
|
||||
{
|
||||
#ifdef NOTYET
|
||||
static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP2430_L4_WAKEUP_VBASE + OMAP2430_CM_BASE + OMAP2430_CM_CLKSEL_MPU - OMAP2430_L4_WAKEUP_BASE);
|
||||
static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP2430_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP2430_L4_WAKEUP_BASE);
|
||||
uint32_t v;
|
||||
sdp_putchar('E');
|
||||
v = *clksel_reg;
|
||||
|
|
@ -788,6 +791,7 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
|
|||
systempage.pv_va = ARM_VECTORS_HIGH;
|
||||
|
||||
/* Allocate stacks for all modes */
|
||||
valloc_pages(fiqstack, FIQ_STACK_SIZE);
|
||||
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
||||
valloc_pages(abtstack, ABT_STACK_SIZE);
|
||||
valloc_pages(undstack, UND_STACK_SIZE);
|
||||
|
|
@ -855,6 +859,8 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
|
|||
#endif
|
||||
|
||||
/* Map the stack pages */
|
||||
pmap_map_chunk(l1_va, fiqstack.pv_va, fiqstack.pv_pa,
|
||||
FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_chunk(l1_va, irqstack.pv_va, irqstack.pv_pa,
|
||||
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_chunk(l1_va, abtstack.pv_va, abtstack.pv_pa,
|
||||
|
|
@ -919,6 +925,10 @@ printf("\t%#lx:%#lx\n", kernel_pt_table[pt_index].pv_va, kernel_pt_table[pt_inde
|
|||
systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1,
|
||||
(vaddr_t)ARM_VECTORS_HIGH, (vaddr_t)ARM_VECTORS_HIGH + PAGE_SIZE - 1,
|
||||
1);
|
||||
printf(mem_fmt, "FIQ stack",
|
||||
fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
|
||||
fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
|
||||
FIQ_STACK_SIZE);
|
||||
printf(mem_fmt, "IRQ stack",
|
||||
irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,
|
||||
irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,
|
||||
|
|
|
|||
|
|
@ -96,10 +96,10 @@
|
|||
#include <arm/armreg.h>
|
||||
#undef DOMAIN_CLIENT /* assym.h defines as 1, but pte.h defines as 0x01 */
|
||||
#include <arm/arm32/pmap.h>
|
||||
#include <arm/omap/omap2430obioreg.h>
|
||||
#include <arm/omap/omap2_obioreg.h>
|
||||
#include <evbarm/tisdp24xx/sdp24xx.h>
|
||||
|
||||
RCSID("$NetBSD: sdp24xx_start.S,v 1.2 2008/04/27 18:58:47 matt Exp $")
|
||||
RCSID("$NetBSD: sdp24xx_start.S,v 1.3 2008/08/27 11:03:10 matt Exp $")
|
||||
|
||||
#if 0
|
||||
#define Invalidate_I_cache(reg) \
|
||||
|
|
|
|||
Loading…
Reference in New Issue