Handle processor private interrupts better and add support for the PMU
interrupt. Thanks to jmcneill for review and suggestions.
This commit is contained in:
skrll
parent
6d3a7524b0
commit
b14a651935
@ -1,4 +1,4 @@
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/* $NetBSD: bcm2835_intr.c,v 1.18 2019/03/01 08:05:46 skrll Exp $ */
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/* $NetBSD: bcm2835_intr.c,v 1.19 2019/03/01 14:53:12 skrll Exp $ */
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/*-
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* Copyright (c) 2012, 2015 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.18 2019/03/01 08:05:46 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.19 2019/03/01 14:53:12 skrll Exp $");
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#define _INTR_PRIVATE
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@ -40,6 +40,8 @@ __KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.18 2019/03/01 08:05:46 skrll Exp
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/kmem.h>
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#include <sys/proc.h>
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#include <dev/fdt/fdtvar.h>
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@ -146,6 +148,20 @@ static struct fdtbus_interrupt_controller_func bcm2836mpicu_fdt_funcs = {
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.intrstr = bcm2836mp_icu_fdt_intrstr
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};
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struct bcm2836mp_interrupt {
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bool bi_done;
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TAILQ_ENTRY(bcm2836mp_interrupt) bi_next;
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int bi_irq;
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int bi_ipl;
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int bi_flags;
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int (*bi_func)(void *);
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void *bi_arg;
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void *bi_ihs[BCM2836_NCPUS];
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};
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static TAILQ_HEAD(, bcm2836mp_interrupt) bcm2836mp_interrupts =
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TAILQ_HEAD_INITIALIZER(bcm2836mp_interrupts);
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struct bcm2835icu_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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@ -450,20 +466,19 @@ bcm2835_icu_fdt_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen
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}
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#define BCM2836MP_TIMER_IRQS __BITS(3,0)
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#define BCM2836MP_MAILBOX_IRQS __BITS(4,4)
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#define BCM2836MP_ALL_IRQS (BCM2836MP_TIMER_IRQS | BCM2836MP_MAILBOX_IRQS)
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#define BCM2836MP_MAILBOX_IRQS __BITS(4,7)
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#define BCM2836MP_GPU_IRQ __BIT(8)
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#define BCM2836MP_PMU_IRQ __BIT(9)
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#define BCM2836MP_ALL_IRQS (BCM2836MP_TIMER_IRQS | BCM2836MP_MAILBOX_IRQS | BCM2836MP_GPU_IRQ | BCM2836MP_PMU_IRQ)
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static void
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bcm2836mp_pic_unblock_irqs(struct pic_softc *pic, size_t irqbase,
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uint32_t irq_mask)
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{
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struct cpu_info * const ci = curcpu();
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const cpuid_t cpuid = ci->ci_core_id;
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const bus_space_tag_t iot = bcml1icu_sc->sc_iot;
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const bus_space_handle_t ioh = bcml1icu_sc->sc_ioh;
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const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
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KASSERT(pic == &bcm2836mp_pic[cpuid]);
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KASSERT(irqbase == 0);
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if (irq_mask & BCM2836MP_TIMER_IRQS) {
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@ -492,6 +507,12 @@ bcm2836mp_pic_unblock_irqs(struct pic_softc *pic, size_t irqbase,
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BCM2836_LOCAL_MAILBOX_IRQ_CONTROL_SIZE,
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BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
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}
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if (irq_mask & BCM2836MP_PMU_IRQ) {
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bus_space_write_4(iot, ioh, BCM2836_LOCAL_PM_ROUTING_SET,
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__BIT(cpuid));
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bus_space_barrier(iot, ioh, BCM2836_LOCAL_PM_ROUTING_SET, 4,
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BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
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}
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return;
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}
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@ -500,12 +521,10 @@ static void
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bcm2836mp_pic_block_irqs(struct pic_softc *pic, size_t irqbase,
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uint32_t irq_mask)
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{
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struct cpu_info * const ci = curcpu();
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const cpuid_t cpuid = ci->ci_core_id;
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const bus_space_tag_t iot = bcml1icu_sc->sc_iot;
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const bus_space_handle_t ioh = bcml1icu_sc->sc_ioh;
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const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
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KASSERT(pic == &bcm2836mp_pic[cpuid]);
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KASSERT(irqbase == 0);
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if (irq_mask & BCM2836MP_TIMER_IRQS) {
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@ -526,6 +545,10 @@ bcm2836mp_pic_block_irqs(struct pic_softc *pic, size_t irqbase,
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BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(cpuid),
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val);
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}
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if (irq_mask & BCM2836MP_PMU_IRQ) {
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bus_space_write_4(iot, ioh, BCM2836_LOCAL_PM_ROUTING_CLR,
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__BIT(cpuid));
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}
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bcm2835_barrier();
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return;
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@ -656,14 +679,18 @@ bcm2836mp_intr_init(void *priv, struct cpu_info *ci)
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#if defined(MULTIPROCESSOR)
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intr_establish(BCM2836_INT_MAILBOX0_CPUN(cpuid), IPL_HIGH,
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IST_LEVEL | IST_MPSAFE, bcm2836mp_ipi_handler, NULL);
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#endif
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/* clock interrupt will attach with gtmr */
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if (cpuid == 0)
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return;
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#if defined(SOC_BCM2836)
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intr_establish(BCM2836_INT_CNTVIRQ_CPUN(cpuid), IPL_CLOCK,
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IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL);
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struct bcm2836mp_interrupt *bip;
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TAILQ_FOREACH(bip, &bcm2836mp_interrupts, bi_next) {
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if (bip->bi_done)
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continue;
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const int irq = BCM2836_INT_BASECPUN(cpuid) + bip->bi_irq;
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void *ih = intr_establish(irq, bip->bi_ipl,
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IST_LEVEL | bip->bi_flags, bip->bi_func, bip->bi_arg);
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bip->bi_ihs[cpuid] = ih;
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}
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#endif
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}
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@ -672,7 +699,7 @@ bcm2836mp_icu_fdt_decode_irq(u_int *specifier)
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{
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if (!specifier)
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return -1;
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return be32toh(specifier[0]) + BCM2836_INT_LOCALBASE;
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return be32toh(specifier[0]);
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}
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static void *
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@ -680,19 +707,95 @@ bcm2836mp_icu_fdt_establish(device_t dev, u_int *specifier, int ipl, int flags,
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int (*func)(void *), void *arg)
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{
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int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
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int irq;
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struct bcm2836mp_interrupt *bip;
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void *ih;
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irq = bcm2836mp_icu_fdt_decode_irq(specifier);
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int irq = bcm2836mp_icu_fdt_decode_irq(specifier);
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if (irq == -1)
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return NULL;
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return intr_establish(irq, ipl, IST_LEVEL | iflags, func, arg);
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TAILQ_FOREACH(bip, &bcm2836mp_interrupts, bi_next) {
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if (irq == bip->bi_irq)
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return NULL;
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}
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bip = kmem_alloc(sizeof(*bip), KM_SLEEP);
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if (bip == NULL)
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return NULL;
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bip->bi_done = false;
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bip->bi_irq = irq;
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bip->bi_ipl = ipl;
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bip->bi_flags = IST_LEVEL | iflags;
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bip->bi_func = func;
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bip->bi_arg = arg;
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/*
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* If we're not cold and the BPs have been started then we can register the
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* interupt for all CPUs now, e.g. PMU
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*/
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if (!cold) {
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for (cpuid_t cpuid = 0; cpuid < BCM2836_NCPUS; cpuid++) {
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ih = intr_establish(BCM2836_INT_BASECPUN(cpuid) + irq, ipl,
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IST_LEVEL | iflags, func, arg);
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if (!ih) {
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kmem_free(bip, sizeof(*bip));
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return NULL;
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}
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bip->bi_ihs[cpuid] = ih;
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}
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bip->bi_done = true;
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ih = bip->bi_ihs[0];
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goto done;
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}
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/*
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* Otherwise we can only establish the interrupt for the BP and
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* delay until bcm2836mp_intr_init is called for each AP, e.g.
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* gtmr
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*/
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ih = intr_establish(BCM2836_INT_BASECPUN(0) + irq, ipl,
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IST_LEVEL | iflags, func, arg);
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if (!ih) {
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kmem_free(bip, sizeof(*bip));
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return NULL;
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}
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bip->bi_ihs[0] = ih;
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for (cpuid_t cpuid = 1; cpuid < BCM2836_NCPUS; cpuid++)
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bip->bi_ihs[cpuid] = NULL;
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done:
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TAILQ_INSERT_TAIL(&bcm2836mp_interrupts, bip, bi_next);
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/*
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* Return the intr_establish handle for cpu 0 for API compatibility.
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* Any cpu would do here as these sources don't support set_affinity
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* when the handle is used in interrupt_distribute(9)
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*/
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return ih;
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}
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static void
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bcm2836mp_icu_fdt_disestablish(device_t dev, void *ih)
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{
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intr_disestablish(ih);
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struct bcm2836mp_interrupt *bip;
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TAILQ_FOREACH(bip, &bcm2836mp_interrupts, bi_next) {
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if (bip->bi_ihs[0] == ih)
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break;
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}
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if (bip == NULL)
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return;
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for (cpuid_t cpuid = 0; cpuid < BCM2836_NCPUS; cpuid++)
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intr_disestablish(bip->bi_ihs[cpuid]);
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TAILQ_REMOVE(&bcm2836mp_interrupts, bip, bi_next);
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kmem_free(bip, sizeof(*bip));
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}
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static bool
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