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Make to flush the secondary cache when syncing PTEs when the Sheeva L2 cache

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is used.
This commit is contained in:
matt 2014-04-16 07:29:52 +00:00
parent c3b49b4f57
commit b0bab4c12e
1 changed files with 7 additions and 2 deletions
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9
sys/arch/arm/include/arm32/pmap.h
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@ -1,4 +1,4 @@
/* $NetBSD: pmap.h,v 1.131 2014/04/11 04:19:47 matt Exp $ */
/* $NetBSD: pmap.h,v 1.132 2014/04/16 07:29:52 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@ -503,8 +503,13 @@ extern int pmap_needs_pte_sync;
static inline void
pmap_ptesync(pt_entry_t *ptep, size_t cnt)
{
if (PMAP_NEEDS_PTE_SYNC)
if (PMAP_NEEDS_PTE_SYNC) {
cpu_dcache_wb_range((vaddr_t)ptep, cnt * sizeof(pt_entry_t));
#ifdef SHEEVA_L2_CACHE
cpu_sdcache_wb_range((vaddr_t)ptep, -1,
cnt * sizeof(pt_entry_t));
#endif
}
#if ARM_MMU_V7 > 0
__asm("dsb");
#endif