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Add the HPT370 DPLL output frequency register.

This commit is contained in:
bouyer 2004-03-10 21:55:21 +00:00
parent 6338d77271
commit b08ad7c74c
1 changed files with 3 additions and 1 deletions
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4
sys/dev/pci/pciide_hpt_reg.h
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@ -1,4 +1,4 @@
/* $NetBSD: pciide_hpt_reg.h,v 1.10 2003/10/05 17:48:49 bouyer Exp $ */
/* $NetBSD: pciide_hpt_reg.h,v 1.11 2004/03/10 21:55:21 bouyer Exp $ */
/*
* Copyright (c) 2000 Manuel Bouyer.
@ -124,6 +124,8 @@
#define HPT_SC2_SCLK 0x02
#define HPT_SC2_MAEN 0x01
#define HPT370_FOUT 0x7c /* DPLL output frequency */
static const u_int32_t hpt366_pio[] __attribute__((__unused__)) =
{0x00d0a7aa, 0x00c8a753, 0x00c8a742, 0x00c8a731};
static const u_int32_t hpt366_dma[] __attribute__((__unused__)) =