Add an initialization function of DS1287A RTC and call it during attach.

It looks the boot firmware doesn't initialize the control registers
of DS1287A (while it resets NVRAM settings) and RTC oscillator is not
started properly after replacement.

Now my LUNA-II can keep RTC properly even after reboot.
This commit is contained in:
tsutsui 2013-07-19 16:42:30 +00:00
parent cb2ad9b126
commit b0074c5d2c
2 changed files with 28 additions and 3 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: timekeeper.c,v 1.12 2013/01/26 15:44:14 tsutsui Exp $ */
/* $NetBSD: timekeeper.c,v 1.13 2013/07/19 16:42:30 tsutsui Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@ -31,7 +31,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: timekeeper.c,v 1.12 2013/01/26 15:44:14 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: timekeeper.c,v 1.13 2013/07/19 16:42:30 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -58,6 +58,7 @@ struct timekeeper_softc {
static int clock_match(device_t, cfdata_t, void *);
static void clock_attach(device_t, device_t, void *);
static void dsclock_init(struct timekeeper_softc *);
CFATTACH_DECL_NEW(clock, sizeof (struct timekeeper_softc),
clock_match, clock_attach, NULL, NULL);
@ -103,6 +104,7 @@ clock_attach(device_t parent, device_t self, void *aux)
sc->sc_todr.todr_gettime_ymdhms = dsclock_get;
sc->sc_todr.todr_settime_ymdhms = dsclock_set;
sc->sc_todr.cookie = sc;
dsclock_init(sc);
aprint_normal(": ds1287a\n");
break;
}
@ -161,6 +163,28 @@ mkclock_set(todr_chip_handle_t tch, struct clock_ymdhms *dt)
return 0;
}
static void
dsclock_init(struct timekeeper_softc *sc)
{
volatile uint8_t *chiptime = (void *)sc->sc_clock;
/*
* It looks the firmware ROM doesn't initialize DS1287 at all
* even after the chip is replaced, so explicitly initialize
* control registers here.
*/
chiptime = (void *)sc->sc_clock;
/* No DSE, 24HR, BINARY */
chiptime[MC_REGB] =
(chiptime[MC_REGB] & ~MC_REGB_DSE) |
(MC_REGB_24HR | MC_REGB_BINARY);
/* make sure to start integrated clock OSC */
chiptime[MC_REGA] =
(chiptime[MC_REGA] & ~MC_REGA_DVMASK) | MC_BASE_32_KHz;
}
/*
* Get the time of day, based on the clock's value and/or the base value.
*/

View File

@ -1,4 +1,4 @@
/* $NetBSD: timekeeper.h,v 1.2 2008/04/28 20:23:26 martin Exp $ */
/* $NetBSD: timekeeper.h,v 1.3 2013/07/19 16:42:30 tsutsui Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@ -62,6 +62,7 @@
#define MC_REGA_RSMASK 0x0f /* Interrupt rate select mask (see below) */
#define MC_REGA_DVMASK 0x70 /* Divisor select mask (see below) */
#define MC_REGA_UIP 0x80 /* Update in progress; read only. */
#define MC_BASE_32_KHz 0x20 /* 32 KHz crystal (enable OSC on DS1287) */
#define MC_REGB 0xb /* Control register B */
#define MC_REGB_DSE 0x01 /* Daylight Savings Enable */