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Remove redundant .req statements. 

Make various entry points non-profiling.
This commit is contained in:
mark 1998-04-01 22:59:25 +00:00
parent fd18f1a45b
commit ae5c857ba4
2 changed files with 10 additions and 27 deletions
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22
sys/arch/arm32/arm32/exception.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: exception.S,v 1.11 1997/10/14 10:18:45 mark Exp $ */ /* $NetBSD: exception.S,v 1.12 1998/04/01 22:59:25 mark Exp $ */
/* /*
* Copyright (c) 1994-1997 Mark Brinicombe. * Copyright (c) 1994-1997 Mark Brinicombe.
@ -46,14 +46,11 @@
*/ */
#include "ipkdb.h" #include "ipkdb.h"
#include <machine/asm.h>
#include <machine/cpu.h> #include <machine/cpu.h>
#include <machine/frame.h> #include <machine/frame.h>
#include "assym.h" #include "assym.h"
sp .req r13
lr .req r14
pc .req r15
.text .text
.align 0 .align 0
@ -111,8 +108,7 @@ do_exit:
/* entry point for CPU data abort */ /* entry point for CPU data abort */
.global data_abort_entry ASENTRY_NP(data_abort_entry)
data_abort_entry:
sub lr, lr, #0x00000008 /* Adjust the lr */ sub lr, lr, #0x00000008 /* Adjust the lr */
PUSHFRAMEINSVC /* Push trap frame and switch */ PUSHFRAMEINSVC /* Push trap frame and switch */
@ -146,8 +142,7 @@ abortdatamsg:
.align 0 .align 0
.global prefetch_abort_entry ASENTRY_NP(prefetch_abort_entry)
prefetch_abort_entry:
sub lr, lr, #0x00000004 /* Adjust the lr */ sub lr, lr, #0x00000004 /* Adjust the lr */
PUSHFRAMEINSVC PUSHFRAMEINSVC
@ -187,8 +182,7 @@ abortprefetchmsg:
* Main entry point for the SWI vector * Main entry point for the SWI vector
*/ */
.global swi_entry ASENTRY_NP(swi_entry)
swi_entry:
PUSHFRAME PUSHFRAME
sub r0, lr, #0x00000004 /* Get the address of the SWI */ sub r0, lr, #0x00000004 /* Get the address of the SWI */
@ -232,8 +226,7 @@ do_swi_ast:
* entry from the vector. * entry from the vector.
*/ */
.global undefined_entry ASENTRY_NP(undefined_entry)
undefined_entry:
#if NIPKDB > 0 #if NIPKDB > 0
/* /*
* IPKDB must be hooked in at the earliest possible entry point. * IPKDB must be hooked in at the earliest possible entry point.
@ -371,8 +364,7 @@ Lundefined_handler_indirection:
* a standard trap frame and is called in SVC mode. * a standard trap frame and is called in SVC mode.
*/ */
.global _undefinedinstruction_bounce ENTRY_NP(undefinedinstruction_bounce)
_undefinedinstruction_bounce:
PUSHFRAMEINSVC PUSHFRAMEINSVC
mov r0, sp mov r0, sp
bl _undefinedinstruction bl _undefinedinstruction

15
sys/arch/arm32/arm32/setcpsr.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: setcpsr.S,v 1.3 1997/10/14 09:54:38 mark Exp $ */ /* $NetBSD: setcpsr.S,v 1.4 1998/04/01 22:59:25 mark Exp $ */
/* /*
* Copyright (c) 1994 Mark Brinicombe. * Copyright (c) 1994 Mark Brinicombe.
@ -49,22 +49,13 @@
#include <machine/asm.h> #include <machine/asm.h>
fp .req r11
ip .req r12
sp .req r13
lr .req r14
pc .req r15
.text
/* Sets and clears bits in the CPSR register /* Sets and clears bits in the CPSR register
* *
* r0 - bic mask * r0 - bic mask
* r1 - eor mask * r1 - eor mask
*/ */
ENTRY(SetCPSR) ENTRY_NP(SetCPSR)
mrs r3, cpsr_all /* Set the CPSR */ mrs r3, cpsr_all /* Set the CPSR */
bic r2, r3, r0 bic r2, r3, r0
eor r2, r2, r1 eor r2, r2, r1
@ -80,7 +71,7 @@ ENTRY(SetCPSR)
* Returns the CPSR in r0 * Returns the CPSR in r0
*/ */
ENTRY(GetCPSR) ENTRY_NP(GetCPSR)
mrs r0, cpsr_all /* Get the CPSR */ mrs r0, cpsr_all /* Get the CPSR */
mov pc, lr mov pc, lr