Fix vectored interrupts, and do autovectored ones similarly.
This commit is contained in:
parent
35a5b206df
commit
acbfd7b67d
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@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.25 1995/08/08 21:05:48 gwr Exp $ */
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/* $NetBSD: clock.c,v 1.26 1995/08/21 21:37:36 gwr Exp $ */
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/*
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* Copyright (c) 1994 Gordon W. Ross
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@ -100,7 +100,6 @@ int clockmatch(parent, vcf, args)
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return (1);
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}
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extern void level5intr_clock();
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void clockattach(parent, self, args)
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struct device *parent;
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struct device *self;
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@ -206,12 +205,13 @@ void
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cpu_initclocks(void)
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{
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int s;
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extern void _isr_clock();
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if (!intersil_clock)
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panic("cpu_initclocks");
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s = splhigh();
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isr_add_custom(5, level5intr_clock);
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isr_add_custom(5, _isr_clock);
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#ifdef DIAGNOSTIC
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clk_intr_ready = 1;
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: isr.c,v 1.18 1995/07/04 12:37:42 paulus Exp $ */
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/* $NetBSD: isr.c,v 1.19 1995/08/21 21:37:38 gwr Exp $ */
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/*
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* Copyright (c) 1994 Gordon W. Ross
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@ -53,7 +53,7 @@
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extern int intrcnt[]; /* statistics */
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#define NISR 8
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#define NUM_LEVELS 8
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struct isr {
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struct isr *isr_next;
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@ -62,7 +62,9 @@ struct isr {
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int isr_ipl;
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};
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static struct isr *isr_autovec_list[NISR];
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void set_vector_entry __P((int, void (*handler)()));
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unsigned int get_vector_entry __P((int));
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volatile u_char *interrupt_reg;
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@ -79,7 +81,7 @@ void isr_add_custom(level, handler)
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int level;
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void (*handler)();
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{
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set_vector_entry(AUTO_VECTOR_BASE + level, handler);
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set_vector_entry(AUTOVEC_BASE + level, handler);
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}
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static int isr_soft_pending;
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@ -220,15 +222,22 @@ int soft1intr(fp)
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}
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static struct isr *isr_autovec_list[NUM_LEVELS];
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/*
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* This is called by the assembly routines
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* for handling auto-vectored interupts.
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*/
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void isr_autovec(ipl)
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int ipl;
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void isr_autovec(evec)
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int evec; /* format | vector offset */
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{
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struct isr *isr;
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register int n;
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register int n, ipl, vec;
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vec = (evec & 0xFFF) >> 2;
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if ((vec < AUTOVEC_BASE) || (vec >= (AUTOVEC_BASE+8)))
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panic("isr_autovec: bad vec");
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ipl = vec - 0x18;
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n = intrcnt[ipl];
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intrcnt[ipl] = n+1;
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@ -262,7 +271,7 @@ void isr_add_autovect(handler, arg, level)
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{
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struct isr *new_isr;
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if ((level < 0) || (level >= NISR))
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if ((level < 0) || (level >= NUM_LEVELS))
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panic("isr_add: bad level=%d", level);
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new_isr = (struct isr *)
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malloc(sizeof(struct isr), M_DEVBUF, M_NOWAIT);
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@ -289,11 +298,12 @@ static struct vector_handler isr_vector_handlers[192];
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*/
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void
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isr_vectored(evec)
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u_short evec;
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int evec; /* format | vector offset */
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{
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int ipl, vec = evec >> 4;
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struct vector_handler *vh;
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register int ipl, vec;
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vec = (evec & 0xFFF) >> 2;
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ipl = getsr();
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ipl = (ipl >> 8) & 7;
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@ -320,7 +330,7 @@ isr_vectored(evec)
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* Establish an interrupt handler.
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* Called by driver attach functions.
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*/
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extern void vect_intr();
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extern void _isr_vectored();
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void isr_add_vectored(func, arg, level, vec)
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int (*func)();
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void *arg;
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@ -339,5 +349,24 @@ void isr_add_vectored(func, arg, level, vec)
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}
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vh->func = func;
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vh->arg = arg;
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set_vector_entry(vec, vect_intr);
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set_vector_entry(vec, _isr_vectored);
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}
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/*
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* XXX - could just kill these...
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*/
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void set_vector_entry(entry, handler)
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int entry;
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void (*handler)();
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{
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if ((entry <0) || (entry >= NVECTORS))
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panic("set_vector_entry: setting vector too high or low\n");
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vector_table[entry] = handler;
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}
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unsigned int get_vector_entry(entry)
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int entry;
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{
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if ((entry <0) || (entry >= NVECTORS))
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panic("get_vector_entry: setting vector too high or low\n");
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return (unsigned int) vector_table[entry];
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.31 1995/06/13 22:16:38 gwr Exp $ */
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/* $NetBSD: locore.s,v 1.32 1995/08/21 21:37:40 gwr Exp $ */
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/*
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* Copyright (c) 1994, 1995 Gordon W. Ross
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@ -546,70 +546,29 @@ Lsigr1:
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#define INTERRUPT_SAVEREG \
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moveml #0xC0C0,sp@-
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#define INTERRUPT_BODY(num) \
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pea num ;\
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jbsr _isr_autovec ;\
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addql #4,sp
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#define INTERRUPT_RESTORE \
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moveml sp@+,#0x0303
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#define INTERRUPT_HANDLE(num) ;\
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INTERRUPT_SAVEREG ;\
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INTERRUPT_BODY(num) ;\
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INTERRUPT_RESTORE ;\
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jra rei /* XXX - Just do rte here? */
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.globl _level0intr, _level1intr, _level2intr, _level3intr
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.globl _level4intr, _level5intr, _level6intr, _level7intr
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.align 4
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/*
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* These are the auto-vector interrupt handlers,
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* for which the CPU provides the vector=0x18+level
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* This is the common auto-vector interrupt handler,
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* for which the CPU provides the vector=0x18+level.
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* These are installed in the interrupt vector table.
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*/
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/* spurious interrupt */
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_level0intr:
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INTERRUPT_HANDLE(0)
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/* system enable register 1 */
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.align 4
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_level1intr:
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INTERRUPT_HANDLE(1)
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/* system enable register 2, SCSI */
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.align 4
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_level2intr:
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INTERRUPT_HANDLE(2)
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.globl __isr_autovec
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__isr_autovec:
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INTERRUPT_SAVEREG
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movw sp@(22),sp@- | push exception vector info
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clrw sp@-
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jbsr _isr_autovec | C dispatcher
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addql #4,sp
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INTERRUPT_RESTORE
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jra rei /* XXX - Just do rte here? */
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/* system enable register 3, Ethernet */
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/* clock: see clock.c */
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.globl __isr_clock, _interrupt_reg, _clock_intr, _clock_va
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.align 4
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_level3intr:
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INTERRUPT_HANDLE(3)
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/* video */
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.align 4
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_level4intr:
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INTERRUPT_HANDLE(4)
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/* clock (see below) */
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.align 4
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_level5intr:
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INTERRUPT_HANDLE(5)
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/* SCCs */
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.align 4
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_level6intr:
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INTERRUPT_HANDLE(6)
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/* Memory Error/NMI */
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.align 4
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_level7intr:
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INTERRUPT_HANDLE(7)
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/* clock */
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.globl _level5intr_clock, _interrupt_reg, _clock_intr, _clock_va
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.align 4
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_level5intr_clock:
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__isr_clock:
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INTERRUPT_SAVEREG | save a0, a1, d0, d1
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movl _clock_va, a0
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movl _interrupt_reg, a1
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INTERRUPT_RESTORE
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jra rei
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| Handler for all vectored interrupts (i.e. VME interrupts)
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.globl _isr_vectored
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.globl _vect_intr
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_vect_intr:
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.globl __isr_vectored
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__isr_vectored:
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INTERRUPT_SAVEREG
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movw sp@(22),sp@- | push exception vector info
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clrw sp@-
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@ -638,9 +598,7 @@ _vect_intr:
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#undef INTERRUPT_SAVEREG
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#undef INTERRUPT_BODY
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#undef INTERRUPT_RESTORE
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#undef INTERRUPT_HANDLE
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/* interrupt counters (needed by vmstat) */
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.globl _intrcnt,_eintrcnt,_intrnames,_eintrnames
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@ -1,4 +1,4 @@
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/* $NetBSD: vector.c,v 1.12 1995/01/18 17:14:47 gwr Exp $ */
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/* $NetBSD: vector.c,v 1.13 1995/08/21 21:37:41 gwr Exp $ */
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/*
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* Copyright (c) 1994 Gordon W. Ross
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@ -46,8 +46,7 @@ void addrerr(), badtrap(), buserr(), chkinst(), coperr(), fmterr(),
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fpfline(), fpunsupp(), illinst(), privinst(), trace(), trap0(),
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trap1(), trap12(), trap15(), trap2(), trapvinst(), zerodiv(), fpfault();
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void level0intr(), level1intr(), level2intr(), level3intr();
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void level4intr(), level5intr(), level6intr(), level7intr();
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void _isr_autovec();
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#define fpbsun fpfault
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#define fpdz fpfault
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@ -60,68 +59,68 @@ void level4intr(), level5intr(), level6intr(), level7intr();
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void (*vector_table[NVECTORS])() = {
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(void*)0xfffe000, /* 0: NOT USED (reset SP) */
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(void*)0xfef0000, /* 1: NOT USED (reset PC) */
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buserr, /* 2: bus error */
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addrerr, /* 3: address error */
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illinst, /* 4: illegal instruction */
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zerodiv, /* 5: zero divide */
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chkinst, /* 6: CHK instruction */
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trapvinst, /* 7: TRAPV instruction */
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privinst, /* 8: privilege violation */
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trace, /* 9: trace */
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illinst, /* 10: line 1010 emulator */
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fpfline, /* 11: line 1111 emulator */
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badtrap, /* 12: unassigned, reserved */
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coperr, /* 13: coprocessor protocol violatio */
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fmterr, /* 14: format error */
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badtrap, /* 15: uninitialized interrupt vecto */
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badtrap, /* 16: unassigned, reserved */
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badtrap, /* 17: unassigned, reserved */
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badtrap, /* 18: unassigned, reserved */
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badtrap, /* 19: unassigned, reserved */
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badtrap, /* 20: unassigned, reserved */
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badtrap, /* 21: unassigned, reserved */
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badtrap, /* 22: unassigned, reserved */
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badtrap, /* 23: unassigned, reserved */
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level0intr, /* 24: spurious interrupt */
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level1intr, /* 25: level 1 interrupt autovector */
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level2intr, /* 26: level 2 interrupt autovector */
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level3intr, /* 27: level 3 interrupt autovector */
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level4intr, /* 28: level 4 interrupt autovector */
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level5intr, /* 29: level 5 interrupt autovector */
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level6intr, /* 30: level 6 interrupt autovector */
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level7intr, /* 31: level 7 interrupt autovector */
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trap0, /* 32: syscalls (at least on hp300) */
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trap1, /* 33: sigreturn syscall or breakpoi */
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trap2, /* 34: breakpoint or sigreturn sysca */
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illinst, /* 35: TRAP instruction vector */
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illinst, /* 36: TRAP instruction vector */
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illinst, /* 37: TRAP instruction vector */
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illinst, /* 38: TRAP instruction vector */
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illinst, /* 39: TRAP instruction vector */
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illinst, /* 40: TRAP instruction vector */
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illinst, /* 41: TRAP instruction vector */
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illinst, /* 42: TRAP instruction vector */
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illinst, /* 43: TRAP instruction vector */
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trap12, /* 44: TRAP instruction vector */
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illinst, /* 45: TRAP instruction vector */
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illinst, /* 46: TRAP instruction vector */
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trap15, /* 47: TRAP instruction vector */
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fpbsun, /* 48: FPCP branch/set on unordered */
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fpinex, /* 49: FPCP inexact result */
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fpdz, /* 50: FPCP divide by zero */
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fpunfl, /* 51: FPCP underflow */
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fpoperr, /* 52: FPCP operand error */
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fpovfl, /* 53: FPCP overflow */
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fpsnan, /* 54: FPCP signalling NAN */
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fpunsupp, /* 55: FPCP unimplemented data type */
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badtrap, /* 56: unassigned, reserved */
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badtrap, /* 57: unassigned, reserved */
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badtrap, /* 58: unassigned, reserved */
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badtrap, /* 59: unassigned, reserved */
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badtrap, /* 60: unassigned, reserved */
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badtrap, /* 61: unassigned, reserved */
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badtrap, /* 62: unassigned, reserved */
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badtrap, /* 63: unassigned, reserved */
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buserr, /* 2: bus error */
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addrerr, /* 3: address error */
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illinst, /* 4: illegal instruction */
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zerodiv, /* 5: zero divide */
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chkinst, /* 6: CHK instruction */
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trapvinst, /* 7: TRAPV instruction */
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privinst, /* 8: privilege violation */
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trace, /* 9: trace */
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illinst, /* 10: line 1010 emulator */
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fpfline, /* 11: line 1111 emulator */
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badtrap, /* 12: unassigned, reserved */
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coperr, /* 13: coprocessor protocol violatio */
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fmterr, /* 14: format error */
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badtrap, /* 15: uninitialized interrupt vecto */
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badtrap, /* 16: unassigned, reserved */
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badtrap, /* 17: unassigned, reserved */
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badtrap, /* 18: unassigned, reserved */
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badtrap, /* 19: unassigned, reserved */
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badtrap, /* 20: unassigned, reserved */
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badtrap, /* 21: unassigned, reserved */
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badtrap, /* 22: unassigned, reserved */
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badtrap, /* 23: unassigned, reserved */
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_isr_autovec, /* 24: spurious interrupt */
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_isr_autovec, /* 25: level 1 interrupt autovector */
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_isr_autovec, /* 26: level 2 interrupt autovector */
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_isr_autovec, /* 27: level 3 interrupt autovector */
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_isr_autovec, /* 28: level 4 interrupt autovector */
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_isr_autovec, /* 29: level 5 interrupt autovector */
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_isr_autovec, /* 30: level 6 interrupt autovector */
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_isr_autovec, /* 31: level 7 interrupt autovector */
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trap0, /* 32: syscalls (at least on hp300) */
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trap1, /* 33: sigreturn syscall or breakpoi */
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trap2, /* 34: breakpoint or sigreturn sysca */
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illinst, /* 35: TRAP instruction vector */
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illinst, /* 36: TRAP instruction vector */
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illinst, /* 37: TRAP instruction vector */
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illinst, /* 38: TRAP instruction vector */
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illinst, /* 39: TRAP instruction vector */
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illinst, /* 40: TRAP instruction vector */
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illinst, /* 41: TRAP instruction vector */
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illinst, /* 42: TRAP instruction vector */
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illinst, /* 43: TRAP instruction vector */
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trap12, /* 44: TRAP instruction vector */
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illinst, /* 45: TRAP instruction vector */
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illinst, /* 46: TRAP instruction vector */
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trap15, /* 47: TRAP instruction vector */
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fpbsun, /* 48: FPCP branch/set on unordered */
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fpinex, /* 49: FPCP inexact result */
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fpdz, /* 50: FPCP divide by zero */
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fpunfl, /* 51: FPCP underflow */
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fpoperr, /* 52: FPCP operand error */
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fpovfl, /* 53: FPCP overflow */
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fpsnan, /* 54: FPCP signalling NAN */
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fpunsupp, /* 55: FPCP unimplemented data type */
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badtrap, /* 56: unassigned, reserved */
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badtrap, /* 57: unassigned, reserved */
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badtrap, /* 58: unassigned, reserved */
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badtrap, /* 59: unassigned, reserved */
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badtrap, /* 60: unassigned, reserved */
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badtrap, /* 61: unassigned, reserved */
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badtrap, /* 62: unassigned, reserved */
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badtrap, /* 63: unassigned, reserved */
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/* 64-255: set later by isr_add_vectored() */
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@ -129,22 +128,3 @@ void (*vector_table[NVECTORS])() = {
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BADTRAP16, BADTRAP16, BADTRAP16, BADTRAP16,
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BADTRAP16, BADTRAP16, BADTRAP16, BADTRAP16,
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};
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void set_vector_entry(entry, handler)
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int entry;
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void (*handler)();
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{
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if ((entry <0) || (entry >= NVECTORS))
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panic("set_vector_entry: setting vector too high or low\n");
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vector_table[entry] = handler;
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}
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unsigned int get_vector_entry(entry)
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int entry;
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{
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if ((entry <0) || (entry >= NVECTORS))
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panic("get_vector_entry: setting vector too high or low\n");
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return (unsigned int) vector_table[entry];
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: vector.h,v 1.8 1994/12/12 19:00:11 gwr Exp $ */
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/* $NetBSD: vector.h,v 1.9 1995/08/21 21:37:43 gwr Exp $ */
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/*
|
||||
* Copyright (c) 1993 Adam Glass
|
||||
|
@ -31,12 +31,8 @@
|
|||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define COPY_ENTRY 0
|
||||
#define NVECTORS 256
|
||||
|
||||
#define AUTO_VECTOR_BASE 0x18
|
||||
#define AUTOVEC_BASE 0x18
|
||||
|
||||
extern void (*vector_table[])();
|
||||
|
||||
void set_vector_entry __P((int, void (*handler)()));
|
||||
unsigned int get_vector_entry __P((int));
|
||||
|
|
Loading…
Reference in New Issue