- slave CPU using LPC UART or console
- don't use VERBOSE_INIT_ARM - dont configure obio UART - using intr -1 for now, causes callout interrupt polling can use that until serirq from 8712 works
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@ -126,7 +126,7 @@ options KTRACE # system call tracing, a la ktrace(1)
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options DIAGNOSTIC # internally consistency checks
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#options DEBUG
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#options PMAP_DEBUG # Enable pmap_debug_level code
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options VERBOSE_INIT_ARM # verbose bootstraping messages
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#options VERBOSE_INIT_ARM # verbose bootstraping messages
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options DDB # in-kernel debugger
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options DDB_ONPANIC=1
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options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
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@ -161,8 +161,15 @@ options MEMSIZE=64
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obio0 at mainbus?
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# On-board 16550 UART(s)
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com0 at obio? addr 0x42000000 intr 18 mult 4
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options CONSADDR=0x42000000, CONSPEED=19200
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##com0 at obio? addr 0x42000000 intr 18 mult 4
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##options CONSADDR=0x42000000, CONSPEED=19200
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# Aux COM at IT8712
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geminilpchc0 at obio? addr 0x47000000 intr 20
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lpc0 at geminilpchc0 addr 0x47800000
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com0 at lpc? ldn 0x01 addr 0x3f8 intr -1
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##com0 at lpc? ldn 0x01 addr 0x3f8 intr -1
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options CONSADDR=0x478003f8, CONSPEED=19200
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# Interrupt controller
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##geminiicu0 at obio0 addr 0x48000000 intrbase 0
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