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@ -1,4 +1,4 @@
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/* $NetBSD: cgfourteenreg.h,v 1.7 2010/06/12 21:25:56 macallan Exp $ */
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/* $NetBSD: cgfourteenreg.h,v 1.8 2024/05/12 07:22:13 macallan Exp $ */
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/*
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* Copyright (c) 1996
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@ -91,6 +91,39 @@ struct cg14ctl {
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#define CG14_RSR_REVMASK 0xf0 /* mask to get revision */
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#define CG14_RSR_IMPLMASK 0x0f /* mask to get impl. code */
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volatile uint8_t ctl_ccr; /* clock control register */
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#define CCR_SCL 0x01
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#define CCR_SDA 0x02
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#define CCR_SDA_DIR 0x04
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#define CCR_ASXSEL 0x08 /* the ICS1562 has 4 data/address lines and a */
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#define CCR_DATA 0xf0 /* toggle input - I suspect this is it */
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volatile uint32_t ctl_tmr; /* test mode readback */
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volatile uint8_t ctl_mod; /* monitor data register */
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/* reads 0x4 on mine, other bits in the lower half can be written with
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no obvious effect ( I suspect monitor ID ), upper half is hard zero
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*/
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volatile uint8_t ctl_acr; /* aux control register */
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#define ACR_BYTE_PIXEL 0x01 /* if unset pixels are 32bit */
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/* other bits are hard zero */
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uint8_t m_pad0[6]; /* Reserved */
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uint16_t m_hct; /* Horizontal Counter */
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uint16_t m_vct; /* Vertical Counter */
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uint16_t m_hbs; /* Horizontal Blank Start */
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uint16_t m_hbc; /* Horizontal Blank Clear */
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uint16_t m_hss; /* Horizontal Sync Set */
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uint16_t m_hsc; /* Horizontal Sync Set */
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uint16_t m_csc; /* Composite sync clear */
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uint16_t m_vbs; /* Vertical blank start */
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uint16_t m_vbc; /* Vertical Blank Clear */
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uint16_t m_vss; /* Verical Sync Set */
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uint16_t m_vsc; /* Verical Sync Clear */
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uint16_t m_xcs; /* XXX Gone in VSIMM 2 */
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uint16_t m_xcc; /* XXX Gone in VSIMM 2 */
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uint16_t m_fsa; /* Fault status address */
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uint16_t m_adr; /* Address register (autoincrements) */
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uint8_t m_pad2[0xce]; /* Reserved */
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/* PCG registers */
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uint8_t m_pcg[0x100]; /* Pixel Clock generator regs */
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/* XXX etc. */
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};
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@ -134,6 +167,35 @@ struct cg14xlut {
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volatile uint8_t xlut_lutincd[CG14_CLUT_SIZE];
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};
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/*
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* The XLUT and ctl_ppr bits are the same - in 8bit ppr is used, in 16bit and
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* 24bit XLUT
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* here we select two colours, either RGB or a component passed through a
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* CLUT, and blend them together. The alpha value is taken from the right
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* source's CLUT's upper byte, with 0x80 being 1.0 and 0x00 being 0.0
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*/
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#define CG14_LEFT_PASSTHROUGH 0x00
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#define CG14_LEFT_CLUT1 0x40
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#define CG14_LEFT_CLUT2 0x80
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#define CG14_LEFT_CLUT3 0xc0
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#define CG14_RIGHT_PASSTHROUGH 0x00
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#define CG14_RIGHT_CLUT1 0x10
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#define CG14_RIGHT_CLUT2 0x20
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#define CG14_RIGHT_CLUT3 0x30
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/* 0 is passthrough again */
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#define CG14_LEFT_B 0x04
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#define CG14_LEFT_G 0x08
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#define CG14_LEFT_R 0x0c
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/* except here 0 selects the X channel */
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#define CG14_RIGHT_X 0x00
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#define CG14_RIGHT_B 0x01
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#define CG14_RIGHT_G 0x02
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#define CG14_RIGHT_R 0x03
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/* Color Look-Up Table (CLUT) */
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struct cg14clut {
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volatile uint32_t clut_lut[CG14_CLUT_SIZE]; /* the LUT */
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