Initial commit.

2000-06-14 15:39:55 +00:00 · 2000-06-14 15:39:55 +00:00 · abe9dea12f
parent 66ac6d517e
commit abe9dea12f
55 changed files with 1963 additions and 0 deletions
--- a/sys/arch/sgimips/conf/INDY
+++ b/sys/arch/sgimips/conf/INDY
@ -0,0 +1,119 @@
+#	$NetBSD: INDY,v 1.1 2000/06/14 15:45:37 soren Exp $
+
+include		"arch/sgimips/conf/std.sgimips"
+
+# XXX _LOW _HOW og/eller TEXTADDR
+
+makeoptions 	TEXTADDR=0x80002000	# O2
+#makeoptions 	TEXTADDR=0x80069000	# O2 Symmon
+#makeoptions 	TEXTADDR=0x88002000	# Indy
+#makeoptions 	TEXTADDR=0x88069000	# Indy Symmon
+#makeoptions 	TEXTADDR=0x8001c000	# IP27
+#makeoptions 	TEXTADDR=0x80300000	# IP27 Symmon
+
+maxusers	32
+
+#options 	SYSCALL_DEBUG
+#options 	PARANOIADIAG
+
+#options 	PCI_CONFIG_DUMP
+
+options 	SCSI_DELAY=0
+
+#options 	MIPS1
+options 	MIPS3
+options 	MIPS3_L2CACHE_ABSENT
+#options 	MIPS3_L2CACHE_PRESENT
+options 	MIPS3_5200		# XXX
+#options 	MIPS4
+
+#options 	MEMORY_DISK_HOOKS 
+#options 	MEMORY_DISK_IS_ROOT
+#options 	MEMORY_DISK_SERVER=0
+#options 	MINIROOTSIZE=8192
+
+options 	KTRACE
+
+options 	DDB
+options 	DDB_HISTORY_SIZE=100
+options 	DEBUG
+options 	DIAGNOSTIC
+#makeoptions 	DEBUG="-g"
+
+#options 	EXEC_ECOFF
+
+file-system	FFS
+file-system	NFS
+#file-system	KERNFS
+#file-system	PROCFS
+
+options 	SOFTDEP
+
+options 	FFS_EI
+
+options 	INET
+
+options 	SCSIVERBOSE
+
+options 	NFS_BOOT_DHCP
+#options 	NFS_BOOT_BOOTPARAM
+
+config		netbsd		root on ? type ?
+
+mainbus0 	at root
+cpu0 		at mainbus0
+
+# O2
+crime0 		at mainbus0 addr 0x14000000
+mace0 		at mainbus0 addr 0x1f000000
+macepci0 	at mace0 offset 0x080000 intr 7
+pci0 		at macepci0 bus 0
+mec0 		at mace0 offset 0x280000 intr 3
+pckbc0		at mace0 offset 0x320000 intr 5
+lpt0 		at mace0 offset 0x380000 intr 4
+com0 		at mace0 offset 0x390000 intr 4 # stride 8
+com1 		at mace0 offset 0x398000 intr 4 # stride 8
+tlp* 		at pci? dev ? function ?
+ne* 		at pci? dev ? function ?
+fxp* 		at pci? dev ? function ?
+inphy*		at mii? phy ?
+nsphy*		at mii? phy ?
+ahc0 		at pci0 dev 1 function ?
+ahc1 		at pci0 dev 2 function ?
+scsibus0 	at ahc0 channel ?
+#scsibus1 	at ahc1 channel ?
+sd*		at scsibus? target ? lun ?
+cd*		at scsibus? target ? lun ?
+
+#pckbd*		at pckbc?
+#pms*		at pckbc?
+#pmsi*		at pckbc?
+#wskbd*		at pckbd? console ?
+#wsmouse* 	at pms? mux 0
+#wsmouse* 	at pmsi? mux 0
+#wsdisplay* 	at foofb? console ?
+
+# Indy
+#imc0 		at mainbus0 addr 0x1fa00000
+#gio0 		at imc0
+#eisa0 		at imc0
+
+#hpc0 		at gio? addr 0x1fb80000
+#hpc1 		at gio? addr 0x1fb00000
+#hpc2 		at gio? addr 0x1f980000
+#sq0 		at hpc0 # net 0
+#sbic0 		at hpc0 # hd 0
+#sbic1 		at hpc0 # hd 1
+
+#zsc* 		at hpc0 # pbus0 device ?
+#zstty*		at zsc? channel ?
+
+#pbus0 		at hpc0
+
+#pckbc0 	at pbus0 device ?
+
+
+pseudo-device	loop
+pseudo-device	pty		64
+pseudo-device	bpfilter	8
+#pseudo-device	md		1
--- a/sys/arch/sgimips/conf/Makefile.sgimips
+++ b/sys/arch/sgimips/conf/Makefile.sgimips
@ -0,0 +1,251 @@
+#	$NetBSD: Makefile.sgimips,v 1.1 2000/06/14 15:45:37 soren Exp $
+
+# Makefile for NetBSD
+#
+# This makefile is constructed from a machine description:
+#	config machineid
+# Most changes should be made in the machine description
+#	/sys/arch/sgimips/conf/``machineid''
+# after which you should do
+#	config machineid
+# Machine generic makefile changes should be made in
+#	/sys/arch/sgimips/conf/Makefile.sgimips
+# after which config should be rerun for all machines of that type.
+#
+# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
+#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
+#
+# -DTRACE	compile in kernel tracing hooks
+# -DQUOTA	compile in file system quotas
+
+# DEBUG is set to -g if debugging.
+# PROF is set to -pg if profiling.
+
+AR?=		ar
+AS?=		as
+CC?=		cc
+CPP?=		cpp
+LD?=		ld
+LORDER?=	lorder
+MKDEP?=		mkdep
+NM?=		nm
+RANLIB?=	ranlib
+SIZE?=		size
+STRIP?=		strip
+TSORT?=		tsort -q
+
+COPTS?=		-O2
+
+TEXTADDR?=	0x80002000
+
+# source tree is located via $S relative to the compilation directory
+.ifndef S
+#S!=	cd ../../../..; pwd
+S=	../../../..
+.endif
+SGIMIPS= $S/arch/sgimips
+MIPS=	$S/arch/mips
+
+HAVE_EGCS!=	${CC} --version | egrep "^(2\.[89]|egcs)" ; echo
+INCLUDES=	-I. -I$S/arch -I$S -nostdinc
+CPPFLAGS=	${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -Dsgimips
+CWARNFLAGS?=	-Wall -Werror -Wstrict-prototypes -Wmissing-prototypes \
+		-Wpointer-arith
+# XXX Delete -Wuninitialized for now, since the compiler doesn't
+# XXX always get it right.  --thorpej 
+CWARNFLAGS+=	-Wno-uninitialized
+.if (${HAVE_EGCS} != "")
+CWARNFLAGS+=	-Wno-main
+.endif
+GP?=		-G 0
+CFLAGS=		${DEBUG} ${COPTS} ${CWARNFLAGS} ${GP} \
+		-mno-abicalls -mno-half-pic
+AFLAGS=		-x assembler-with-cpp -traditional-cpp -D_LOCORE
+LINKFLAGS=	-T ${MIPS}/conf/kern.ldscript.be -Ttext ${TEXTADDR} \
+		-e start ${GP}
+STRIPFLAGS=	-g -X -x
+
+%INCLUDES
+
+### find out what to use for libkern
+.include "$S/lib/libkern/Makefile.inc"
+.ifndef PROF
+LIBKERN=	${KERNLIB}
+.else
+LIBKERN=	${KERNLIB_PROF}
+.endif
+
+### find out what to use for libcompat
+.include "$S/compat/common/Makefile.inc"
+.ifndef PROF
+LIBCOMPAT=	${COMPATLIB}
+.else
+LIBCOMPAT=	${COMPATLIB_PROF}
+.endif
+
+# compile rules: rules are named ${TYPE}_${SUFFIX} where TYPE is NORMAL or
+# HOSTED}, and SUFFIX is the file suffix, capitalized (e.g. C for a .c file).
+
+NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+NOPROF_C=	${CC} ${CFLAGS} ${CPPFLAGS} -c $<
+NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<
+
+%OBJS
+
+%CFILES
+
+%SFILES
+
+# load lines for config "xxx" will be emitted as:
+# xxx: ${SYSTEM_DEP} swapxxx.o
+#	${SYSTEM_LD_HEAD}
+#	${SYSTEM_LD} swapxxx.o
+#	${SYSTEM_LD_TAIL}
+SYSTEM_OBJ=	locore.o locore_machdep.o
+.if !empty(IDENT:M-DMIPS1)
+SYSTEM_OBJ+=	locore_mips1.o
+.endif
+.if !empty(IDENT:M-DMIPS3)
+SYSTEM_OBJ+=	locore_mips3.o
+.endif
+SYSTEM_OBJ+=	fp.o param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT}
+SYSTEM_DEP=	Makefile ${SYSTEM_OBJ}
+SYSTEM_LD_HEAD=	@rm -f $@
+SYSTEM_LD=	@echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_OBJ}' vers.o ; \
+		${LD} ${LINKFLAGS} -o $@ ${SYSTEM_OBJ} vers.o
+# XXX
+SYSTEM_LD_TAIL=	@echo ${LD} -T ${MIPS}/conf/kern.ldscript.be -Ttext 0x88002000 \
+		-e start ${GP} -x -o $@.high '$${SYSTEM_OBJ}' vers.o ; \
+		${LD} -T ${MIPS}/conf/kern.ldscript.be -Ttext 0x88002000 \
+		-e start ${GP} -x -o $@.high ${SYSTEM_OBJ} vers.o swapnetbsd.o
+# XXX
+SYSTEM_LD_TAIL+=; \
+		${SIZE} $@; chmod 755 $@ ; \
+		${SIZE} $@.high; chmod 755 $@.high
+
+DEBUG?=
+.if ${DEBUG} == "-g"
+LINKFLAGS+=	-X
+SYSTEM_LD_TAIL+=; \
+		echo mv -f $@ $@.gdb; mv -f $@ $@.gdb; \
+		echo ${STRIP} ${STRIPFLAGS} -o $@ $@.gdb; \
+		${STRIP} ${STRIPFLAGS} -o $@ $@.gdb
+.else
+LINKFLAGS+=	-x
+.endif
+
+SYSTEM_LD_TAIL+=;\
+# XXX		echo elf2ecoff $@ $@.ecoff; elf2ecoff $@ $@.ecoff; \
+# XXX		chmod 755 $@.ecoff
+
+%LOAD
+
+assym.h: $S/kern/genassym.sh ${MIPS}/mips/genassym.cf
+	sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} \
+	  < ${MIPS}/mips/genassym.cf > assym.h.tmp && \
+	mv -f assym.h.tmp assym.h
+
+
+param.c: $S/conf/param.c
+	rm -f param.c
+	cp $S/conf/param.c .
+
+param.o: param.c Makefile
+	${NORMAL_C}
+
+ioconf.o: ioconf.c
+	${NORMAL_C}
+
+newvers: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
+	sh $S/conf/newvers.sh
+	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
+
+__CLEANKERNEL: .USE
+	@echo "${.TARGET}ing the kernel objects"
+	rm -f eddep *netbsd netbsd.ecoff netbsd.gdb tags *.[io] \
+	  [a-z]*.s [Ee]rrs linterrs makelinks assym.h.tmp assym.h
+
+__CLEANDEPEND: .USE
+	rm -f .depend
+
+clean: __CLEANKERNEL
+
+cleandir distclean: __CLEANKERNEL __CLEANDEPEND
+
+lint:
+	@lint -hbxncez -Dvolatile= ${CPPFLAGS} -UKGDB \
+	  ${MIPS}/mips/Locore.c ${CFILES} \
+	  ioconf.c param.c | \
+	  grep -v 'static function .* unused'
+
+tags:
+	@echo "see $S/kern/Makefile for tags"
+
+links:
+	egrep '#if' ${CFILES} | sed -f $S/conf/defines | \
+	  sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink
+	echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \
+	  sort -u | comm -23 - dontlink | \
+	  sed 's,../.*/\(.*.o\),rm -f \1; ln -s ../GENERIC/\1 \1,' > makelinks
+	sh makelinks && rm -f dontlink
+
+SRCS=	${MIPS}/mips/locore.S ${MIPS}/mips/fp.S \
+	${SGIMIPS}/sgimips/locore_machdep.S \
+	param.c ioconf.c ${CFILES} ${SFILES}
+depend: .depend
+.depend: ${SRCS} assym.h param.c
+	${MKDEP} ${AFLAGS} ${CPPFLAGS} ${MIPS}/mips/locore.S ${MIPS}/mips/fp.S
+	${MKDEP} -a ${AFLAGS} ${CPPFLAGS} ${SGIMIPS}/sgimips/locore_machdep.S
+	${MKDEP} -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES}
+.if (${SFILES} != "")
+	${MKDEP} -a ${AFLAGS} ${CPPFLAGS} ${SFILES}
+.endif
+	sh $S/kern/genassym.sh ${MKDEP} -f assym.dep ${CFLAGS} \
+	  ${CPPFLAGS} < ${MIPS}/mips/genassym.cf
+	@sed -e 's/.*\.o:.*\.c/assym.h:/' < assym.dep >> .depend
+	@rm -f assym.dep
+
+
+# depend on root or device configuration
+autoconf.o conf.o: Makefile
+
+# depend on network or filesystem configuration
+uipc_proto.o vfs_conf.o: Makefile
+
+# depend on maxusers
+machdep.o: Makefile
+
+# depend on CPU configuration
+machdep.o mainbus.o trap.o: Makefile
+
+# depend on System V IPC/shmem options
+mips_machdep.o pmap.o: Makefile
+
+locore.o: ${MIPS}/mips/locore.S assym.h
+	${NORMAL_S}
+
+locore_mips1.o: ${MIPS}/mips/locore_mips1.S assym.h
+	${NORMAL_S}
+
+locore_mips3.o: ${MIPS}/mips/locore_mips3.S assym.h
+	${NORMAL_S}
+
+# The install target can be redefined by putting a
+# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
+MACHINE_NAME!=  uname -n
+install: install-kernel-${MACHINE_NAME}
+.if !target(install-kernel-${MACHINE_NAME}})
+install-kernel-${MACHINE_NAME}:
+	rm -f /onetbsd
+	ln /netbsd /onetbsd
+	cp netbsd /nnetbsd
+	mv /nnetbsd /netbsd
+.endif
+
+fp.o: ${MIPS}/mips/fp.S assym.h
+	${NORMAL_S}
+
+locore_machdep.o: ${SGIMIPS}/sgimips/locore_machdep.S assym.h
+	${NORMAL_S}
+
+%RULES
--- a/sys/arch/sgimips/conf/files.sgimips
+++ b/sys/arch/sgimips/conf/files.sgimips
@ -0,0 +1,85 @@
+#	$NetBSD: files.sgimips,v 1.1 2000/06/14 15:45:37 soren Exp $
+
+maxpartitions 16
+
+maxusers 2 8 64
+
+device mainbus {[addr = -1]}
+attach mainbus at root
+file arch/sgimips/sgimips/mainbus.c	mainbus
+
+device cpu
+attach cpu at mainbus
+file arch/sgimips/sgimips/cpu.c		cpu
+
+define giobus {}
+
+device imc: giobus, eisabus
+attach imc at mainbus
+file arch/sgimips/dev/imc.c		imc
+
+device crime
+attach crime at mainbus
+file arch/sgimips/dev/crime.c		crime
+
+device mace {[offset = -1], [intr = -1]}
+attach mace at mainbus
+file arch/sgimips/dev/mace.c		mace
+
+attach com at mace with com_mace
+file arch/sgimips/dev/com_mace.c	com_mace
+
+device lpt
+attach lpt at mace with lpt_mace
+file arch/sgimips/dev/lpt_mace.c	lpt_mace
+
+attach pckbc at mace with pckbc_mace
+file arch/sgimips/dev/pckbc_mace.c	pckbc_mace
+
+device mec: arp, ether, ifnet, mii
+attach mec at mace
+file arch/sgimips/dev/if_mec.c		mec
+
+device macepci: pcibus
+attach macepci at mace
+file arch/sgimips/pci/macepci.c		macepci
+
+file arch/sgimips/sgimips/ip22.c
+file arch/sgimips/sgimips/ip27.c
+file arch/sgimips/sgimips/ip32.c
+
+file arch/sgimips/sgimips/arcs.c
+file arch/sgimips/sgimips/autoconf.c
+file arch/sgimips/sgimips/bus.c
+file arch/sgimips/sgimips/clock.c
+file arch/sgimips/sgimips/conf.c
+file arch/sgimips/sgimips/console.c
+file arch/sgimips/sgimips/disksubr.c
+file arch/sgimips/sgimips/machdep.c
+
+file arch/sgimips/sgimips/md_root.c	memory_disk_hooks
+major {md = 2}
+
+major {raid = 5} 
+
+file dev/clock_subr.c
+file dev/cons.c
+
+include "arch/sgimips/gio/files.gio"
+include "arch/sgimips/hpc/files.hpc"
+
+include "dev/pci/files.pci"
+file	arch/sgimips/pci/pci_machdep.c	pci
+
+include "dev/vme/files.vme"
+include "dev/eisa/files.eisa"
+include "dev/wscons/files.wscons"
+include "dev/wsfont/files.wsfont"
+include "dev/pckbc/files.pckbc"
+include "dev/mii/files.mii"
+include "dev/usb/files.usb"
+include "dev/scsipi/files.scsipi"
+major {sd = 10}
+major {cd = 12}
+include "dev/ata/files.ata"
+major {wd = 13}
--- a/sys/arch/sgimips/conf/std.sgimips
+++ b/sys/arch/sgimips/conf/std.sgimips
@ -0,0 +1,18 @@
+#	$NetBSD: std.sgimips,v 1.1 2000/06/14 15:45:37 soren Exp $
+
+machine sgimips mips
+
+prefix ../gnu/sys
+cinclude "conf/files.softdep"
+prefix
+
+options	EXEC_ELF32	# exec ELF32 binaries
+options	EXEC_SCRIPT	# exec #! scripts
+
+options __NO_SOFT_SERIAL_INTERRUPT
+
+options COM16650
+options TLP_MATCH_21040
+options TLP_MATCH_21041
+options TLP_MATCH_21140
+options TLP_MATCH_21142
--- a/sys/arch/sgimips/include/Makefile
+++ b/sys/arch/sgimips/include/Makefile
@ -0,0 +1,14 @@
+#	$NetBSD: Makefile,v 1.1 2000/06/14 15:39:55 soren Exp $
+
+KDIR=	/sys/arch/sgimips/include
+INCSDIR= /usr/include/sgimips
+
+INCS=	asm.h ansi.h aout_machdep.h arcs.h autoconf.h bsd-aout.h bswap.h \
+	cdefs.h conf.h cpu.h db_machdep.h disklabel.h ecoff_machdep.h \
+	elf_machdep.h endian.h endian_machdep.h float.h ieee.h ieeefp.h \
+	intr.h kcore.h kdbparam.h limits.h lock.h locore.h math.h \
+	mips_opcode.h param.h pci_machdep.h pcb.h pmap.h proc.h profile.h \
+	psl.h pte.h ptrace.h reg.h regdef.h regnum.h reloc.h setjmp.h signal.h \
+	stdarg.h trap.h types.h varargs.h vmparam.h z8530var.h
+
+.include <bsd.kinc.mk>
--- a/sys/arch/sgimips/include/ansi.h
+++ b/sys/arch/sgimips/include/ansi.h
@ -0,0 +1,3 @@
+/*	$NetBSD: ansi.h,v 1.1 2000/06/14 15:39:55 soren Exp $	*/
+
+#include <mips/ansi.h>
--- a/sys/arch/sgimips/include/aout_machdep.h
+++ b/sys/arch/sgimips/include/aout_machdep.h
@ -0,0 +1,3 @@
+/*	$NetBSD: aout_machdep.h,v 1.1 2000/06/14 15:39:55 soren Exp $	*/
+
+#include <mips/aout_machdep.h>
--- a/sys/arch/sgimips/include/arcs.h
+++ b/sys/arch/sgimips/include/arcs.h
@ -0,0 +1,170 @@
+/*	$NetBSD: arcs.h,v 1.1 2000/06/14 15:39:56 soren Exp $	*/
+
+/*
+ * Copyright (c) 2000 Soren S. Jorvang
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *          This product includes software developed for the
+ *          NetBSD Project.  See http://www.netbsd.org/ for
+ *          information about NetBSD.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * ARC (not quite ARCS) documentation is available at
+ * http://www.microsoft.com/hwdev/download/respec/riscspec.zip .
+ */
+
+#define ARCS_STDIN		0
+#define ARCS_STDOUT		1
+
+/* SGI ARCS firmware error codes */
+
+#define ARCS_ESUCCESS		0
+#define ARCS_E2BIG		1
+#define ARCS_EACCES		2
+#define ARCS_EAGAIN		3
+#define ARCS_EBADF		4
+#define ARCS_EBUSY		5
+#define ARCS_EFAULT		6
+#define ARCS_EINVAL		7
+#define ARCS_EIO		8
+#define ARCS_EISDIR		9
+#define ARCS_EMFILE		10
+#define ARCS_EMLINK		11
+#define ARCS_ENAMETOOLONG	12
+#define ARCS_ENODEV		13
+#define ARCS_ENOENT		14
+#define ARCS_ENOEXEC		15
+#define ARCS_ENOMEM		16
+#define ARCS_ENOSPC		17
+#define ARCS_ENOTDIR		18
+#define ARCS_ENOTTY		19
+#define ARCS_ENXIO		20
+#define ARCS_EROFS		21
+#define ARCS_EADDRNOTAVAIL	31
+#define ARCS_ETIMEDOUT		32
+#define ARCS_ECONNABORTED	33
+#define ARCS_ENOCONNECT		34
+
+struct arcs_sysid {
+	char Vendor[8];
+	char Serial[8];
+};
+
+#define ARCS_MEM_EXCEP	0		/* Exception Block */
+#define ARCS_MEM_SPB	1		/* System Parameter Block */
+#define ARCS_MEM_CONT	2		/* Contiguous Free Memory */
+#define ARCS_MEM_FREE	3		/* Free Memory */
+#define ARCS_MEM_BAD	4		/* Bad Memory */
+#define ARCS_MEM_PROG	5		/* Loaded Program */
+#define ARCS_MEM_TEMP	6		/* Firmware Temporary */
+#define ARCS_MEM_PERM	7		/* Firmware Permanent */
+
+struct arcs_mem {
+	int32_t		Type;
+	u_int32_t	BasePage;
+	u_int32_t	PageCount;
+};
+
+struct arcs_component {
+	u_int32_t	Class;
+	u_int32_t	Type;
+	u_int32_t	Flag;
+	u_int16_t	Version;
+	u_int16_t	Revision;
+	u_int32_t	Key;
+	u_int32_t	AffinityMask;
+	u_int32_t	ConfigurationDataSize;
+	u_int32_t	IdentifierLength;
+	char		*Identifier;
+};
+
+#define ARCS_PAGESIZE	4096
+
+/*
+ * Adding real types as we go along..
+ */
+struct arcs_fv {
+	int32_t		(*Load)(char *, u_int32_t, u_int32_t *, u_int32_t *);
+	int32_t		(*Invoke)(u_int32_t,u_int32_t,int32_t,char **,char **);
+	int32_t		(*Execute)(char *file, int32_t, char **, char **);
+	void		(*Halt)(void);
+	void		(*PowerDown)(void);
+	void		(*Restart)(void);
+	void		(*Reboot)(void);
+	void		(*EnterInteractiveMode)(void);
+	int32_t		_reserved1;
+	void		*(*GetPeer)(void *);
+	struct arcs_component *(*GetChild)(void *);
+	void		*(*GetParent)(void *);
+	int32_t		(*GetConfigurationData)(void *, void *);
+	void		*(*AddChild)(void *, void *, void *);
+	int32_t		(*DeleteComponent)(void *);
+	void		*(*GetComponent)(char *);
+	long		(*SaveConfiguration)(void);
+	struct arcs_sysid *(*GetSystemId)(void);
+	struct arcs_mem	*(*GetMemoryDescriptor)(struct arcs_mem *);
+	int32_t		_reserved2;
+	void		*(*GetTime)(void);
+	u_int32_t	(*GetRelativeTime)(void);
+	int32_t		(*GetDirectoryEntry)(void);
+	int32_t		(*Open)(void);
+	int32_t		(*Close)(u_int32_t);
+	int32_t		(*Read)(u_int32_t, void *, u_int32_t, u_int32_t *);
+	int32_t		(*GetReadStatus)(unsigned long fd);
+	int32_t		(*Write)(u_int32_t, void *, u_int32_t, u_int32_t *);
+	int32_t		(*Seek)(u_int32_t, int64_t *, int32_t);
+	int32_t		(*Mount)(char *file, int);
+	char		*(*GetEnvironmentVariable)(char *);
+	int32_t		(*SetEnvironmentVariable)(char *, char *);
+	int32_t		(*GetFileInformation)(unsigned long fd, void *);
+	int32_t		(*SetFileInformation)(u_int32_t, u_int32_t, u_int32_t);
+	void		(*FlushAllCaches)(void);
+};      
+
+struct arcs_spb {
+#define ARCS_MAGIC	0x53435241		/* 'S' 'C' 'R' 'A' */
+	u_int32_t	SPBSignature;
+	u_int32_t	SPBLength;
+	u_int16_t	Version;
+	u_int16_t	Revision;
+	int32_t		*RestartBlock;
+	int32_t		*DebugBlock;
+	int32_t		*GEVector;
+	int32_t		*UTLBMissVector;
+	u_int32_t	FirmwareVectorLength;
+	struct arcs_fv	*FirmwareVector;
+	u_int32_t	PrivateVectorLength;
+/*XXX*/	struct arcs_fv	*PrivateVector;
+	u_int32_t	AdapterCount;
+	struct {
+		u_int32_t	AdapterType;
+		u_int32_t	AdapterVectorLength;
+		u_int32_t	*AdapterVector;
+	} Adapter[1];
+};
+
+extern const struct arcs_fv *ARCS;
--- a/sys/arch/sgimips/include/asm.h
+++ b/sys/arch/sgimips/include/asm.h
@ -0,0 +1,3 @@
+/*	$NetBSD: asm.h,v 1.1 2000/06/14 15:39:56 soren Exp $	*/
+
+#include <mips/asm.h>
--- a/sys/arch/sgimips/include/autoconf.h
+++ b/sys/arch/sgimips/include/autoconf.h
@ -0,0 +1,47 @@
+/*	$NetBSD: autoconf.h,v 1.1 2000/06/14 15:39:56 soren Exp $	*/
+
+/*
+ * Copyright (c) 2000 Soren S. Jorvang
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *          This product includes software developed for the
+ *          NetBSD Project.  See http://www.netbsd.org/ for
+ *          information about NetBSD.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/bus.h>
+
+struct mainbus_attach_args {
+	char		*ma_name;
+	unsigned long	ma_addr;
+	int		ma_arch;
+#if 0					/* ? */
+	int		ma_swarch;
+	int		ma_hwarch;
+#endif
+	bus_space_tag_t	ma_iot;
+	bus_space_handle_t ma_ioh;
+};
--- a/sys/arch/sgimips/include/bsd-aout.h
+++ b/sys/arch/sgimips/include/bsd-aout.h
@ -0,0 +1,3 @@
+/*	$NetBSD: bsd-aout.h,v 1.1 2000/06/14 15:39:56 soren Exp $	*/
+
+#include <mips/bsd-aout.h>
--- a/sys/arch/sgimips/include/bswap.h
+++ b/sys/arch/sgimips/include/bswap.h
@ -0,0 +1,3 @@
+/*	$NetBSD: bswap.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/bswap.h>
--- a/sys/arch/sgimips/include/bus.h
+++ b/sys/arch/sgimips/include/bus.h
@ -0,0 +1,650 @@
+/*	$NetBSD: bus.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+/*
+ * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SGIMIPS_BUS_H_
+#define _SGIMIPS_BUS_H_
+
+#include <mips/locore.h>
+
+/*
+ * Utility macros; do not use outside this file.
+ */
+#define	__PB_TYPENAME_PREFIX(BITS)	___CONCAT(u_int,BITS)
+#define	__PB_TYPENAME(BITS)		___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
+
+/*
+ * Bus address and size types
+ */
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+
+/*
+ * Access methods for bus resources and address space.
+ */
+typedef int	bus_space_tag_t;
+typedef u_long	bus_space_handle_t;
+
+/*
+ *	int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
+ *	    bus_size_t size, int flags, bus_space_handle_t *bshp);
+ *
+ * Map a region of bus space.
+ */
+
+#define	BUS_SPACE_MAP_CACHEABLE		0x01
+#define	BUS_SPACE_MAP_LINEAR		0x02
+#define BUS_SPACE_MAP_PREFETCHABLE	0x04
+
+int	bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
+	    int, bus_space_handle_t *);
+
+/*
+ *	void bus_space_unmap(bus_space_tag_t t,
+ *	     bus_space_handle_t bsh, bus_size_t size);
+ *
+ * Unmap a region of bus space.
+ */
+
+void	bus_space_unmap (bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+/*
+ *	int bus_space_subregion(bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
+ *	    bus_space_handle_t *nbshp);
+ *
+ * Get a new handle for a subregion of an already-mapped area of bus space.
+ */
+
+int	bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
+	    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
+
+/*
+ *	int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
+ *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
+ *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
+ *	    bus_space_handle_t *bshp);
+ *
+ * Allocate a region of bus space.
+ */
+
+int	bus_space_alloc (bus_space_tag_t t, bus_addr_t rstart,
+	    bus_addr_t rend, bus_size_t size, bus_size_t align,
+	    bus_size_t boundary, int cacheable, bus_addr_t *addrp,
+	    bus_space_handle_t *bshp);
+
+/*
+ *	int bus_space_free (bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t size);
+ *
+ * Free a region of bus space.
+ */
+
+void	bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
+	    bus_size_t size);
+
+/*
+ *	u_intN_t bus_space_read_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset);
+ *
+ * Read a 1, 2, 4, or 8 byte quantity from bus space
+ * described by tag/handle/offset.
+ */
+
+u_int8_t bus_space_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int16_t bus_space_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+#define	bus_space_read_4(t, h, o)					\
+(wbflush(), /* XXX */							\
+     (void) t, (*(volatile u_int32_t *)((h) + (o))))
+
+/* XXX Make sure to use 64-bit loads. */
+#define	bus_space_read_8(t, h, o)					\
+(wbflush(), /* XXX */							\
+     (void) t, (*(volatile u_int64_t *)((h) + (o))))
+
+/*
+ *	void bus_space_read_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t *addr, size_t count);
+ *
+ * Read `count' 1, 2, 4, or 8 byte quantities from bus space
+ * described by tag/handle/offset and copy into buffer provided.
+ */
+
+#define __SGIMIPS_bus_space_read_multi(BYTES,BITS)				\
+static __inline void __CONCAT(bus_space_read_multi_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	__PB_TYPENAME(BITS) *, size_t);					\
+									\
+static __inline void							\
+__CONCAT(bus_space_read_multi_,BYTES)(t, h, o, a, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	__PB_TYPENAME(BITS) *a;						\
+	size_t c;							\
+{									\
+									\
+	while (c--)							\
+		*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o);	\
+}
+
+__SGIMIPS_bus_space_read_multi(1,8)
+__SGIMIPS_bus_space_read_multi(2,16)
+__SGIMIPS_bus_space_read_multi(4,32)
+
+#if 0	/* Cause a link error for bus_space_read_multi_8 */
+#define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_read_multi
+
+/*
+ *	void bus_space_read_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t *addr, size_t count);
+ *
+ * Read `count' 1, 2, 4, or 8 byte quantities from bus space
+ * described by tag/handle and starting at `offset' and copy into
+ * buffer provided.
+ */
+
+#define __SGIMIPS_bus_space_read_region(BYTES,BITS)			\
+static __inline void __CONCAT(bus_space_read_region_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	__PB_TYPENAME(BITS) *, size_t);					\
+									\
+static __inline void							\
+__CONCAT(bus_space_read_region_,BYTES)(t, h, o, a, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	__PB_TYPENAME(BITS) *a;						\
+	size_t c;							\
+{									\
+									\
+	while (c--) {							\
+		*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o);	\
+		o += BYTES;						\
+	}								\
+}
+
+__SGIMIPS_bus_space_read_region(1,8)
+__SGIMIPS_bus_space_read_region(2,16)
+__SGIMIPS_bus_space_read_region(4,32)
+
+#if 0	/* Cause a link error for bus_space_read_region_8 */
+#define	bus_space_read_region_8	!!! bus_space_read_region_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_read_region
+
+/*
+ *	void bus_space_write_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t value);
+ *
+ * Write the 1, 2, 4, or 8 byte value `value' to bus space
+ * described by tag/handle/offset.
+ */
+
+void	bus_space_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int8_t);
+void	bus_space_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+	    u_int16_t);
+
+#define	bus_space_write_4(t, h, o, v)					\
+do {									\
+	(void) t;							\
+	*(volatile u_int32_t *)((h) + (o)) = (v);			\
+	wbflush(); /* XXX */						\
+} while (0)
+
+/* XXX Make sure to use 64-bit stores. */
+#define	bus_space_write_8(t, h, o, v)					\
+do {									\
+	(void) t;							\
+	*(volatile u_int64_t *)((h) + (o)) = (v);			\
+	wbflush(); /* XXX */						\
+} while (0)
+
+/*
+ *	void bus_space_write_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    const u_intN_t *addr, size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
+ * provided to bus space described by tag/handle/offset.
+ */
+
+#define __SGIMIPS_bus_space_write_multi(BYTES,BITS)			\
+static __inline void __CONCAT(bus_space_write_multi_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	const __PB_TYPENAME(BITS) *, size_t);				\
+									\
+static __inline void							\
+__CONCAT(bus_space_write_multi_,BYTES)(t, h, o, a, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	const __PB_TYPENAME(BITS) *a;					\
+	size_t c;							\
+{									\
+									\
+	while (c--)							\
+		__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++);	\
+}
+
+__SGIMIPS_bus_space_write_multi(1,8)
+__SGIMIPS_bus_space_write_multi(2,16)
+__SGIMIPS_bus_space_write_multi(4,32)
+
+#if 0	/* XXX Use MIPS3 64-bit loads */
+#define	bus_space_write_multi_8(t, h, o, a, c)				\
+			!!! bus_space_write_multi_8 unimplimented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_write_multi
+
+/*
+ *	void bus_space_write_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    const u_intN_t *addr, size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
+ * to bus space described by tag/handle starting at `offset'.
+ */
+
+#define __SGIMIPS_bus_space_write_region(BYTES,BITS)			\
+static __inline void __CONCAT(bus_space_write_region_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	const __PB_TYPENAME(BITS) *, size_t);				\
+									\
+static __inline void							\
+__CONCAT(bus_space_write_region_,BYTES)(t, h, o, a, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	const __PB_TYPENAME(BITS) *a;					\
+	size_t c;							\
+{									\
+									\
+	while (c--) {							\
+		__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++);	\
+		o += BYTES;						\
+	}								\
+}
+
+__SGIMIPS_bus_space_write_region(1,8)
+__SGIMIPS_bus_space_write_region(2,16)
+__SGIMIPS_bus_space_write_region(4,32)
+
+#if 0	/* Cause a link error for bus_space_write_region_8 */
+#define	bus_space_write_region_8					\
+			!!! bus_space_write_region_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_write_region
+
+/*
+ *	void bus_space_set_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
+ *	    size_t count);
+ *
+ * Write the 1, 2, 4, or 8 byte value `val' to bus space described
+ * by tag/handle/offset `count' times.
+ */
+
+#define __SGIMIPS_bus_space_set_multi(BYTES,BITS)				\
+static __inline void __CONCAT(bus_space_set_multi_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	__PB_TYPENAME(BITS), size_t);					\
+									\
+static __inline void							\
+__CONCAT(bus_space_set_multi_,BYTES)(t, h, o, v, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	__PB_TYPENAME(BITS) v;						\
+	size_t c;							\
+{									\
+									\
+	while (c--)							\
+		__CONCAT(bus_space_write_,BYTES)(t, h, o, v);		\
+}
+
+__SGIMIPS_bus_space_set_multi(1,8)
+__SGIMIPS_bus_space_set_multi(2,16)
+__SGIMIPS_bus_space_set_multi(4,32)
+
+#if 0	/* Cause a link error for bus_space_set_multi_8 */
+#define	bus_space_set_multi_8						\
+			!!! bus_space_set_multi_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_set_multi
+
+/*
+ *	void bus_space_set_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
+ *	    size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
+ * by tag/handle starting at `offset'.
+ */
+
+#define __SGIMIPS_bus_space_set_region(BYTES,BITS)				\
+static __inline void __CONCAT(bus_space_set_region_,BYTES)		\
+	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	__PB_TYPENAME(BITS), size_t);					\
+									\
+static __inline void							\
+__CONCAT(bus_space_set_region_,BYTES)(t, h, o, v, c)			\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h;						\
+	bus_size_t o;							\
+	__PB_TYPENAME(BITS) v;						\
+	size_t c;							\
+{									\
+									\
+	while (c--) {							\
+		__CONCAT(bus_space_write_,BYTES)(t, h, o, v);		\
+		o += BYTES;						\
+	}								\
+}
+
+__SGIMIPS_bus_space_set_region(1,8)
+__SGIMIPS_bus_space_set_region(2,16)
+__SGIMIPS_bus_space_set_region(4,32)
+
+#if 0	/* Cause a link error for bus_space_set_region_8 */
+#define	bus_space_set_region_8						\
+			!!! bus_space_set_region_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_bus_space_set_region
+
+/*
+ *	void bus_space_copy_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh1, bus_size_t off1,
+ *	    bus_space_handle_t bsh2, bus_size_t off2,
+ *	    bus_size_t count);
+ *
+ * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
+ * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
+ */
+
+#define	__SGIMIPS_copy_region(BYTES)					\
+static __inline void __CONCAT(bus_space_copy_region_,BYTES)		\
+	(bus_space_tag_t,						\
+	    bus_space_handle_t bsh1, bus_size_t off1,			\
+	    bus_space_handle_t bsh2, bus_size_t off2,			\
+	    bus_size_t count);						\
+									\
+static __inline void							\
+__CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c)		\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h1, h2;					\
+	bus_size_t o1, o2, c;						\
+{									\
+	bus_size_t o;							\
+									\
+	if ((h1 + o1) >= (h2 + o2)) {					\
+		/* src after dest: copy forward */			\
+		for (o = 0; c != 0; c--, o += BYTES)			\
+			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
+			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
+	} else {							\
+		/* dest after src: copy backwards */			\
+		for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES)	\
+			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
+			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
+	}								\
+}
+
+__SGIMIPS_copy_region(1)
+__SGIMIPS_copy_region(2)
+__SGIMIPS_copy_region(4)
+
+#if 0	/* Cause a link error for bus_space_copy_region_8 */
+#define	bus_space_copy_region_8						\
+			!!! bus_space_copy_region_8 unimplemented !!!
+#endif
+
+#undef __SGIMIPS_copy_region
+
+/*
+ * Bus read/write barrier methods.
+ *
+ *	void bus_space_barrier(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    bus_size_t len, int flags);
+ *
+ * On the MIPS, we just flush the write buffer.
+ */
+#define	bus_space_barrier(t, h, o, l, f)	\
+	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)),	\
+	 wbflush())
+#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
+#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
+
+#undef __PB_TYPENAME_PREFIX
+#undef __PB_TYPENAME
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+/*
+ * Flags used in various bus DMA methods.
+ */
+#define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
+#define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
+#define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
+#define	BUS_DMA_COHERENT	0x04	/* hint: map memory DMA coherent */
+#define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
+#define	BUS_DMA_BUS2		0x20
+#define	BUS_DMA_BUS3		0x40
+#define	BUS_DMA_BUS4		0x80
+
+#define	SGIMIPS_DMAMAP_COHERENT	0x100	/* no cache flush necessary on sync */
+
+/* Forwards needed by prototypes below. */
+struct mbuf;
+struct uio;
+
+/*
+ * Operations performed by bus_dmamap_sync().
+ */
+#define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
+#define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
+#define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
+#define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
+
+typedef struct sgimips_bus_dma_tag		*bus_dma_tag_t;
+typedef struct sgimips_bus_dmamap		*bus_dmamap_t;
+
+/*
+ *	bus_dma_segment_t
+ *
+ *	Describes a single contiguous DMA transaction.  Values
+ *	are suitable for programming into DMA registers.
+ */
+struct sgimips_bus_dma_segment {
+	bus_addr_t	ds_addr;	/* DMA address */
+	bus_size_t	ds_len;		/* length of transfer */
+	bus_addr_t	_ds_vaddr;	/* virtual address, 0 if invalid */
+};
+typedef struct sgimips_bus_dma_segment	bus_dma_segment_t;
+
+/*
+ *	bus_dma_tag_t
+ *
+ *	A machine-dependent opaque type describing the implementation of
+ *	DMA for a given bus.
+ */
+
+struct sgimips_bus_dma_tag {
+	/*
+	 * XXX soren O2: 0x40000000
+	 * ikke endnu (bus.c)
+	 */
+#if 0
+	bus_addr_t _wbase;		/* DMA window base */
+	bus_addr_t _wbase_swap;		/* DMA window base (byteswapped) */
+#endif
+
+	/*
+	 * DMA mapping methods.
+	 */
+	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
+		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
+	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
+	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
+		    bus_size_t, struct proc *, int);
+	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
+		    struct mbuf *, int);
+	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
+		    struct uio *, int);
+	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
+		    bus_dma_segment_t *, int, bus_size_t, int);
+	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
+	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
+		    bus_addr_t, bus_size_t, int);
+
+	/*
+	 * DMA memory utility functions.
+	 */
+	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
+		    bus_size_t, bus_dma_segment_t *, int, int *, int);
+	void	(*_dmamem_free)(bus_dma_tag_t,
+		    bus_dma_segment_t *, int);
+	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
+		    int, size_t, caddr_t *, int);
+	void	(*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
+	int	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
+		    int, int, int, int);
+};
+
+#define	bus_dmamap_create(t, s, n, m, b, f, p)			\
+	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
+#define	bus_dmamap_destroy(t, p)				\
+	(*(t)->_dmamap_destroy)((t), (p))
+#define	bus_dmamap_load(t, m, b, s, p, f)			\
+	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
+#define	bus_dmamap_load_mbuf(t, m, b, f)			\
+	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
+#define	bus_dmamap_load_uio(t, m, u, f)				\
+	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
+#define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
+	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
+#define	bus_dmamap_unload(t, p)					\
+	(*(t)->_dmamap_unload)((t), (p))
+#define	bus_dmamap_sync(t, p, o, l, ops)			\
+	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
+
+#define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
+	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
+#define	bus_dmamem_free(t, sg, n)				\
+	(*(t)->_dmamem_free)((t), (sg), (n))
+#define	bus_dmamem_map(t, sg, n, s, k, f)			\
+	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
+#define	bus_dmamem_unmap(t, k, s)				\
+	(*(t)->_dmamem_unmap)((t), (k), (s))
+#define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
+	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
+
+/*
+ *	bus_dmamap_t
+ *
+ *	Describes a DMA mapping.
+ */
+struct sgimips_bus_dmamap {
+	/*
+	 * PRIVATE MEMBERS: not for use my machine-independent code.
+	 */
+	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
+	int		_dm_segcnt;	/* number of segs this map can map */
+	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
+	bus_size_t	_dm_boundary;	/* don't cross this */
+	int		_dm_flags;	/* misc. flags */
+
+	/*
+	 * PUBLIC MEMBERS: these are used by machine-independent code.
+	 */
+	bus_size_t	dm_mapsize;	/* size of the mapping */
+	int		dm_nsegs;	/* # valid segments in mapping */
+	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
+};
+
+#ifdef _SGIMIPS_BUS_DMA_PRIVATE
+int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
+	    bus_size_t, int, bus_dmamap_t *);
+void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
+int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
+	    bus_size_t, struct proc *, int);
+int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
+	    struct mbuf *, int);
+int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
+	    struct uio *, int);
+int	_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
+	    bus_dma_segment_t *, int, bus_size_t, int);
+void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
+void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
+	    bus_size_t, int);
+
+int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
+	    bus_size_t alignment, bus_size_t boundary,
+	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
+void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+	    int nsegs);
+int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+	    int nsegs, size_t size, caddr_t *kvap, int flags);
+void	_bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva,
+	    size_t size);
+int	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
+	    int nsegs, int off, int prot, int flags);
+
+int	_bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
+	    bus_size_t alignment, bus_size_t boundary,
+	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
+	    vaddr_t low, vaddr_t high);
+
+extern struct sgimips_bus_dma_tag sgimips_default_bus_dma_tag;
+#endif /* _SGIMIPS_BUS_DMA_PRIVATE */
+
+#endif /* _SGIMIPS_BUS_H_ */
--- a/sys/arch/sgimips/include/cdefs.h
+++ b/sys/arch/sgimips/include/cdefs.h
@ -0,0 +1,3 @@
+/*	$NetBSD: cdefs.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/cdefs.h>
--- a/sys/arch/sgimips/include/conf.h
+++ b/sys/arch/sgimips/include/conf.h
@ -0,0 +1,12 @@
+/*	$NetBSD: conf.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <sys/conf.h>
+
+#define mmread mmrw
+#define mmwrite mmrw
+
+cdev_decl(mm);
+bdev_decl(sw);
+cdev_decl(sw);
+cdev_decl(scsibus);
+cdev_decl(arcs);
--- a/sys/arch/sgimips/include/cpu.h
+++ b/sys/arch/sgimips/include/cpu.h
@ -0,0 +1,31 @@
+/*	$NetBSD: cpu.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#ifndef _SGIMIPS_CPU_H
+#define _SGIMIPS_CPU_H
+
+#include <mips/cpu.h>
+#include <mips/cpuregs.h>
+
+#ifndef _LOCORE
+#if defined(_KERNEL) && !defined(_LKM)
+#include "opt_lockdebug.h"
+#endif
+
+#include <sys/sched.h>
+struct cpu_info {
+	struct schedstate_percpu ci_schedstate; /* scheduler state */
+#if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
+	u_long ci_spin_locks;		/* # of spin locks held */
+	u_long ci_simple_locks;		/* # of simple locks held */
+#endif
+};
+
+#ifdef _KERNEL
+extern struct cpu_info cpu_info_store;
+
+#define	cpu_number()	(0)
+#define	curcpu()	(&cpu_info_store)
+#endif
+#endif /* !_LOCORE */
+
+#endif  /* !_SGIMIPS_CPU_H_ */
--- a/sys/arch/sgimips/include/db_machdep.h
+++ b/sys/arch/sgimips/include/db_machdep.h
@ -0,0 +1,6 @@
+/*	$NetBSD: db_machdep.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/db_machdep.h>
+
+#define DB_ELF_SYMBOLS
+#define DB_ELFSIZE	32
--- a/sys/arch/sgimips/include/disklabel.h
+++ b/sys/arch/sgimips/include/disklabel.h
@ -0,0 +1,95 @@
+/*	$NetBSD: disklabel.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+/*
+ * Copyright (c) 2000 Soren S. Jorvang
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *          This product includes software developed for the
+ *          NetBSD Project.  See http://www.netbsd.org/ for
+ *          information about NetBSD.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_DISKLABEL_H_
+#define _MACHINE_DISKLABEL_H_
+
+/*
+ * SGI partition conventions:
+ *
+ * Partition 0 - root
+ * Partition 1 - swap
+ * Partition 6 - usr
+ * Partition 7 - volume body
+ * Partition 8 - volume header
+ * Partition 10 - whole disk
+ */
+
+/*
+ * XXX It might be convenient to have MAXPARTITIONS 2 like on other ports.
+ * How to sanely map partition numbers in that case?
+ */
+#define MAXPARTITIONS	16
+#define RAW_PART	10
+
+#define LABELSECTOR	0
+#define LABELOFFSET	0
+
+struct cpu_disklabel {
+	int	cd_dummy;
+};
+
+struct sgilabel {
+#define SGILABEL_MAGIC	0xbe5a941
+	u_int32_t	magic;
+	int16_t		root;
+	int16_t		swap;
+	char		bootfile[16];
+	char		_devparms[48];
+	struct {
+		char 		name[8];
+		int32_t		block;
+		int32_t		bytes;
+	} voldir[15];
+	struct {
+		int32_t 	blocks;
+		int32_t 	first;
+		int32_t 	type;
+	} partitions[MAXPARTITIONS];
+	int32_t		checksum;
+	int32_t		_pad;
+} __attribute__((__packed__));
+
+#define SGI_PTYPE_VOLHDR	0
+#define SGI_PTYPE_RAW		3
+#define SGI_PTYPE_VOLUME	6
+#define SGI_PTYPE_EFS		7
+#define SGI_PTYPE_LVOL		8
+#define SGI_PTYPE_RLVOL     	9
+#define SGI_PTYPE_XFS		10
+#define SGI_PTYPE_XFSLOG	11
+#define SGI_PTYPE_XLV		12
+#define SGI_PTYPE_XVM		13
+
+#endif /* _MACHINE_DISKLABEL_H_ */
--- a/sys/arch/sgimips/include/ecoff_machdep.h
+++ b/sys/arch/sgimips/include/ecoff_machdep.h
@ -0,0 +1,3 @@
+/*	$NetBSD: ecoff_machdep.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/ecoff_machdep.h>
--- a/sys/arch/sgimips/include/elf_machdep.h
+++ b/sys/arch/sgimips/include/elf_machdep.h
@ -0,0 +1,5 @@
+/*	$NetBSD: elf_machdep.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/elf_machdep.h>
+
+#define ELF32_MACHDEP_ENDIANNESS	ELFDATA2MSB
--- a/sys/arch/sgimips/include/endian.h
+++ b/sys/arch/sgimips/include/endian.h
@ -0,0 +1,3 @@
+/*	$NetBSD: endian.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <sys/endian.h>
--- a/sys/arch/sgimips/include/endian_machdep.h
+++ b/sys/arch/sgimips/include/endian_machdep.h
@ -0,0 +1,4 @@
+/*	$NetBSD: endian_machdep.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#define _BYTE_ORDER _BIG_ENDIAN
+#include <mips/endian_machdep.h>
--- a/sys/arch/sgimips/include/float.h
+++ b/sys/arch/sgimips/include/float.h
@ -0,0 +1,3 @@
+/*	$NetBSD: float.h,v 1.1 2000/06/14 15:39:57 soren Exp $	*/
+
+#include <mips/float.h>
--- a/sys/arch/sgimips/include/ieee.h
+++ b/sys/arch/sgimips/include/ieee.h
@ -0,0 +1,3 @@
+/*	$NetBSD: ieee.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/ieee.h>
--- a/sys/arch/sgimips/include/ieeefp.h
+++ b/sys/arch/sgimips/include/ieeefp.h
@ -0,0 +1,3 @@
+/*	$NetBSD: ieeefp.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/ieeefp.h>
--- a/sys/arch/sgimips/include/intr.h
+++ b/sys/arch/sgimips/include/intr.h
@ -0,0 +1,103 @@
+/*	$NetBSD: intr.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+/*
+ * Copyright (c) 2000 Soren S. Jorvang
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *          This product includes software developed for the
+ *          NetBSD Project.  See http://www.netbsd.org/ for
+ *          information about NetBSD.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define	IPL_NONE	0	/* Disable only this interrupt. */
+#define	IPL_BIO		1	/* Disable block I/O interrupts. */
+#define	IPL_NET		2	/* Disable network interrupts. */
+#define	IPL_TTY		3	/* Disable terminal interrupts. */
+#define	IPL_CLOCK	4	/* Disable clock interrupts. */
+#define	IPL_STATCLOCK	5	/* Disable profiling interrupts. */
+#ifndef __NO_SOFT_SERIAL_INTERRUPT
+#define	IPL_SERIAL	6	/* Disable serial hardware interrupts. */
+#endif
+#define	IPL_HIGH	7	/* Disable all interrupts. */
+#define NIPL		8
+
+/* Interrupt sharing types. */
+#define IST_NONE	0	/* none */
+#define IST_PULSE	1	/* pulsed */
+#define IST_EDGE	2	/* edge-triggered */
+#define IST_LEVEL	3	/* level-triggered */
+
+/* Soft interrupt masks. */
+#define SIR_CLOCK	31
+#define SIR_NET		30
+#define SIR_CLOCKMASK	((1 << SIR_CLOCK))
+#define SIR_NETMASK	((1 << SIR_NET) | SIR_CLOCKMASK)
+#define SIR_ALLMASK	(SIR_CLOCKMASK | SIR_NETMASK)
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+
+#include <mips/cpuregs.h>
+
+extern int		_splraise(int);
+extern int		_spllower(int); 
+extern int		_splset(int);
+extern int		_splget(void);
+extern void		_splnone(void); 
+extern void		_setsoftintr(int);
+extern void		_clrsoftintr(int);
+
+#define setsoftclock()	_setsoftintr(MIPS_SOFT_INT_MASK_0)
+#define setsoftnet()	_setsoftintr(MIPS_SOFT_INT_MASK_1)
+#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
+#define clearsoftnet()	_clrsoftintr(MIPS_SOFT_INT_MASK_1)  
+
+extern u_int32_t biomask;
+extern u_int32_t netmask;
+extern u_int32_t ttymask;
+extern u_int32_t clockmask;
+
+#define splhigh()       _splraise(MIPS_INT_MASK)
+#define spl0()          (void)_spllower(0)
+#define splx(s)         (void)_splset(s)
+#define splbio()        _splraise(biomask)
+#define splnet()        _splraise(netmask)
+#define spltty()        _splraise(ttymask)
+#define splclock()      _splraise(clockmask)
+#define splimp()        splclock()
+#define splstatclock()  splclock()
+#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
+#define splsoftclock()  _splraise(MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1)
+#define splsoftnet()    _splraise(MIPS_SOFT_INT_MASK_1)
+
+extern unsigned int	intrcnt[];
+#define SOFTCLOCK_INTR	0
+#define SOFTNET_INTR	1  
+
+extern void *		cpu_intr_establish(int, int, int (*)(void *), void *);
+
+#endif /* _LOCORE */
+#endif /* _KERNEL */
--- a/sys/arch/sgimips/include/kcore.h
+++ b/sys/arch/sgimips/include/kcore.h
@ -0,0 +1,3 @@
+/*	$NetBSD: kcore.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/kcore.h>
--- a/sys/arch/sgimips/include/kdbparam.h
+++ b/sys/arch/sgimips/include/kdbparam.h
@ -0,0 +1,3 @@
+/*	$NetBSD: kdbparam.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/kdbparam.h>
--- a/sys/arch/sgimips/include/limits.h
+++ b/sys/arch/sgimips/include/limits.h
@ -0,0 +1,3 @@
+/*	$NetBSD: limits.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/limits.h>
--- a/sys/arch/sgimips/include/lock.h
+++ b/sys/arch/sgimips/include/lock.h
@ -0,0 +1,4 @@
+/*	$NetBSD: lock.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+/* Just use the common mips definition */
+#include <mips/lock.h>
--- a/sys/arch/sgimips/include/locore.h
+++ b/sys/arch/sgimips/include/locore.h
@ -0,0 +1,3 @@
+/*	$NetBSD: locore.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/locore.h>
--- a/sys/arch/sgimips/include/math.h
+++ b/sys/arch/sgimips/include/math.h
@ -0,0 +1,3 @@
+/*	$NetBSD: math.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/math.h>
--- a/sys/arch/sgimips/include/mips_opcode.h
+++ b/sys/arch/sgimips/include/mips_opcode.h
@ -0,0 +1,3 @@
+/*	$NetBSD: mips_opcode.h,v 1.1 2000/06/14 15:39:58 soren Exp $	*/
+
+#include <mips/mips_opcode.h>
--- a/sys/arch/sgimips/include/param.h
+++ b/sys/arch/sgimips/include/param.h
@ -0,0 +1,87 @@
+/*	$NetBSD: param.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+/*
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <mips/mips_param.h>
+
+#define	_MACHINE_ARCH	mipseb
+#define	MACHINE_ARCH	"mipseb"
+#define	_MACHINE	sgimips
+#define	MACHINE		"sgimips"
+#define	MID_MACHINE	MID_MIPS
+
+#define	DEV_BSIZE	512
+#define	DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
+#define BLKDEV_IOSIZE	2048
+#define	MAXPHYS		(64 * 1024)	/* Maximum raw I/O transfer size */
+
+#define	CLSIZE		1
+#define	CLSIZELOG2	0
+
+#define	MSIZE		128		/* Size of an mbuf */
+
+#ifndef MCLSHIFT
+#define	MCLSHIFT	11		/* Convert bytes to m_buf clusters. */
+#endif
+
+#define	MCLBYTES	(1 << MCLSHIFT)	/* Size of a m_buf cluster */
+#define	MCLOFSET	(MCLBYTES - 1)
+
+#if defined(_KERNEL) && !defined(_LKM)
+#include "opt_gateway.h"
+#endif /* _KERNEL && ! _LKM */
+
+#ifndef NMBCLUSTERS
+#ifdef GATEWAY
+#define	NMBCLUSTERS	2048		/* Map size, max cluster allocation */
+#else
+#define	NMBCLUSTERS	1024		/* Map size, max cluster allocation */
+#endif
+#endif
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+
+__inline extern void	delay(unsigned long);
+#define DELAY(n)	delay(n)
+
+#include <machine/intr.h>
+
+#endif	/* _LOCORE */
+#endif	/* _KERNEL */
--- a/sys/arch/sgimips/include/pcb.h
+++ b/sys/arch/sgimips/include/pcb.h
@ -0,0 +1,3 @@
+/*	$NetBSD: pcb.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/pcb.h>
--- a/sys/arch/sgimips/include/pci_machdep.h
+++ b/sys/arch/sgimips/include/pci_machdep.h
@ -0,0 +1,76 @@
+/*	$NetBSD: pci_machdep.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
+ * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Charles M. Hannum.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Machine-specific definitions for PCI autoconfiguration.
+ */
+
+/*
+ * Types provided to machine-independent PCI code
+ */
+
+typedef struct sgimips_pci_chipset *pci_chipset_tag_t;
+typedef u_int32_t	pcitag_t;
+typedef int 		pci_intr_handle_t;
+
+/*
+ * SGI-specific PCI structure and type definitions.
+ * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
+ */
+struct sgimips_pci_chipset {
+	pcireg_t	(*pc_conf_read)(pci_chipset_tag_t, pcitag_t, int);
+	void		(*pc_conf_write)(pci_chipset_tag_t, pcitag_t, int,
+				pcireg_t);
+/* XXX */
+};
+
+extern struct sgimips_bus_dma_tag pci_bus_dma_tag;
+
+/*
+ * Functions provided to machine-independent PCI code.
+ */
+void		pci_attach_hook(struct device *, struct device *,
+			struct pcibus_attach_args *);
+int		pci_bus_maxdevs(pci_chipset_tag_t, int);
+pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
+void		pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
+			int *, int *, int *);
+pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
+void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
+			pcireg_t);
+int		pci_intr_map(pci_chipset_tag_t, pcitag_t, int, int,
+			pci_intr_handle_t *);
+const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
+const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
+void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
+			int, int (*)(void *), void *);
+void		pci_intr_disestablish(pci_chipset_tag_t, void *);
--- a/sys/arch/sgimips/include/pmap.h
+++ b/sys/arch/sgimips/include/pmap.h
@ -0,0 +1,3 @@
+/*	$NetBSD: pmap.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/pmap.h>
--- a/sys/arch/sgimips/include/proc.h
+++ b/sys/arch/sgimips/include/proc.h
@ -0,0 +1,3 @@
+/*	$NetBSD: proc.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/proc.h>
--- a/sys/arch/sgimips/include/profile.h
+++ b/sys/arch/sgimips/include/profile.h
@ -0,0 +1,3 @@
+/*	$NetBSD: profile.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/profile.h>
--- a/sys/arch/sgimips/include/psl.h
+++ b/sys/arch/sgimips/include/psl.h
@ -0,0 +1,3 @@
+/*	$NetBSD: psl.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/psl.h>
--- a/sys/arch/sgimips/include/pte.h
+++ b/sys/arch/sgimips/include/pte.h
@ -0,0 +1,3 @@
+/*	$NetBSD: pte.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/pte.h>
--- a/sys/arch/sgimips/include/ptrace.h
+++ b/sys/arch/sgimips/include/ptrace.h
@ -0,0 +1,3 @@
+/*	$NetBSD: ptrace.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/ptrace.h>
--- a/sys/arch/sgimips/include/reg.h
+++ b/sys/arch/sgimips/include/reg.h
@ -0,0 +1,3 @@
+/*	$NetBSD: reg.h,v 1.1 2000/06/14 15:39:59 soren Exp $	*/
+
+#include <mips/reg.h>
--- a/sys/arch/sgimips/include/regdef.h
+++ b/sys/arch/sgimips/include/regdef.h
@ -0,0 +1,3 @@
+/*	$NetBSD: regdef.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/regdef.h>
--- a/sys/arch/sgimips/include/regnum.h
+++ b/sys/arch/sgimips/include/regnum.h
@ -0,0 +1,3 @@
+/*	$NetBSD: regnum.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/regnum.h>
--- a/sys/arch/sgimips/include/reloc.h
+++ b/sys/arch/sgimips/include/reloc.h
@ -0,0 +1,5 @@
+/*	$NetBSD: reloc.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/reloc.h>
+
+#define relocation_info_sgimips reloc_info_mips
--- a/sys/arch/sgimips/include/rnd.h
+++ b/sys/arch/sgimips/include/rnd.h
@ -0,0 +1,3 @@
+/*	$NetBSD: rnd.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/rnd.h>
--- a/sys/arch/sgimips/include/setjmp.h
+++ b/sys/arch/sgimips/include/setjmp.h
@ -0,0 +1,3 @@
+/*	$NetBSD: setjmp.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/setjmp.h>
--- a/sys/arch/sgimips/include/signal.h
+++ b/sys/arch/sgimips/include/signal.h
@ -0,0 +1,3 @@
+/*	$NetBSD: signal.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/signal.h>
--- a/sys/arch/sgimips/include/stdarg.h
+++ b/sys/arch/sgimips/include/stdarg.h
@ -0,0 +1,3 @@
+/*	$NetBSD: stdarg.h,v 1.1 2000/06/14 15:40:00 soren Exp $	*/
+
+#include <mips/stdarg.h>
--- a/sys/arch/sgimips/include/trap.h
+++ b/sys/arch/sgimips/include/trap.h
@ -0,0 +1,3 @@
+/*	$NetBSD: trap.h,v 1.1 2000/06/14 15:40:01 soren Exp $	*/
+
+#include <mips/trap.h>
--- a/sys/arch/sgimips/include/types.h
+++ b/sys/arch/sgimips/include/types.h
@ -0,0 +1,3 @@
+/*	$NetBSD: types.h,v 1.1 2000/06/14 15:40:01 soren Exp $	*/
+
+#include <mips/types.h>
--- a/sys/arch/sgimips/include/varargs.h
+++ b/sys/arch/sgimips/include/varargs.h
@ -0,0 +1,3 @@
+/*	$NetBSD: varargs.h,v 1.1 2000/06/14 15:40:01 soren Exp $	*/
+
+#include <mips/varargs.h>
--- a/sys/arch/sgimips/include/vmparam.h
+++ b/sys/arch/sgimips/include/vmparam.h
@ -0,0 +1,8 @@
+/*	$NetBSD: vmparam.h,v 1.1 2000/06/14 15:40:01 soren Exp $	*/
+
+#include <mips/vmparam.h>
+
+#define	VM_PHYSSEG_MAX		32
+
+#define	VM_NFREELIST		1
+#define	VM_FREELIST_DEFAULT	0
--- a/sys/arch/sgimips/include/z8530var.h
+++ b/sys/arch/sgimips/include/z8530var.h
@ -0,0 +1,71 @@
+/*	$NetBSD: z8530var.h,v 1.1 2000/06/14 15:40:02 soren Exp $	*/
+
+/*
+ * Copyright (c) 1994 Gordon W. Ross
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/bus.h>
+#include <dev/ic/z8530sc.h>
+
+struct zsc_softc {
+	struct device zsc_dev;
+	bus_space_tag_t zsc_st;
+	bus_space_handle_t zsc_sh;
+	struct zs_chanstate *zsc_cs[2];	/* channel A and B soft state */
+	/* Machine-dependent part follows... */
+	struct zs_chanstate zsc_cs_store[2];
+};
+
+/*
+ * Functions to read and write individual registers in a channel.
+ * The ZS chip requires a 1.6 uSec. recovery time between accesses.
+ * The delay is now handled inside the chip access functions.
+ * These could be inlines, but with the delay, speed is moot.
+ */
+
+u_int8_t zs_read_reg(struct zs_chanstate *cs, bus_size_t reg);
+u_int8_t zs_read_csr(struct zs_chanstate *cs);
+u_int8_t zs_read_data(struct zs_chanstate *cs);
+
+void zs_write_reg(struct zs_chanstate *cs, bus_size_t reg, u_int8_t val);
+void zs_write_csr(struct zs_chanstate *cs, u_int8_t val);
+void zs_write_data(struct zs_chanstate *cs, u_int8_t val);