Etherexpress-16 driver collision by Andrew Gillham <gillham@Digitron.COM>.
This commit is contained in:
hpeyerl
parent
665fc8b7e7
commit
abe82a6680
@ -1,4 +1,4 @@
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/* $NetBSD: if_ie.c,v 1.42 1995/07/23 22:09:11 mycroft Exp $ */
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/* $NetBSD: if_ie.c,v 1.43 1995/09/14 12:41:32 hpeyerl Exp $ */
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/*-
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* Copyright (c) 1993, 1994, 1995 Charles Hannum.
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@ -7,6 +7,7 @@
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* Copyright (c) 1992, 1993, Garrett A. Wollman.
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*
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* Portions:
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* Copyright (c) 1993, 1994, 1995, Rodney W. Grimes
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* Copyright (c) 1994, 1995, Rafal K. Boni
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* Copyright (c) 1990, 1991, William F. Jolitz
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* Copyright (c) 1990, The Regents of the University of California
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@ -55,6 +56,9 @@
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*
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* 3C507 support is loosely based on code donated to NetBSD by Rafal Boni.
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*
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* Intel EtherExpress 16 support taken from FreeBSD's if_ix.c, written
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* by Rodney W. Grimes.
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*
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* Majorly cleaned up and 3C507 code merged by Charles Hannum.
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*/
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@ -149,6 +153,7 @@ iomem, and to make 16-pointers, we subtract sc_maddr and and with 0xffff.
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#include <dev/ic/i82586reg.h>
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#include <dev/isa/if_ieatt.h>
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#include <dev/isa/if_ie507.h>
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#include <dev/isa/if_iee16.h>
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#include <dev/isa/elink.h>
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#define IED_RINT 0x01
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@ -252,6 +257,8 @@ struct ie_softc {
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struct ie_en_addr mcast_addrs[MAXMCAST + 1];
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int mcast_count;
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u_short irq_encoded; /* encoded interrupt on IEE16 */
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#ifdef IEDEBUG
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int sc_debug;
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#endif
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@ -268,6 +275,15 @@ static void sl_reset_586 __P((struct ie_softc *));
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static void el_chan_attn __P((struct ie_softc *));
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static void sl_chan_attn __P((struct ie_softc *));
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static void slel_get_address __P((struct ie_softc *));
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static void ee16_reset_586 __P((struct ie_softc *));
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static void ee16_chan_attn __P((struct ie_softc *));
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static void ee16_interrupt_enable __P((struct ie_softc *));
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void ee16_eeprom_outbits __P((struct ie_softc *, int, int));
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void ee16_eeprom_clock __P((struct ie_softc *, int));
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u_short ee16_read_eeprom __P((struct ie_softc *, int));
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int ee16_eeprom_inbits __P((struct ie_softc *));
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void iereset __P((struct ie_softc *));
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void ie_readframe __P((struct ie_softc *, int));
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void ie_drop_packet_buffer __P((struct ie_softc *));
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@ -353,6 +369,8 @@ ieprobe(parent, match, aux)
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return 1;
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if (el_probe(sc, ia))
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return 1;
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if (ee16_probe(sc, ia))
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return 1;
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return 0;
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}
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@ -523,6 +541,208 @@ el_probe(sc, ia)
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return 1;
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}
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/* Taken almost exactly from Rod's if_ix.c. */
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int
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ee16_probe(sc, ia)
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struct ie_softc *sc;
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struct isa_attach_args *ia;
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{
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int i;
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int cnt_id;
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u_short board_id, id_var1, id_var2, checksum = 0;
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u_short eaddrtemp, irq;
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u_short pg, adjust, decode, edecode;
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u_char lock_bit;
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u_char c;
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u_char bart_config;
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short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0};
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/* Need this for part of the probe. */
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sc->reset_586 = ee16_reset_586;
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sc->chan_attn = ee16_chan_attn;
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/* reset any ee16 at the current iobase */
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outb(ia->ia_iobase + IEE16_ECTRL, IEE16_RESET_ASIC);
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outb(ia->ia_iobase + IEE16_ECTRL, 0);
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delay(240);
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/* now look for ee16. */
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board_id = id_var1 = id_var2 = 0;
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for (i=0; i<4 ; i++) {
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id_var1 = inb(ia->ia_iobase + IEE16_ID_PORT);
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id_var2 = ((id_var1 & 0x03) << 2);
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board_id |= (( id_var1 >> 4) << id_var2);
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}
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if (board_id != IEE16_ID)
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return 0;
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/* need sc->sc_iobase for ee16_read_eeprom */
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sc->sc_iobase = ia->ia_iobase;
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sc->hard_type = IE_EE16;
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/*
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* If ia->maddr == MADDRUNK, use value in eeprom location 6.
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*
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* The shared RAM location on the EE16 is encoded into bits
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* 3-7 of EEPROM location 6. We zero the upper byte, and
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* shift the 5 bits right 3. The resulting number tells us
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* the RAM location. Because the EE16 supports either 16k or 32k
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* of shared RAM, we only worry about the 32k locations.
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*
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* NOTE: if a 64k EE16 exists, it should be added to this switch.
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* then the ia->msize would need to be set per case statement.
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*
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* value msize location
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* ===== ===== ========
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* 0x03 0x8000 0xCC000
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* 0x06 0x8000 0xD0000
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* 0x0C 0x8000 0xD4000
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* 0x18 0x8000 0xD8000
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*
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*/
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if (ia->ia_maddr == MADDRUNK) {
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i = (ee16_read_eeprom(sc, 6) & 0x00ff ) >> 3;
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switch(i) {
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case 0x03:
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ia->ia_maddr = 0xCC000;
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break;
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case 0x06:
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ia->ia_maddr = 0xD0000;
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break;
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case 0x0c:
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ia->ia_maddr = 0xD4000;
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break;
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case 0x18:
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ia->ia_maddr = 0xD8000;
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break;
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default:
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return 0 ;
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break; /* NOTREACHED */
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}
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ia->ia_msize = 0x8000;
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}
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/* need to set these after checking for MADDRUNK */
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sc->sc_maddr = ISA_HOLE_VADDR(ia->ia_maddr);
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sc->sc_msize = ia->ia_msize;
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/* need to put the 586 in RESET, and leave it */
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outb( PORT + IEE16_ECTRL, IEE16_RESET_586);
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/* read the eeprom and checksum it, should == IEE16_ID */
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for(i=0 ; i< 0x40 ; i++)
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checksum += ee16_read_eeprom(sc, i);
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if (checksum != IEE16_ID)
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return 0;
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/*
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* Size and test the memory on the board. The size of the memory
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* can be one of 16k, 32k, 48k or 64k. It can be located in the
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* address range 0xC0000 to 0xEFFFF on 16k boundaries.
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*
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* If the size does not match the passed in memory allocation size
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* issue a warning, but continue with the minimum of the two sizes.
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*/
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switch (ia->ia_msize) {
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case 65536:
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case 32768: /* XXX Only support 32k and 64k right now */
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break;
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case 16384:
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case 49512:
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default:
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printf("ieprobe mapped memory size out of range\n");
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return 0;
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break; /* NOTREACHED */
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}
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if ((kvtop(sc->sc_maddr) < 0xC0000) ||
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(kvtop(sc->sc_maddr) + sc->sc_msize > 0xF0000)) {
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printf("ieprobe mapped memory address out of range\n");
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return 0;
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}
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pg = (kvtop(sc->sc_maddr) & 0x3C000) >> 14;
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adjust = IEE16_MCTRL_FMCS16 | (pg & 0x3) << 2;
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decode = ((1 << (sc->sc_msize / 16384)) - 1) << pg;
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edecode = ((~decode >> 4) & 0xF0) | (decode >> 8);
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/* ZZZ This should be checked against eeprom location 6, low byte */
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outb(PORT + IEE16_MEMDEC, decode & 0xFF);
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/* ZZZ This should be checked against eeprom location 1, low byte */
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outb(PORT + IEE16_MCTRL, adjust);
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/* ZZZ Now if I could find this one I would have it made */
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outb(PORT + IEE16_MPCTRL, (~decode & 0xFF));
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/* ZZZ I think this is location 6, high byte */
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outb(PORT + IEE16_MECTRL, edecode); /*XXX disable Exxx */
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/*
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* first prime the stupid bart DRAM controller so that it
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* works, then zero out all of memory.
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*/
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bzero(sc->sc_maddr, 32);
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bzero(sc->sc_maddr, sc->sc_msize);
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/*
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* Get the encoded interrupt number from the EEPROM, check it
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* against the passed in IRQ. Issue a warning if they do not
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* match, and fail the probe. If irq is 'IRQUNK' then we
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* use the EEPROM irq, and continue.
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*/
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irq = ee16_read_eeprom(sc, IEE16_EEPROM_CONFIG1);
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irq = (irq & IEE16_EEPROM_IRQ) >> IEE16_EEPROM_IRQ_SHIFT;
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sc->irq_encoded = irq;
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irq = irq_translate[irq];
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if (ia->ia_irq != IRQUNK) {
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if (irq != ia->ia_irq) {
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#ifdef DIAGNOSTIC
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printf("\nie%d: fatal: board IRQ %d does not match kernel\n", sc->sc_dev.dv_unit, irq);
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#endif /* DIAGNOSTIC */
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return 0; /* _must_ match or probe fails */
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}
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} else
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ia->ia_irq = irq;
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/*
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* Get the hardware ethernet address from the EEPROM and
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* save it in the softc for use by the 586 setup code.
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*/
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eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_HIGH);
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sc->sc_arpcom.ac_enaddr[1] = eaddrtemp & 0xFF;
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sc->sc_arpcom.ac_enaddr[0] = eaddrtemp >> 8;
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eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_MID);
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sc->sc_arpcom.ac_enaddr[3] = eaddrtemp & 0xFF;
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sc->sc_arpcom.ac_enaddr[2] = eaddrtemp >> 8;
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eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_LOW);
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sc->sc_arpcom.ac_enaddr[5] = eaddrtemp & 0xFF;
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sc->sc_arpcom.ac_enaddr[4] = eaddrtemp >> 8;
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/* disable the board interrupts */
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outb(PORT + IEE16_IRQ, sc->irq_encoded);
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/* enable loopback to keep bad packets off the wire */
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if(sc->hard_type == IE_EE16) {
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bart_config = inb(PORT + IEE16_CONFIG);
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bart_config |= IEE16_BART_LOOPBACK;
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bart_config |= IEE16_BART_MCS16_TEST; /* inb doesn't get bit! */
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outb(PORT + IEE16_CONFIG, bart_config);
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bart_config = inb(PORT + IEE16_CONFIG);
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}
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outb(PORT + IEE16_ECTRL, 0);
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delay(100);
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if (!check_ie_present(sc, sc->sc_maddr, sc->sc_msize))
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return 0;
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ia->ia_iosize = 16; /* the number of I/O ports */
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return 1; /* found */
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}
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/*
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* Taken almost exactly from Bill's if_is.c, then modified beyond recognition.
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*/
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@ -589,6 +809,10 @@ ieintr(arg)
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if (sc->hard_type == IE_3C507)
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outb(PORT + IE507_ICTRL, 1);
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/* disable interrupts on the EE16. */
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if (sc->hard_type == IE_EE16)
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outb(PORT + IEE16_IRQ, sc->irq_encoded);
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status = sc->scb->ie_status & IE_ST_WHENCE;
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if (status == 0)
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return 0;
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@ -637,8 +861,12 @@ loop:
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outb(PORT + IE507_ICTRL, 1);
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status = sc->scb->ie_status & IE_ST_WHENCE;
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if (status == 0)
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if (status == 0) {
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/* enable interrupts on the EE16. */
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if (sc->hard_type == IE_EE16)
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outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);
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return 1;
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}
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goto loop;
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}
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@ -1391,6 +1619,17 @@ sl_reset_586(sc)
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outb(PORT + IEATT_RESET, 0);
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}
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void
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ee16_reset_586(sc)
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struct ie_softc *sc;
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{
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outb(PORT + IEE16_ECTRL, IEE16_RESET_586);
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delay(100);
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outb(PORT + IEE16_ECTRL, 0);
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delay(100);
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}
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void
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el_chan_attn(sc)
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struct ie_softc *sc;
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@ -1407,6 +1646,104 @@ sl_chan_attn(sc)
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outb(PORT + IEATT_ATTN, 0);
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}
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void
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ee16_chan_attn(sc)
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struct ie_softc *sc;
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{
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outb(PORT + IEE16_ATTN, 0);
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}
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u_short
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ee16_read_eeprom(sc, location)
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struct ie_softc *sc;
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int location;
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{
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int ectrl, edata;
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ectrl = inb(PORT + IEE16_ECTRL);
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ectrl &= IEE16_ECTRL_MASK;
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ectrl |= IEE16_ECTRL_EECS;
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outb(PORT + IEE16_ECTRL, ectrl);
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ee16_eeprom_outbits(sc, IEE16_EEPROM_READ, IEE16_EEPROM_OPSIZE1);
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ee16_eeprom_outbits(sc, location, IEE16_EEPROM_ADDR_SIZE);
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edata = ee16_eeprom_inbits(sc);
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ectrl = inb(PORT + IEE16_ECTRL);
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ectrl &= ~(IEE16_RESET_ASIC | IEE16_ECTRL_EEDI | IEE16_ECTRL_EECS);
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outb(PORT + IEE16_ECTRL, ectrl);
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ee16_eeprom_clock(sc, 1);
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ee16_eeprom_clock(sc, 0);
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return edata;
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}
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void
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ee16_eeprom_outbits(sc, edata, count)
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struct ie_softc *sc;
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int edata, count;
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{
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int ectrl, i;
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ectrl = inb(PORT + IEE16_ECTRL);
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ectrl &= ~IEE16_RESET_ASIC;
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for (i = count - 1; i >= 0; i--) {
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ectrl &= ~IEE16_ECTRL_EEDI;
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if (edata & (1 << i)) {
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ectrl |= IEE16_ECTRL_EEDI;
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}
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outb(PORT + IEE16_ECTRL, ectrl);
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delay(1); /* eeprom data must be setup for 0.4 uSec */
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ee16_eeprom_clock(sc, 1);
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ee16_eeprom_clock(sc, 0);
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}
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ectrl &= ~IEE16_ECTRL_EEDI;
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outb(PORT + IEE16_ECTRL, ectrl);
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delay(1); /* eeprom data must be held for 0.4 uSec */
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}
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int
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ee16_eeprom_inbits(sc)
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struct ie_softc *sc;
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{
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int ectrl, edata, i;
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ectrl = inb(PORT + IEE16_ECTRL);
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ectrl &= ~IEE16_RESET_ASIC;
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for (edata = 0, i = 0; i < 16; i++) {
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edata = edata << 1;
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ee16_eeprom_clock(sc, 1);
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ectrl = inb(PORT + IEE16_ECTRL);
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if (ectrl & IEE16_ECTRL_EEDO) {
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edata |= 1;
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}
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ee16_eeprom_clock(sc, 0);
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}
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return (edata);
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}
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void
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ee16_eeprom_clock(sc, state)
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struct ie_softc *sc;
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int state;
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{
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int ectrl;
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ectrl = inb(PORT + IEE16_ECTRL);
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ectrl &= ~(IEE16_RESET_ASIC | IEE16_ECTRL_EESK);
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if (state) {
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ectrl |= IEE16_ECTRL_EESK;
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}
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outb(PORT + IEE16_ECTRL, ectrl);
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delay(9); /* EESK must be stable for 8.38 uSec */
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}
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static inline void
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ee16_interrupt_enable(sc)
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struct ie_softc *sc;
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{
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delay(100);
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outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);
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delay(100);
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}
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void
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slel_get_address(sc)
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struct ie_softc *sc;
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@ -1743,6 +2080,21 @@ ieinit(sc)
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ie_ack(sc, IE_ST_WHENCE);
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/* take the ee16 out of loopback */
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{
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u_char bart_config;
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if(sc->hard_type == IE_EE16) {
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bart_config = inb(PORT + IEE16_CONFIG);
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bart_config &= ~IEE16_BART_LOOPBACK;
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bart_config |= IEE16_BART_MCS16_TEST; /* inb doesn't get bit! */
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outb(PORT + IEE16_CONFIG, bart_config);
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}
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}
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|
||||
ee16_interrupt_enable(sc);
|
||||
ee16_chan_attn(sc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1899,3 +2251,4 @@ print_rbd(rbd)
|
||||
rbd->mbz);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
82
sys/dev/isa/if_iee16.h
Normal file
82
sys/dev/isa/if_iee16.h
Normal file
@ -0,0 +1,82 @@
|
||||
|
||||
/*
|
||||
* Copyright (c) 1993, 1994, 1995
|
||||
* Rodney W. Grimes, Milwaukie, Oregon 97222. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer as
|
||||
* the first lines of this file unmodified.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Rodney W. Grimes.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Definitions for EtherExpress 16
|
||||
*/
|
||||
|
||||
#define IEE16_ATTN 0x06 /* channel attention control */
|
||||
#define IEE16_IRQ 0x07 /* IRQ configuration */
|
||||
#define IEE16_IRQ_ENABLE 0x08 /* enable board interrupts */
|
||||
|
||||
#define IEE16_MEMDEC 0x0a /* memory decode */
|
||||
#define IEE16_MCTRL 0x0b /* memory control */
|
||||
#define IEE16_MCTRL_FMCS16 0x10 /* MEMCS16- for F000 */
|
||||
|
||||
#define IEE16_MPCTRL 0x0c /* memory page control */
|
||||
#define IEE16_CONFIG 0x0d /* config register */
|
||||
#define IEE16_BART_LOOPBACK 0x02 /* loopback, 0=none, 1=loopback */
|
||||
#define IEE16_BART_IOCHRDY_LATE 0x10 /* iochrdy late control bit */
|
||||
#define IEE16_BART_IO_TEST_EN 0x20 /* enable iochrdy timing test */
|
||||
#define IEE16_BART_IO_RESULT 0x40 /* result of the iochrdy test */
|
||||
#define IEE16_BART_MCS16_TEST 0x80 /* enable memcs16 select test */
|
||||
|
||||
#define IEE16_ECTRL 0x0e /* eeprom control */
|
||||
#define IEE16_ECTRL_EESK 0x01 /* EEPROM clock bit */
|
||||
#define IEE16_ECTRL_EECS 0x02 /* EEPROM chip select */
|
||||
#define IEE16_ECTRL_EEDI 0x04 /* EEPROM data in bit */
|
||||
#define IEE16_ECTRL_EEDO 0x08 /* EEPROM data out bit */
|
||||
#define IEE16_RESET_ASIC 0x40 /* reset ASIC (bart) pin */
|
||||
#define IEE16_RESET_586 0x80 /* reset 82586 pin */
|
||||
#define IEE16_ECTRL_MASK 0xb2 /* and'ed with ECTRL to enable read */
|
||||
|
||||
#define IEE16_MECTRL 0x0f /* memory control, 0xe000 seg 'W' */
|
||||
#define IEE16_ID_PORT 0x0f /* auto-id port 'R' */
|
||||
|
||||
#define IEE16_ID 0xbaba /* known id of EE16 */
|
||||
|
||||
#define IEE16_EEPROM_READ 0x06 /* EEPROM read opcode */
|
||||
#define IEE16_EEPROM_OPSIZE1 0x03 /* size of EEPROM opcodes */
|
||||
#define IEE16_EEPROM_ADDR_SIZE 0x06 /* size of EEPROM address */
|
||||
|
||||
/* Locations in the EEPROM */
|
||||
#define IEE16_EEPROM_CONFIG1 0x00 /* Configuration register 1 */
|
||||
#define IEE16_EEPROM_IRQ 0xE000 /* Encoded IRQ */
|
||||
#define IEE16_EEPROM_IRQ_SHIFT 13 /* To shift IRQ to lower bits */
|
||||
#define IEE16_EEPROM_LOCK_ADDR 0x01 /* contains the lock bit */
|
||||
#define IEE16_EEPROM_LOCKED 0x01 /* means that it is locked */
|
||||
|
||||
#define IEE16_EEPROM_ENET_LOW 0x02 /* Ethernet address, low word */
|
||||
#define IEE16_EEPROM_ENET_MID 0x03 /* Ethernet address, middle word */
|
||||
#define IEE16_EEPROM_ENET_HIGH 0x04 /* Ethernet address, high word */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user