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with 3.3V we can run this at 48MHz

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This commit is contained in:
jmcneill 2015-01-03 13:29:02 +00:00
parent 27939bef63
commit ab960f7448
1 changed files with 4 additions and 2 deletions
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6
sys/arch/arm/rockchip/rockchip_dwcmmc.c
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@ -1,4 +1,4 @@
/* $NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $ */
/* $NetBSD: rockchip_dwcmmc.c,v 1.5 2015/01/03 13:29:02 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.4 2014/12/29 23:59:52 jmcneill Exp $");
__KERNEL_RCSID(0, "$NetBSD: rockchip_dwcmmc.c,v 1.5 2015/01/03 13:29:02 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -71,7 +71,9 @@ rk_dwcmmc_attach(device_t parent, device_t self, void *aux)
sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_PWREN_CLEAR |
DWC_MMC_F_FORCE_CLK;
sc->sc_clock_freq = rockchip_mmc0_get_rate();
#if 0
sc->sc_clock_max = 24000;
#endif
sc->sc_fifo_depth = 32;
bus_space_subregion(obio->obio_bst, obio->obio_bsh, obio->obio_offset,