From ab4a325e4c4317cfb6648e301ec01fee97425dcc Mon Sep 17 00:00:00 2001 From: mark Date: Fri, 19 Apr 1996 19:43:31 +0000 Subject: [PATCH] The iic and rtc are now devices and have been rewritten ane moved to the mainbus directory. --- sys/arch/arm32/arm32/iic.S | 242 ------------------------------ sys/arch/arm32/arm32/iiccontrol.c | 211 -------------------------- sys/arch/arm32/arm32/rtc.c | 200 ------------------------ 3 files changed, 653 deletions(-) delete mode 100644 sys/arch/arm32/arm32/iic.S delete mode 100644 sys/arch/arm32/arm32/iiccontrol.c delete mode 100644 sys/arch/arm32/arm32/rtc.c diff --git a/sys/arch/arm32/arm32/iic.S b/sys/arch/arm32/arm32/iic.S deleted file mode 100644 index 8b535b06103b..000000000000 --- a/sys/arch/arm32/arm32/iic.S +++ /dev/null @@ -1,242 +0,0 @@ -/* $NetBSD: iic.S,v 1.1 1996/01/31 23:16:02 mark Exp $ */ - -/* - * Copyright (c) 1994 Mark Brinicombe. - * Copyright (c) 1994 Brini. - * All rights reserved. - * - * This code is derived from software written for Brini by Mark Brinicombe - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Brini. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * RiscBSD kernel project - * - * iic.s - * - * Low level routines to with IIC bus devices - * - * Created : 13/10/94 - * Last updated : 15/10/94 - * - * Based of kate/display/iic.s - * - * $Id: iic.S,v 1.1 1996/01/31 23:16:02 mark Exp $ - */ - -#include -#include - -#define IIC_BITDELAY 10 - -sp .req r13 -lr .req r14 -pc .req r15 - -.text - - .global _iic_set_state - -_iic_set_state: -/* - * Parameters - * r0 - IIC data bit - * r1 - IIC clock bit - */ - -/* Store temporary register */ -/* stmfd sp!, {r4}*/ - -/* - * Mask the data and clock bits - * Since these routines are only called from iiccontrol.c this is not - * really needed - */ - and r0, r0, #0x00000001 - and r1, r1, #0x00000001 - -/* Get address of IOMD control register */ - - mov r2, #(IOMD_BASE) - -/* Get the current CPSR */ -/* mrs r4, cpsr_all - orr r3, r4, #(I32_bit | F32_bit) - msr cpsr_all, r3 -*/ - - IRQdisable - -/* Get current value of control register */ - - ldrb r3, [r2, #(IOMD_IOCR - IOMD_BASE)] - -/* Preserve non-IIC bits */ - - bic r3, r3, #0x00000003 - orr r3, r3, #0x000000c0 - -/* Set the IIC clock and data bits */ - - orr r3, r3, r0 - orr r3, r3, r1, lsl #1 - -/* Store the new value of control register */ - - strb r3, [r2, #(IOMD_IOCR - IOMD_BASE)] - -/* Restore CPSR state */ -/* msr cpsr_all, r4 */ - - IRQenable - -/* Restore temporary register */ -/* ldmfd sp!, {r4} */ - -/* Pause a bit */ - - mov r0, #(IIC_BITDELAY) - -/* Exit via iic_delay routine */ - b _iic_delay - - - .global _iic_set_state_and_ack - -_iic_set_state_and_ack: -/* - * Parameters - * r0 - IIC data bit - * r1 - IIC clock bit - */ -/* Store temporary register */ -/* stmfd sp!, {r4} */ - -/* - * Mask the data and clock bits - * Since these routines are only called from iiccontrol.c this is not - * really needed - */ - - and r0, r0, #0x00000001 - and r1, r1, #0x00000001 - -/* Get address of IOMD control register */ - - mov r2, #(IOMD_BASE) - -/* Get the current CPSR */ -/* mrs r4, cpsr_all - orr r3, r4, #(I32_bit | F32_bit) - msr cpsr_all, r3 -*/ - IRQdisable - -/* Get current value of control register */ - - ldrb r3, [r2, #(IOMD_IOCR - IOMD_BASE)] - -/* Preserve non-IIC bits */ - - bic r3, r3, #0x00000003 - orr r3, r3, #0x000000c0 - -/* Set the IIC clock and data bits */ - - orr r3, r3, r0 - orr r3, r3, r1, lsl #1 - -/* Store the new value of control register */ - - strb r3, [r2, #(IOMD_IOCR - IOMD_BASE)] - -iic_set_state_and_ack_loop: - ldrb r3, [r2, #(IOMD_IOCR - IOMD_BASE)] - tst r3, #0x00000002 - beq iic_set_state_and_ack_loop - -/* Restore CPSR state */ -/* msr cpsr_all, r4 */ - - IRQenable - -/* Restore temporary register */ -/* ldmfd sp!, {r4} */ - -/* Pause a bit */ - - mov r0, #(IIC_BITDELAY) - -/* Exit via iic_delay routine */ - b _iic_delay - - - .global _iic_delay - -_iic_delay: -/* - * Parameters - * r0 - time to wait - */ - -/* Load address of IOMD */ - - mov r2, #(IOMD_BASE) - -/* Latch current value of timer 1 */ - - strb r2, [r2, #(IOMD_T0LATCH - IOMD_BASE)] - -/* Get the latched value */ - - ldrb r1, [r2, #(IOMD_T0LOW - IOMD_BASE)] - -/* Loop until timer reaches end value */ - -iic_delay_loop: - -/* Latch the current value of timer1 */ - - strb r2, [r2, #(IOMD_T0LATCH - IOMD_BASE)] - -/* Get the latched value */ - - ldrb r3, [r2, #(IOMD_T0LOW - IOMD_BASE)] - -/* Loop until timer reached expected value */ - - teq r3, r1 - movne r1, r3 - beq iic_delay_loop - - subs r0, r0, #0x00000001 - bne iic_delay_loop - -/* Exit */ - mov pc, lr - -/* End of iic.S */ diff --git a/sys/arch/arm32/arm32/iiccontrol.c b/sys/arch/arm32/arm32/iiccontrol.c deleted file mode 100644 index 79e210ed8cdf..000000000000 --- a/sys/arch/arm32/arm32/iiccontrol.c +++ /dev/null @@ -1,211 +0,0 @@ -/* $NetBSD: iiccontrol.c,v 1.2 1996/03/27 22:42:14 mark Exp $ */ - -/* - * Copyright (c) 1994 Mark Brinicombe. - * Copyright (c) 1994 Brini. - * All rights reserved. - * - * This code is derived from software written for Brini by Mark Brinicombe - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Brini. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * RiscBSD kernel project - * - * iiccontrol.c - * - * Routines to communicate with IIC bus devices - * - * Created : 13/10/94 - * - * Based of kate/display/iiccontrol.c - */ - -#include -#include -#include -#include -#include - -#define iic_bitdelay 10 - -int iic_control __P((u_char /*address*/, u_char */*buffer*/, int /*count*/)); -void iic_set_state __P((int /*data*/, int /*clock*/)); -void iic_set_state_and_ack __P((int /*data*/, int /*clock*/)); -void iic_delay __P((int /*delay*/)); - -static int iic_getack __P((void)); -static void iic_write_bit __P((int /*bit*/)); -static int iic_write_byte __P((u_char /*value*/)); -static u_char iic_read_byte __P((void)); -static void iic_start_bit __P((void)); -static void iic_stop_bit __P((void)); - -/* - * Main entry to IIC driver. - */ - -int -iic_control(address, buffer, count) - u_char address; - u_char *buffer; - int count; -{ - int loop; - -/* Send the start bit */ - - iic_start_bit(); - -/* Send the address */ - - if (!iic_write_byte(address)) { - iic_stop_bit(); - return(-1); - } - -/* Read or write the data as required */ - - if ((address & 1) == 0) { -/* Write bytes */ - for (loop = 0; loop < count; ++loop) { - if (!iic_write_byte(buffer[loop])) { - iic_stop_bit(); - return(-1); - } - } - } - else { -/* Read bytes */ - for (loop = 0; loop < count; ++loop) { - buffer[loop] = iic_read_byte(); - -/* Send final acknowledge */ - - if (loop == (count - 1)) - iic_write_bit(1); - else - iic_write_bit(0); - } - } - -/* Send stop bit */ - - iic_stop_bit(); - - return(0); -} - - -static int -iic_getack() -{ - u_int oldirqstate; - int ack; - - iic_set_state(1, 0); - oldirqstate = disable_interrupts(I32_bit); - iic_set_state_and_ack(1, 1); - ack = ReadByte(IOMD_IOCR); - iic_set_state(1, 0); - restore_interrupts(oldirqstate); - - return((ack & 1) == 0); -} - - -static void -iic_write_bit(bit) - int bit; -{ - u_int oldirqstate; - - iic_set_state(bit, 0); - oldirqstate = disable_interrupts(I32_bit); - iic_set_state_and_ack(bit, 1); - iic_set_state(bit, 0); - restore_interrupts(oldirqstate); -} - - -static int -iic_write_byte(value) - u_char value; -{ - int loop; - int bit; - - for (loop = 0x80; loop != 0; loop = loop >> 1) { - bit = ((value & loop) != 0); - iic_write_bit(bit); - } - - return(iic_getack()); -} - - -static u_char -iic_read_byte() -{ - int loop; - u_char byte; - u_int oldirqstate; - - iic_set_state(1,0); - - byte = 0; - - for (loop = 0; loop < 8; ++loop) { - oldirqstate = disable_interrupts(I32_bit); - iic_set_state_and_ack(1, 1); - byte = (byte << 1) + (ReadByte(IOMD_IOCR) & 1); - iic_set_state(1, 0); - restore_interrupts(oldirqstate); - } - - return(byte); -} - - -static void -iic_start_bit() -{ - iic_set_state(1, 1); - iic_set_state(0, 1); - iic_delay(10); - iic_set_state(0, 0); -} - - -static void -iic_stop_bit() -{ - iic_set_state(0, 1); - iic_set_state(1, 1); -} - -/* End of iiccontrol.c */ diff --git a/sys/arch/arm32/arm32/rtc.c b/sys/arch/arm32/arm32/rtc.c deleted file mode 100644 index ec1435a20171..000000000000 --- a/sys/arch/arm32/arm32/rtc.c +++ /dev/null @@ -1,200 +0,0 @@ -/* $NetBSD: rtc.c,v 1.2 1996/03/08 17:11:13 mark Exp $ */ - -/* - * Copyright (c) 1994,1995 Mark Brinicombe. - * Copyright (c) 1994 Brini. - * All rights reserved. - * - * This code is derived from software written for Brini by Mark Brinicombe - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Brini. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * RiscBSD kernel project - * - * rtc.c - * - * Routines to read and write the RTC and CMOS RAM - * - * Created : 13/10/94 - * Based of kate/display/iiccontrol.c - */ - -#include -#include - -/* Read a byte from CMOS RAM */ - -int -cmos_read(location) - int location; -{ - u_char buff; - -/* - * This commented code dates from when I was translating CMOS address - * from the RISCOS addresses. Now all addresses are specifed as - * actual addresses in the CMOS RAM - */ - -/* - if (location > 0xF0) - return(-1); - - if (location < 0xC0) - buff = location + 0x40; - else - buff = location - 0xB0; -*/ - buff = location; - - if (iic_control(RTC_Write, &buff, 1)) - return(-1); - if (iic_control(RTC_Read, &buff, 1)) - return(-1); - - return(buff); -} - - -/* Write a byte to CMOS RAM */ - -int -cmos_write(location, value) - int location; - int value; -{ - u_char buff[2]; - -/* - * This commented code dates from when I was translating CMOS address - * from the RISCOS addresses. Now all addresses are specifed as - * actual addresses in the CMOS RAM - */ - -/* if (location > 0xF0) - return(-1); - - if (location < 0xC0) - buff = location + 0x40; - else - buff = location - 0xB0; -*/ - buff[0] = location; - buff[1] = value; - - if (iic_control(RTC_Write, buff, 2)) - return(-1); - - return(0); -} - - -/* Hex to BCD and BCD to hex conversion routines */ - -static inline int -hexdectodec(n) - u_char n; -{ - return(((n >> 4) & 0x0F) * 10 + (n & 0x0F)); -} - -static inline int -dectohexdec(n) - u_char n; -{ - return(((n/10) << 4) + (n%10)); -} - - -/* Write the RTC data from an 8 byte buffer */ - -int -rtc_write(rtc) - rtc_t *rtc; -{ - u_char buff[8]; - - buff[0] = 0; - - buff[1] = dectohexdec(rtc->rtc_micro); - buff[2] = dectohexdec(rtc->rtc_centi); - buff[3] = dectohexdec(rtc->rtc_sec); - buff[4] = dectohexdec(rtc->rtc_min); - buff[5] = dectohexdec(rtc->rtc_hour); - buff[6] = dectohexdec(rtc->rtc_day); - buff[7] = dectohexdec(rtc->rtc_mon); - - if (iic_control(RTC_Write, buff, 8)) - return(0); - - cmos_write(RTC_ADDR_YEAR, rtc->rtc_year); - cmos_write(RTC_ADDR_CENT, rtc->rtc_cen); - - return(1); -} - - -/* Read the RTC data into a 8 byte buffer */ - -int -rtc_read(rtc) - rtc_t *rtc; -{ - u_char buff[8]; - int byte; - - buff[0] = 0; - - if (iic_control(RTC_Write, buff, 1)) - return(0); - - if (iic_control(RTC_Read, buff, 8)) - return(0); - - rtc->rtc_micro = hexdectodec(buff[0] & 0xff); - rtc->rtc_centi = hexdectodec(buff[1] & 0xff); - rtc->rtc_sec = hexdectodec(buff[2] & 0x7f); - rtc->rtc_min = hexdectodec(buff[3] & 0x7f); - rtc->rtc_hour = hexdectodec(buff[4] & 0x3f); - rtc->rtc_day = hexdectodec(buff[5] & 0x3f); - rtc->rtc_mon = hexdectodec(buff[6] & 0x1f); - - byte = cmos_read(RTC_ADDR_YEAR); - if (byte == -1) - return(0); - rtc->rtc_year = byte; - - byte = cmos_read(RTC_ADDR_CENT); - if (byte == -1) - return(0); - rtc->rtc_cen = byte; - - return(1); -} - -/* End of rtc.c */