add ntwo* at pci? function ?, a T1 network driver.
This commit is contained in:
explorer
parent
c5e450957a
commit
ab207dc49d
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@ -1,4 +1,4 @@
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# $NetBSD: files.pci,v 1.42 1998/07/21 17:30:26 drochner Exp $
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# $NetBSD: files.pci,v 1.43 1998/07/26 03:28:28 explorer Exp $
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#
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# Config file and device description for machine-independent PCI code.
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# Included by ports that need it. Requires that the SCSI files be
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@ -93,6 +93,11 @@ device tl: ether, ifnet, arp, i2c, i2c_eeprom, miibus
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attach tl at pci
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file dev/pci/if_tl.c tl
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# SDL Communications N2 PCI Network Interface
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device ntwoc: ifnet, hd64570
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attach ntwoc at pci with ntwoc_pci
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file dev/pci/if_ntwoc_pci.c ntwoc_pci
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# Essential Communications HIPPI interface
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# device declaration in sys/conf/files
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attach esh at pci with esh_pci
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@ -0,0 +1,357 @@
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/* $Id: if_ntwoc_pci.c,v 1.1 1998/07/26 03:28:28 explorer Exp $ */
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/*
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* Copyright (c) 1998 Vixie Enterprises
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of Vixie Enterprises nor the names
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* of its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
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* CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR
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||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This software has been written for Vixie Enterprises by Michael Graff
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* <explorer@flame.org>. To learn more about Vixie Enterprises, see
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* ``http://www.vix.com''.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/hd64570reg.h>
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#include <dev/ic/hd64570var.h>
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#include <dev/pci/if_ntwoc_pcireg.h>
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#if 0
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#define NTWO_DEBUG
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#endif
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#ifdef NTWO_DEBUG
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#define NTWO_DPRINTF(x) printf x
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#else
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#define NTWO_DPRINTF(x)
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#endif
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/*
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* Card specific config register location
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*/
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#define PCI_CBMA_ASIC 0x10 /* Configuration Base Memory Address */
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#define PCI_CBMA_SCA 0x18
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struct ntwoc_pci_softc {
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/* Generic device stuff */
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struct device sc_dev; /* Common to all devices */
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/* PCI chipset glue */
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pci_intr_handle_t *sc_ih; /* Interrupt handler */
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pci_chipset_tag_t sc_sr; /* PCI chipset handle */
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bus_space_tag_t sc_asic_iot; /* space cookie (for ASIC) */
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bus_space_handle_t sc_asic_ioh; /* bus space handle (for ASIC) */
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struct sca_softc sc_sca; /* the SCA itself */
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};
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static int ntwoc_pci_match __P((struct device *, struct cfdata *, void *));
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static void ntwoc_pci_attach __P((struct device *, struct device *, void *));
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static int ntwoc_intr __P((void *));
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static void ntwoc_shutdown __P((void *sc));
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static void ntwoc_dtr_callback __P((void *, int, int));
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struct cfattach ntwoc_pci_ca = {
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sizeof(struct ntwoc_pci_softc), ntwoc_pci_match, ntwoc_pci_attach,
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};
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/*
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* Names for daughter card types. These match the NTWOC_DB_* defines.
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*/
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char *ntwoc_db_names[] = {
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"V.35", "Unknown 0x01", "Test", "Unknown 0x03",
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"RS232", "Unknown 0x05", "RS422", "None"
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};
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static int
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ntwoc_pci_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RISCOM)
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&& (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RISCOM_N2))
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return 1;
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return 0;
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}
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static void
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ntwoc_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct ntwoc_pci_softc *sc = (void *)self;
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struct pci_attach_args *pa = aux;
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struct sca_softc *sca = &sc->sc_sca;
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pci_intr_handle_t ih;
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const char *intrstr;
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pcireg_t csr;
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u_int16_t frontend_cr;
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u_int16_t db0, db1;
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u_int numports;
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printf(": N2 Serial Interface\n");
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/*
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* Map in the ASIC configuration space
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*/
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if (pci_mapreg_map(pa, PCI_CBMA_ASIC, PCI_MAPREG_TYPE_MEM, 0,
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&sc->sc_asic_iot, &sc->sc_asic_ioh, NULL, NULL)) {
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printf("%s: Can't map register space (ASIC)\n",
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sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Map in the serial controller configuration space
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*/
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if (pci_mapreg_map(pa, PCI_CBMA_SCA, PCI_MAPREG_TYPE_MEM, 0,
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&sca->sc_iot, &sca->sc_ioh, NULL, NULL)) {
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printf("%s: Can't map register space (SCA)\n",
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sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Enable the card
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
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/*
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* Map and establish the interrupt
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*/
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if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, ntwoc_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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/*
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* Perform total black magic. This is not only extremely
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* disgusting, but it should be explained a lot more in the
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* card's documentation.
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*
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* From what I gather, this does nothing more than configure the
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* PCI to ISA translator ASIC the N2pci card uses.
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*
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* From the FreeBSD driver:
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* offset
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* 0x00 - Map Range - Mem-mapped to locate anywhere
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* 0x04 - Re-Map - PCI address decode enable
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* 0x18 - Bus Region - 32-bit bus, ready enable
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* 0x1c - Master Range - include all 16 MB
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* 0x20 - Master RAM - Map SCA Base at 0
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* 0x28 - Master Remap - direct master memory enable
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* 0x68 - Interrupt - Enable interrupt (0 to disable)
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*/
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x00, 0xfffff000);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x04, 1);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x18, 0x40030043);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x1c, 0xff000000);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x20, 0);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x28, 0xe9);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x68, 0x10900);
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/*
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* pass the dma tag to the SCA
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*/
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sca->sc_dmat = pa->pa_dmat;
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/*
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* Read the configuration information off the daughter card.
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*/
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frontend_cr = bus_space_read_2(sca->sc_iot, sca->sc_ioh, NTWOC_FECR);
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NTWO_DPRINTF(("%s: frontend_cr = 0x%04x\n",
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sc->sc_dev.dv_xname, frontend_cr));
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db0 = (frontend_cr & NTWOC_FECR_ID0) >> NTWOC_FECR_ID0_SHIFT;
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db1 = (frontend_cr & NTWOC_FECR_ID1) >> NTWOC_FECR_ID1_SHIFT;
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/*
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* Port 1 HAS to be present. If it isn't, don't attach anything.
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*/
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if (db0 == NTWOC_FE_ID_NONE) {
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printf("%s: no ports available\n", sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Port 1 is present. Now, check to see if port 2 is also
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* present.
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*/
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numports = 1;
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if (db1 != NTWOC_FE_ID_NONE)
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numports++;
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printf("%s: %d port%s\n", sc->sc_dev.dv_xname, numports,
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(numports > 1 ? "s" : ""));
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printf("%s: port 0 interface card: %s\n", sc->sc_dev.dv_xname,
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ntwoc_db_names[db0]);
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if (numports > 1)
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printf("%s: port 1 interface card: %s\n", sc->sc_dev.dv_xname,
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ntwoc_db_names[db1]);
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/*
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* enable the RS422 tristate transmit
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* diable clock output (use receiver clock for both)
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*/
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frontend_cr |= (NTWOC_FECR_TE0 | NTWOC_FECR_TE1);
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frontend_cr &= ~(NTWOC_FECR_ETC0 | NTWOC_FECR_ETC1);
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bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
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NTWOC_FECR, frontend_cr);
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/*
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* initialize the SCA. This will allocate DMAable memory based
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* on the number of ports we passed in, the size of each
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* buffer, and the number of buffers per port.
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*/
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sca->parent = &sc->sc_dev;
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sca->dtr_callback = ntwoc_dtr_callback;
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sca->dtr_aux = sc;
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sca_init(sca, numports);
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/*
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* always initialize port 0, since we have to have found it to
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* get this far. If we have two ports, attach the second
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* as well.
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*/
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sca_port_attach(sca, 0);
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if (numports == 2)
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sca_port_attach(sca, 1);
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/*
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* Add shutdown hook so that DMA is disabled prior to reboot. Not
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* doing do could allow DMA to corrupt kernel memory during the
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* reboot before the driver initializes.
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*/
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shutdownhook_establish(ntwoc_shutdown, sc);
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}
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static int
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ntwoc_intr(void *arg)
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{
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struct ntwoc_pci_softc *sc = (struct ntwoc_pci_softc *)arg;
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return sca_hardintr(&sc->sc_sca);
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}
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/*
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* shut down interrupts and DMA, so we don't trash the kernel on warm
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* boot. Also, lower DTR on each port and disable card interrupts.
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*/
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static void
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ntwoc_shutdown(void *aux)
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{
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struct ntwoc_pci_softc *sc = aux;
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u_int16_t fecr;
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/*
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* shut down the SCA ports
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*/
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sca_shutdown(&sc->sc_sca);
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/*
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* disable interupts for the whole card. Black magic, see comment
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* above.
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*/
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x68, 0x10900);
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/*
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* lower DTR on both ports
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*/
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fecr = bus_space_read_2(sc->sc_sca.sc_iot,
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sc->sc_sca.sc_ioh, NTWOC_FECR);
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fecr |= (NTWOC_FECR_DTR0 | NTWOC_FECR_DTR1);
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bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
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NTWOC_FECR, fecr);
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}
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static void
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ntwoc_dtr_callback(void *aux, int port, int state)
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{
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struct ntwoc_pci_softc *sc = aux;
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u_int16_t fecr;
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fecr = bus_space_read_2(sc->sc_sca.sc_iot,
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sc->sc_sca.sc_ioh, NTWOC_FECR);
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NTWO_DPRINTF(("port == %d, state == %d, old fecr: 0x%04x\n",
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port, state, fecr));
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if (port == 0) {
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if (state == 0)
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fecr |= NTWOC_FECR_DTR0;
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else
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fecr &= ~NTWOC_FECR_DTR0;
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} else {
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if (state == 0)
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fecr |= NTWOC_FECR_DTR1;
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else
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fecr &= ~NTWOC_FECR_DTR1;
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}
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NTWO_DPRINTF(("new fecr: 0x%04x\n", fecr));
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bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
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NTWOC_FECR, fecr);
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}
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@ -0,0 +1,100 @@
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/* $Id: if_ntwoc_pcireg.h,v 1.1 1998/07/26 03:28:28 explorer Exp $ */
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/*
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* Copyright (c) 1998 Vixie Enterprises
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of Vixie Enterprises nor the names
|
||||
* of its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
|
||||
* CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This software has been written for Vixie Enterprises by Michael Graff
|
||||
* <explorer@flame.org>. To learn more about Vixie Enterprises, see
|
||||
* ``http://www.vix.com''.
|
||||
*/
|
||||
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#ifndef _IF_NTWOC_PCIREG_H_
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#define _IF_NTWOC_PCIREG_H_
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/*
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* ASIC register offsets
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*/
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/*
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* This register is in the SCA namespace, but is NOT really an SCA register.
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* It contains information about the daughter cards, and provides a method
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* to configure them.
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*/
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#define NTWOC_FECR 0x200
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/*
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* definition of the NTWO_FECR register
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*/
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#define NTWOC_FECR_ID0 0x0e00 /* mask of daughter card on port 0 */
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#define NTWOC_FECR_ID0_SHIFT 9
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#define NTWOC_FECR_ID1 0xe000 /* mask of daughter card on port 1 */
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#define NTWOC_FECR_ID1_SHIFT 13
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#define NTWOC_FECR_DTR1 0x0080 /* DTR output for port 1 */
|
||||
#define NTWOC_FECR_DTR0 0x0040 /* DTR output for port 0 */
|
||||
#define NTWOC_FECR_DSR1 0x1000 /* DSR input for port 1 */
|
||||
#define NTWOC_FECR_DSR0 0x0100 /* DSR input for port 0 */
|
||||
#define NTWOC_FECR_TE1 0x0008 /* tristate enable port 1 */
|
||||
#define NTWOC_FECR_TE0 0x0004 /* tristate enable port 0 */
|
||||
#define NTWOC_FECR_ETC1 0x0002 /* output clock port 1 */
|
||||
#define NTWOC_FECR_ETC0 0x0001 /* output clock port 0 */
|
||||
|
||||
/*
|
||||
* Daughter card for port.
|
||||
*/
|
||||
#define NTWOC_FE_ID_V35 0x00
|
||||
#define NTWOC_FE_ID_X01 0x01 /* unused? */
|
||||
#define NTWOC_FE_ID_TEST 0x02
|
||||
#define NTWOC_FE_ID_X03 0x03 /* unused? */
|
||||
#define NTWOC_FE_ID_RS232 0x04
|
||||
#define NTWOC_FE_ID_X05 0x05 /* was hssi, now unused? */
|
||||
#define NTWOC_FE_ID_RS422 0x06
|
||||
#define NTWOC_FE_ID_NONE 0x07 /* empty, no card present */
|
||||
|
||||
/*
|
||||
* ASIC Control defininitions
|
||||
*/
|
||||
|
||||
/* Front End (Modem,etc) Control Register */
|
||||
|
||||
#define ASIC_MODEM 0x200 /* ASIC modem control register Offset */
|
||||
|
||||
/* ASIC front end control register bits */
|
||||
#define ASIC_DSR1 0x1000 /* DSR signal input port 1 */
|
||||
#define ASIC_DSR0 0x100 /* DSR signal input port 0 */
|
||||
#define ASIC_DTR1 0x80 /* DTR signal output port 1 */
|
||||
#define ASIC_DTR0 0x40 /* DTR signal output port 0 */
|
||||
#define ASIC_TE1 0x8 /* RS422 TX,enable port 1 */
|
||||
#define ASIC_TE0 0x4 /* RS422 TX,enable port 0 */
|
||||
#define ASIC_ETC1 0x2 /* ETC Clock out port 1 */
|
||||
#define ASIC_ETC0 0x1 /* ETC Clock out port 0 */
|
||||
|
||||
#endif /* _IF_NTWOC_PCIREG_H_ */
|
||||
Loading…
Reference in New Issue