Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

if DDB, when pausing, save a copy of this cpus registers while paused.

This commit is contained in:
mrg 2001-06-08 09:51:40 +00:00
parent 67fc8c19be
commit aa2443e7c8
1 changed files with 15 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
sys/arch/sparc/sparc/intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.c,v 1.51 2001/06/07 17:59:48 mrg Exp $ */
/* $NetBSD: intr.c,v 1.52 2001/06/08 09:51:40 mrg Exp $ */
/*
* Copyright (c) 1992, 1993
@ -64,6 +64,10 @@
#include <sparc/sparc/asm.h>
#include <sparc/sparc/cpuvar.h>
#if defined(MULTIPROCESSOR) && defined(DDB)
#include <machine/db_machdep.h>
#endif
#include "com.h"
#if NCOM > 0
extern void comsoft __P((void));
@ -240,9 +244,19 @@ nmi_soft(tf)
}
break;
case XPMSG_PAUSECPU: {
#if defined(DDB)
db_regs_t regs;
regs.db_tf = *tf;
regs.db_fr = *(struct frame *)tf->tf_out[6];
cpuinfo.ci_ddb_regs = &regs;
#endif
cpuinfo.flags |= CPUFLG_PAUSED|CPUFLG_GOTMSG;
while (cpuinfo.flags & CPUFLG_PAUSED)
cpuinfo.cache_flush((caddr_t)&cpuinfo.flags, sizeof(cpuinfo.flags));
#if defined(DDB)
cpuinfo.ci_ddb_regs = 0;
#endif
return;
}
case XPMSG_VCACHE_FLUSH_PAGE: {