Use new docs provided by RFMD to give some meaning to
previously-undocumented registers and magic numbers on the RF3000 baseband.
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@ -1,4 +1,4 @@
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/* $NetBSD: atw.c,v 1.12 2003/11/16 09:02:42 dyoung Exp $ */
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/* $NetBSD: atw.c,v 1.13 2004/01/10 06:30:35 dyoung Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000, 2002, 2003, 2004 The NetBSD Foundation, Inc.
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@ -41,7 +41,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: atw.c,v 1.12 2003/11/16 09:02:42 dyoung Exp $");
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__KERNEL_RCSID(0, "$NetBSD: atw.c,v 1.13 2004/01/10 06:30:35 dyoung Exp $");
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#include "bpfilter.h"
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@ -1510,13 +1510,12 @@ atw_rf3000_init(sc)
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if (rc != 0)
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goto out;
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/* magic derived from binary-only driver */
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rc = atw_rf3000_write(sc, RF3000_MAGIC0, RF3000_MAGIC0_VAL);
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rc = atw_rf3000_write(sc, RF3000_OPTIONS1, 0x0);
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if (rc != 0)
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goto out;
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rc = atw_rf3000_write(sc, RF3000_MAGIC1, RF3000_MAGIC1_VAL);
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rc = atw_rf3000_write(sc, RF3000_OPTIONS2, RF3000_OPTIONS2_LNAGS_DELAY);
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if (rc != 0)
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goto out;
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@ -1,4 +1,4 @@
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/* $NetBSD: atwreg.h,v 1.3 2003/12/07 04:22:57 dyoung Exp $ */
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/* $NetBSD: atwreg.h,v 1.4 2004/01/10 06:30:36 dyoung Exp $ */
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/*
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* Copyright (c) 2003 The NetBSD Foundation, Inc. All rights reserved.
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@ -893,12 +893,27 @@ struct atw_rxdesc {
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#define RF3000_HIGAINCAL_DSSSPAD BIT(6) /* 6dB gain pad for DSSS
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* modes (meaning?)
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*/
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#define RF3000_MAGIC0 0x1C /* magic register derived from
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* a binary-only driver
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*/
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#define RF3000_MAGIC0_VAL 0x00
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#define RF3000_MAGIC1 0x1D /* magic register derived from
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* a binary-only driver
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*/
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#define RF3000_MAGIC1_VAL 0x80
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#define RF3000_OPTIONS1 0x1C /* Options Register 1 */
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/* Saturation threshold is 4 + offset, where -3 <= offset <= 3.
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* SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign.
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*/
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#define RF3000_OPTIONS1_SAT_THRESH_SIGN BIT(7)
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#define RF3000_OPTIONS1_SAT_THRESH BITS(6,5)
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#define RF3000_OPTIONS1_ALTAGC BIT(4) /* 1: retrigger AGC
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* algorithm on ADC
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* saturation
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*/
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#define RF3000_OPTIONS1_ALTBUS BIT(3) /* 1: enable alternate
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* Tx/Rx data bus
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* interface.
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*/
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#define RF3000_OPTIONS1_RESERVED0_MASK BITS(2,0)/* 0 */
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#define RF3000_OPTIONS2 0x1D /* Options Register 2 */
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/* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */
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#define RF3000_OPTIONS2_LNAGS_DELAY BIT(7)
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#define RF3000_OPTIONS2_RESERVED0_MASK BITS(6,3) /* 0 */
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/* Threshold for AGC re-trigger. 0: high count, 1: low count. */
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#define RF3000_OPTIONS2_RTG_THRESH BIT(2)
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#define RF3000_OPTIONS2_RESERVED1_MASK BITS(1,0) /* 0 */
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