When manipulating the interrupt status for atomic ops use cpsr_c rather

than cpsr_all, this avoids updating unnecessary fields in the cpsr.

As a side effect, the inline versions no longer clobber the condition
codes.
This commit is contained in:
chris 2008-01-13 11:19:05 +00:00
parent 4308d7e8b5
commit a87adf7279
2 changed files with 10 additions and 10 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic.S,v 1.1 2002/10/19 12:46:57 bsh Exp $ */
/* $NetBSD: atomic.S,v 1.2 2008/01/13 11:19:05 chris Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@ -45,13 +45,13 @@
ENTRY(atomic_set_bit)
mrs r2, cpsr
orr r3, r2, #(I32_bit)
msr cpsr_all, r3
msr cpsr_c, r3
ldr r3, [r0]
orr r3, r3, r1
str r3, [r0]
msr cpsr_all, r2
msr cpsr_c, r2
mov pc, lr
@ -59,13 +59,13 @@ ENTRY(atomic_set_bit)
ENTRY(atomic_clear_bit)
mrs r2, cpsr
orr r3, r2, #(I32_bit)
msr cpsr_all, r3
msr cpsr_c, r3
ldr r3, [r0]
bic r3, r3, r1
str r3, [r0]
msr cpsr_all, r2
msr cpsr_c, r2
mov pc, lr
#endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */

View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic.h,v 1.9 2007/03/04 06:51:53 matt Exp $ */
/* $NetBSD: atomic.h,v 1.10 2008/01/13 11:19:05 chris Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@ -64,16 +64,16 @@ bool atomic_cas(volatile uintptr_t *, uintptr_t, uintptr_t);
__asm volatile( \
"mrs %0, cpsr;" \
"orr %1, %0, %2;" \
"msr cpsr_all, %1;" \
"msr cpsr_c, %1;" \
: "=r" (cpsr_save), "=r" (tmp) \
: "I" (I32_bit) \
: "cc" ); \
); \
(expr); \
__asm volatile( \
"msr cpsr_all, %0" \
"msr cpsr_c, %0" \
: /* no output */ \
: "r" (cpsr_save) \
: "cc" ); \
); \
} while(0)
#else /* __PROG26 */
#define __with_interrupts_disabled(expr) \