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Interrupt setting of PCI from 3.1. In present interrupt, 32 

BeInterruptController queues up following i8259(16).
This commit is contained in:
kiyohara 2008-02-17 03:54:21 +00:00
parent 4395e1dd05
commit a867585079
1 changed files with 15 additions and 5 deletions
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20
sys/arch/bebox/pci/pci_machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: pci_machdep.c,v 1.15 2007/10/17 19:54:05 garbled Exp $ */
/* $NetBSD: pci_machdep.c,v 1.16 2008/02/17 03:54:21 kiyohara Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.15 2007/10/17 19:54:05 garbled Exp $");
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.16 2008/02/17 03:54:21 kiyohara Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -105,7 +105,17 @@ void
bebox_pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
int swiz, int *iline)
{
#if 0
(*platform->pci_intr_fixup)(bus, dev, iline);
#endif
if (bus == 0) {
switch (dev) {
case 12: /* SCSI is bit 10, mapped to IRQ 26 */
case 13: /* PCI slot 1 is bit 11, mapped to IRQ 27 */
case 14: /* PCI slot 2 is bit 12, mapped to IRQ 28 */
case 15: /* PCI slot 3 is bit 13, mapped to IRQ 29 */
#define BEBOX_PCIBUS0_DEV2LINE(d) ((d) + 14)
*iline = BEBOX_PCIBUS0_DEV2LINE(dev);
}
} else
#define BEBOX_PCIBUS_DEV2LINE(d, s) ((((d) + (s) + 1) & 0x3) + 26)
*iline = BEBOX_PCIBUS_DEV2LINE(dev, swiz);
}