Fix -Wall compiler warnings.

lib/libc/arch/arm32/fplib/fplib_libc.c

@@ -1,4 +1,4 @@
-/*	$NetBSD: fplib_libc.c,v 1.1 1997/10/12 21:18:06 mark Exp $	*/
+/*	$NetBSD: fplib_libc.c,v 1.2 1997/10/13 21:28:53 mark Exp $	*/
 
 /*-
  * Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -36,8 +36,16 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <sys/types.h>
 #include "softfloat.h"
 
+void sfp_setround __P((int rnd_dir));
+int sfp_getround __P((void));
+void sfp_setmask __P((int mask));
+int sfp_getmask __P((void));
+void sfp_setsticky __P((int except));
+int sfp_getsticky __P((void));
+
 void
 sfp_setround(rnd_dir)
 	int rnd_dir;

lib/libc/arch/arm32/fplib/softfloat-macros.h

@@ -29,6 +29,104 @@ this code that are retained.
 ===============================================================================
 */
 
+INLINE void shiftDown32Jamming( bits32 a, uint16 count, bits32 *zPtr );
+
+INLINE void shiftDown64ExtraJamming(
+     bits32 a0,
+     bits32 a1,
+     bits32 a2,
+     uint16 count,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr
+ );
+
+INLINE void shiftDown64Jamming(
+     bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void shiftDown64(
+     bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void shortShiftUp64(
+     bits32 a0, bits32 a1, uint16 count, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void shortShiftUp96(
+     bits32 a0,
+     bits32 a1,
+     bits32 a2,
+     uint16 count,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr
+ );
+
+INLINE void add64(
+     bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void add96(
+     bits32 a0,
+     bits32 a1,
+     bits32 a2,
+     bits32 b0,
+     bits32 b1,
+     bits32 b2,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr
+ );
+
+INLINE void sub64(
+     bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void sub96(
+     bits32 a0,
+     bits32 a1,
+     bits32 a2,
+     bits32 b0,
+     bits32 b1,
+     bits32 b2,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr
+ );
+
+INLINE void mul32To64( bits32 a, bits32 b, bits32 *z0Ptr, bits32 *z1Ptr );
+
+INLINE void mul64By32To96(
+     bits32 a0,
+     bits32 a1,
+     bits32 b,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr
+ );
+
+INLINE void mul64To128(
+     bits32 a0,
+     bits32 a1,
+     bits32 b0,
+     bits32 b1,
+     bits32 *z0Ptr,
+     bits32 *z1Ptr,
+     bits32 *z2Ptr,
+     bits32 *z3Ptr
+ );
+
+static bits32 estimateDiv64To32( bits32 a0, bits32 a1, bits32 b );
+
+static bits32 estimateSqrt32( int16 aExp, bits32 a );
+
+static int8 countLeadingZeros( bits32 a );
+
+INLINE flag eq64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
+
+INLINE flag le64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
+
+INLINE flag lt64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
+
+INLINE flag ne64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 );
+
+
 /*
 -------------------------------------------------------------------------------
 Shifts `a' down by the number of bits given in `count'.  If any nonzero bits

lib/libc/arch/arm32/fplib/softfloat-specialize.h

@@ -29,6 +29,9 @@ this code that are retained.
 ===============================================================================
 */
 
+flag float32_is_signaling_nan( float32 a );
+flag float64_is_signaling_nan( float64 a );
+
 /*
 -------------------------------------------------------------------------------
 Underflow tininess-detection mode.  (Statically initialized to default.)

lib/libc/arch/arm32/fplib/softfloat.c

@@ -59,6 +59,20 @@ desired.)
 */
 #include "softfloat-macros.h"
 
+/* Local prototypes */
+
+INLINE bits32 extractFloat32Frac( float32 a );
+INLINE int16 extractFloat32Exp( float32 a );
+INLINE flag extractFloat32Sign( float32 a );
+INLINE flag bothZeroFloat32( float32 a, float32 b );
+INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig );
+INLINE bits32 extractFloat64Frac1( float64 a );
+INLINE bits32 extractFloat64Frac0( float64 a );
+INLINE int16 extractFloat64Exp( float64 a );
+INLINE flag extractFloat64Sign( float64 a );
+INLINE flag bothZeroFloat64( float64 a, float64 b );
+INLINE float64 packFloat64( flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 );
+
 /*
 -------------------------------------------------------------------------------
 Returns the fraction bits of the single-precision floating-point value `a'.
@@ -781,7 +795,7 @@ int32 float64_to_int32_round_to_zero( float64 a )
     bits32 aSig0, aSig1;
     bits32 absZ, zExtra;
     int32 z;
-    uint8 roundingMode;
+/*    uint8 roundingMode;*/
 
     aSig1 = extractFloat64Frac1( a );
     aSig0 = extractFloat64Frac0( a );
@@ -1482,7 +1496,7 @@ IEC/IEEE Standard for Binary Floating-point Arithmetic.
 flag float32_le_quiet( float32 a, float32 b )
 {
     flag aSign, bSign;
-    int16 aExp, bExp;
+/*    int16 aExp, bExp;*/
 
     if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
          || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
@@ -1563,7 +1577,7 @@ float64 float64_round_to_int( float64 a )
             else {
                 if ( ( (sbits32) z.low ) < 0 ) {
                     ++z.high;
-                    if ( ( z.low<<1 ) == 0 ) z.high & ~1;
+                    if ( ( z.low<<1 ) == 0 ) z.high &= ~1;
                 }
             }
         }
@@ -2377,7 +2391,7 @@ uint32 float64_to_uint32_round_to_zero( float64 a )
     bits32 aSig0, aSig1;
     bits32 absZ, zExtra;
     uint32 z;
-    uint8 roundingMode;
+/*    uint8 roundingMode;*/
 
     aSig1 = extractFloat64Frac1( a );
     aSig0 = extractFloat64Frac0( a );
@@ -2426,7 +2440,7 @@ Arithmetic, except that the conversion is always rounded toward zero.  If
 overflows, the largest positive integer is returned.
 -------------------------------------------------------------------------------
 */
-int32 float32_to_uint32_round_to_zero( float32 a )
+uint32 float32_to_uint32_round_to_zero( float32 a )
 {
     flag aSign;
     int16 aExp, shiftCount;

lib/libc/arch/arm32/fplib/softfloat.h

@@ -107,6 +107,8 @@ float64 float32_to_float64( float32 );
 int float64_to_int32( float64 );
 int float64_to_int32_round_to_zero( float64 );
 float32 float64_to_float32( float64 );
+unsigned int float64_to_uint32_round_to_zero( float64 a );
+unsigned int float32_to_uint32_round_to_zero( float32 a );
 
 /*
 -------------------------------------------------------------------------------
@@ -145,4 +147,3 @@ char float64_lt( float64, float64 );
 char float64_eq_signaling( float64, float64 );
 char float64_le_quiet( float64, float64 );
 char float64_lt_quiet( float64, float64 );
-