PR port-mac68k/24883
Style-only changes in preparation to import AV DMA code:
- G/C unused from esp_softc
- clean up headers:
- prefer <sys/bus.h> over <machine/bus.h>
- G/C unused
- sort
- staticify private functions and variables
- stop using inline qualifier for functions called via function pointers
- use C99 initializer
- provide bus_space_vaddr(9) and use it, instead of using member of
bus_handle_t directly
- use uint*_t:
- u_char --> uint8_t
- u_int*_t --> uint*_t
- use proper names from ncr53c9xreg.h instead of magic numbers
- and some KNF, and etc.
No functional changes intended.
This commit is contained in:
rin
parent
b83fa74ac8
commit
a491818de0
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@ -1,4 +1,4 @@
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/* $NetBSD: bus.h,v 1.26 2008/04/28 20:23:27 martin Exp $ */
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/* $NetBSD: bus.h,v 1.27 2019/07/23 07:52:53 rin Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
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@ -786,6 +786,13 @@ __MAC68K_copy_region_N(4)
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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/*
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* void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
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*
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* Get the kernel virtual address for the mapped bus space.
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*/
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#define bus_space_vaddr(t, h) ((void)(t), (void *)(h.base))
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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#include <m68k/bus_dma.h>
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@ -1,4 +1,4 @@
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/* $NetBSD: esp.c,v 1.56 2019/01/08 19:41:09 jdolecek Exp $ */
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/* $NetBSD: esp.c,v 1.57 2019/07/23 07:52:53 rin Exp $ */
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/*
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* Copyright (c) 1997 Jason R. Thorpe.
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@ -77,38 +77,27 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.56 2019/01/08 19:41:09 jdolecek Exp $");
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__KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.57 2019/07/23 07:52:53 rin Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/queue.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/scsipi/scsi_message.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <dev/ic/ncr53c9xreg.h>
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#include <dev/ic/ncr53c9xvar.h>
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#include <machine/cpu.h>
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#include <machine/viareg.h>
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#include <mac68k/obio/espvar.h>
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#include <mac68k/obio/obiovar.h>
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int espmatch(device_t, cfdata_t, void *);
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void espattach(device_t, device_t, void *);
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static int espmatch(device_t, cfdata_t, void *);
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static void espattach(device_t, device_t, void *);
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/* Linkup to the rest of the kernel */
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CFATTACH_DECL_NEW(esp, sizeof(struct esp_softc),
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@ -117,74 +106,74 @@ CFATTACH_DECL_NEW(esp, sizeof(struct esp_softc),
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/*
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* Functions and the switch for the MI code.
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*/
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uint8_t esp_read_reg(struct ncr53c9x_softc *, int);
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void esp_write_reg(struct ncr53c9x_softc *, int, uint8_t);
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int esp_dma_isintr(struct ncr53c9x_softc *);
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void esp_dma_reset(struct ncr53c9x_softc *);
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int esp_dma_intr(struct ncr53c9x_softc *);
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int esp_dma_setup(struct ncr53c9x_softc *, uint8_t **, size_t *, int,
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size_t *);
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void esp_dma_go(struct ncr53c9x_softc *);
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void esp_dma_stop(struct ncr53c9x_softc *);
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int esp_dma_isactive(struct ncr53c9x_softc *);
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void esp_quick_write_reg(struct ncr53c9x_softc *, int, u_char);
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int esp_quick_dma_intr(struct ncr53c9x_softc *);
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int esp_quick_dma_setup(struct ncr53c9x_softc *, uint8_t **, size_t *, int,
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size_t *);
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void esp_quick_dma_go(struct ncr53c9x_softc *);
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static uint8_t esp_read_reg(struct ncr53c9x_softc *, int);
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static void esp_write_reg(struct ncr53c9x_softc *, int, uint8_t);
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static int esp_dma_isintr(struct ncr53c9x_softc *);
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static void esp_dma_reset(struct ncr53c9x_softc *);
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static int esp_dma_intr(struct ncr53c9x_softc *);
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static int esp_dma_setup(struct ncr53c9x_softc *, uint8_t **, size_t *,
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int, size_t *);
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static void esp_dma_go(struct ncr53c9x_softc *);
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static void esp_dma_stop(struct ncr53c9x_softc *);
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static int esp_dma_isactive(struct ncr53c9x_softc *);
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static void esp_quick_write_reg(struct ncr53c9x_softc *, int, uint8_t);
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static int esp_quick_dma_intr(struct ncr53c9x_softc *);
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static int esp_quick_dma_setup(struct ncr53c9x_softc *, uint8_t **,
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size_t *, int, size_t *);
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static void esp_quick_dma_go(struct ncr53c9x_softc *);
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void esp_intr(void *);
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void esp_dualbus_intr(void *);
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static struct esp_softc *esp0, *esp1;
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static void esp_intr(void *);
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static void esp_dualbus_intr(void *);
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static inline int esp_dafb_have_dreq(struct esp_softc *);
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static inline int esp_iosb_have_dreq(struct esp_softc *);
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static int esp_dafb_have_dreq(struct esp_softc *);
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static int esp_iosb_have_dreq(struct esp_softc *);
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int (*esp_have_dreq)(struct esp_softc *);
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struct ncr53c9x_glue esp_glue = {
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esp_read_reg,
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esp_write_reg,
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esp_dma_isintr,
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esp_dma_reset,
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esp_dma_intr,
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esp_dma_setup,
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esp_dma_go,
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esp_dma_stop,
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esp_dma_isactive,
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NULL, /* gl_clear_latched_intr */
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static struct esp_softc *esp0, *esp1;
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static struct ncr53c9x_glue esp_glue = {
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.gl_read_reg = esp_read_reg,
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.gl_write_reg = esp_write_reg,
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.gl_dma_isintr = esp_dma_isintr,
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.gl_dma_reset = esp_dma_reset,
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.gl_dma_intr = esp_dma_intr,
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.gl_dma_setup = esp_dma_setup,
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.gl_dma_go = esp_dma_go,
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.gl_dma_stop = esp_dma_stop,
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.gl_dma_isactive = esp_dma_isactive,
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.gl_clear_latched_intr = NULL,
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};
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int
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static int
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espmatch(device_t parent, cfdata_t cf, void *aux)
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{
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struct obio_attach_args *oa = aux;
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if (oa->oa_addr == 0 && mac68k_machine.scsi96) {
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if (oa->oa_addr == 0 && mac68k_machine.scsi96)
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return 1;
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}
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if (oa->oa_addr == 1 && mac68k_machine.scsi96_2) {
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if (oa->oa_addr == 1 && mac68k_machine.scsi96_2)
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return 1;
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}
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return 0;
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}
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/*
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* Attach this instance, and then all the sub-devices
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*/
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void
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static void
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espattach(device_t parent, device_t self, void *aux)
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{
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struct esp_softc *esc = device_private(self);
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struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
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struct obio_attach_args *oa = aux;
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int quick = 0;
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bus_addr_t addr;
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unsigned long reg_offset;
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int quick = 0;
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uint8_t irq_mask; /* mask for clearing IRQ */
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extern vaddr_t SCSIBase;
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sc->sc_dev = self;
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reg_offset = SCSIBase - IOBase;
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esc->sc_tag = oa->oa_tag;
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/*
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* For Wombat, Primus and Optimus motherboards, DREQ is
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* a (12-bit) configuration register for DAFB's control of the
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* pseudo-DMA timing. The default value is 0x1d1.
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*/
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esp_have_dreq = esp_dafb_have_dreq;
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if (oa->oa_addr == 0) {
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if (reg_offset == 0x10000) {
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quick = 1;
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esp_have_dreq = esp_iosb_have_dreq;
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} else if (reg_offset == 0x18000) {
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} else if (reg_offset == 0x18000)
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quick = 0;
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} else {
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if (bus_space_map(esc->sc_tag, 0xf9800024,
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4, 0, &esc->sc_bsh)) {
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aprint_error(": failed to map 4"
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" at 0xf9800024.\n");
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} else {
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quick = 1;
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bus_space_write_4(esc->sc_tag,
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esc->sc_bsh, 0, 0x1d1);
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}
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else {
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addr = 0xf9800024;
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goto dafb_dreq;
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}
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} else {
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if (bus_space_map(esc->sc_tag, 0xf9800028,
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4, 0, &esc->sc_bsh)) {
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aprint_error(": failed to map 4 at 0xf9800028.\n");
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} else {
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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addr = 0xf9800028;
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dafb_dreq: bst = oa->oa_tag;
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if (bus_space_map(bst, addr, 4, 0, &bsh))
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aprint_error(": failed to map 4 at 0x%lx.\n", addr);
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else {
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quick = 1;
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bus_space_write_4(esc->sc_tag, esc->sc_bsh, 0, 0x1d1);
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esp_have_dreq = esp_dafb_have_dreq;
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esc->sc_dreqreg = (volatile uint32_t *)
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bus_space_vaddr(bst, bsh);
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*esc->sc_dreqreg = 0x1d1;
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}
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}
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if (quick) {
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esp_glue.gl_write_reg = esp_quick_write_reg;
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esp_glue.gl_dma_intr = esp_quick_dma_intr;
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esc->sc_reg = (volatile uint8_t *)SCSIBase;
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via2_register_irq(VIA2_SCSIIRQ, esp_intr, esc);
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esc->irq_mask = V2IF_SCSIIRQ;
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irq_mask = V2IF_SCSIIRQ;
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if (reg_offset == 0x10000) {
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/* From the Q650 developer's note */
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sc->sc_freq = 16500000;
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} else {
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} else
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sc->sc_freq = 25000000;
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}
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if (esp_glue.gl_dma_go == esp_quick_dma_go) {
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if (quick)
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aprint_normal(" (quick)");
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}
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} else {
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esp1 = esc;
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esc->sc_reg = (volatile uint8_t *)SCSIBase + 0x402;
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via2_register_irq(VIA2_SCSIIRQ, esp_dualbus_intr, NULL);
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esc->irq_mask = 0;
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irq_mask = 0;
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sc->sc_freq = 25000000;
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if (esp_glue.gl_dma_go == esp_quick_dma_go) {
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if (quick)
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printf(" (quick)");
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}
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}
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aprint_normal(": address %p", esc->sc_reg);
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@ -313,10 +300,10 @@ espattach(device_t parent, device_t self, void *aux)
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/*
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* Configure interrupts.
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*/
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if (esc->irq_mask) {
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if (irq_mask) {
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via2_reg(vPCR) = 0x22;
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via2_reg(vIFR) = esc->irq_mask;
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via2_reg(vIER) = 0x80 | esc->irq_mask;
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via2_reg(vIFR) = irq_mask;
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via2_reg(vIER) = 0x80 | irq_mask;
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}
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/*
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@ -331,7 +318,7 @@ espattach(device_t parent, device_t self, void *aux)
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* Glue functions.
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*/
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uint8_t
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static uint8_t
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esp_read_reg(struct ncr53c9x_softc *sc, int reg)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -339,7 +326,7 @@ esp_read_reg(struct ncr53c9x_softc *sc, int reg)
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return esc->sc_reg[reg * 16];
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}
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void
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static void
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esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -351,12 +338,12 @@ esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)
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esc->sc_reg[reg * 16] = v;
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}
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void
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static void
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esp_dma_stop(struct ncr53c9x_softc *sc)
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{
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}
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int
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static int
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esp_dma_isactive(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -364,15 +351,15 @@ esp_dma_isactive(struct ncr53c9x_softc *sc)
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return esc->sc_active;
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}
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int
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static int
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esp_dma_isintr(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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return esc->sc_reg[NCR_STAT * 16] & 0x80;
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return esc->sc_reg[NCR_STAT * 16] & NCRSTAT_INT;
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}
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void
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static void
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esp_dma_reset(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -381,11 +368,11 @@ esp_dma_reset(struct ncr53c9x_softc *sc)
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esc->sc_tc = 0;
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}
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int
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static int
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esp_dma_intr(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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volatile u_char *cmdreg, *intrreg, *statreg, *fiforeg;
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volatile uint8_t *cmdreg, *intrreg, *statreg, *fiforeg;
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uint8_t *p;
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u_int espphase, espstat, espintr;
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int cnt, s;
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@ -445,8 +432,8 @@ esp_dma_intr(struct ncr53c9x_softc *sc)
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}
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} while (esc->sc_active && (espintr & NCRINTR_BS));
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sc->sc_phase = espphase;
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sc->sc_espstat = (u_char)espstat;
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sc->sc_espintr = (u_char)espintr;
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sc->sc_espstat = (uint8_t)espstat;
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sc->sc_espintr = (uint8_t)espintr;
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*esc->sc_dmaaddr = p;
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*esc->sc_dmalen = cnt;
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@ -457,7 +444,7 @@ esp_dma_intr(struct ncr53c9x_softc *sc)
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return 0;
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}
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int
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static int
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esp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
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int datain, size_t *dmasize)
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{
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@ -472,7 +459,7 @@ esp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
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return 0;
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}
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void
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static void
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esp_dma_go(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -485,8 +472,8 @@ esp_dma_go(struct ncr53c9x_softc *sc)
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esc->sc_active = 1;
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}
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void
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esp_quick_write_reg(struct ncr53c9x_softc *sc, int reg, u_char val)
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static void
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esp_quick_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -497,7 +484,7 @@ esp_quick_write_reg(struct ncr53c9x_softc *sc, int reg, u_char val)
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int mac68k_esp_debug=0;
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#endif
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int
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static int
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esp_quick_dma_intr(struct ncr53c9x_softc *sc)
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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@ -558,7 +545,7 @@ esp_quick_dma_intr(struct ncr53c9x_softc *sc)
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|||
return 0;
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||||
}
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||||
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||||
int
|
||||
static int
|
||||
esp_quick_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
|
||||
int datain, size_t *dmasize)
|
||||
{
|
||||
|
|
@ -591,14 +578,14 @@ esp_quick_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
|
|||
return 0;
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||||
}
|
||||
|
||||
static inline int
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||||
static int
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||||
esp_dafb_have_dreq(struct esp_softc *esc)
|
||||
{
|
||||
|
||||
return *(volatile uint32_t *)(esc->sc_bsh.base) & 0x200;
|
||||
return *esc->sc_dreqreg & 0x200;
|
||||
}
|
||||
|
||||
static inline int
|
||||
static int
|
||||
esp_iosb_have_dreq(struct esp_softc *esc)
|
||||
{
|
||||
|
||||
|
|
@ -617,7 +604,7 @@ static volatile int espspl = -1;
|
|||
* NCR chip with the DACK/ line. This space appears to be mapped over
|
||||
* and over, every 4 bytes, but only the lower 16 bits are valid (but
|
||||
* reading the upper 16 bits will handshake DACK/ just fine, so if you
|
||||
* read *u_int16_t++ = *u_int16_t++ in a loop, you'll get
|
||||
* read *uint16_t++ = *uint16_t++ in a loop, you'll get
|
||||
* <databyte><databyte>0xff0xff<databyte><databyte>0xff0xff...
|
||||
*
|
||||
* When you're attempting to read or write memory to this DACK/ed space,
|
||||
|
|
@ -640,7 +627,7 @@ static volatile int espspl = -1;
|
|||
* This is done to allow serial interrupts to get in during
|
||||
* scsi transfers. This is ugly.
|
||||
*/
|
||||
void
|
||||
static void
|
||||
esp_quick_dma_go(struct ncr53c9x_softc *sc)
|
||||
{
|
||||
struct esp_softc *esc = (struct esp_softc *)sc;
|
||||
|
|
@ -878,7 +865,7 @@ gotintr:
|
|||
espspl = -1;
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
esp_intr(void *sc)
|
||||
{
|
||||
struct esp_softc *esc = (struct esp_softc *)sc;
|
||||
|
|
@ -888,7 +875,7 @@ esp_intr(void *sc)
|
|||
}
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
esp_dualbus_intr(void *sc)
|
||||
{
|
||||
if (esp0 && (esp0->sc_reg[NCR_STAT * 16] & 0x80)) {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: espvar.h,v 1.7 2008/04/13 04:55:52 tsutsui Exp $ */
|
||||
/* $NetBSD: espvar.h,v 1.8 2019/07/23 07:52:53 rin Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Allen Briggs.
|
||||
|
|
@ -32,18 +32,15 @@
|
|||
|
||||
struct esp_softc {
|
||||
struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */
|
||||
bus_space_tag_t sc_tag;
|
||||
bus_space_handle_t sc_bsh;
|
||||
|
||||
volatile uint8_t *sc_reg; /* the registers */
|
||||
|
||||
uint8_t irq_mask; /* mask for clearing IRQ */
|
||||
volatile uint8_t *sc_reg; /* the registers */
|
||||
volatile uint32_t *sc_dreqreg; /* DREQ register for DAFB */
|
||||
|
||||
int sc_active; /* Pseudo-DMA state vars */
|
||||
int sc_datain;
|
||||
size_t sc_dmasize;
|
||||
uint8_t **sc_dmaaddr;
|
||||
size_t *sc_dmalen;
|
||||
int sc_tc; /* only used in non-quick */
|
||||
int sc_tc; /* used in PIO */
|
||||
int sc_pad; /* only used in quick */
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue