Re-implement page reference bit emulation by using the (otherwise unused)
valid bit. This is faster than the "unmap all" solution that were described in that Mach paper _and_ it eliminates the need for checking the wired bit. As a result of this; swapping started working again on vax :-)
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ragge
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1caaa1f520
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.24 1998/01/18 22:07:50 ragge Exp $ */
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/* $NetBSD: pmap.h,v 1.25 1998/01/31 12:17:40 ragge Exp $ */
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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@ -102,8 +102,6 @@ extern struct pmap kernel_pmap_store;
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#define pmap_collect(pmap) /* No need so far */
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#define pmap_reference(pmap) if(pmap) (pmap)->ref_count++
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#define pmap_phys_address(phys) ((u_int)(phys)<<PAGE_SHIFT)
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#define pmap_is_referenced(phys) (FALSE)
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#define pmap_clear_reference(pa) pmap_page_protect(pa, VM_PROT_NONE)
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#define pmap_change_wiring(pmap, v, w) /* no need */
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#define pmap_remove(pmap, start, slut) pmap_protect(pmap, start, slut, 0)
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.3 1997/11/04 22:59:36 ragge Exp $
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# $NetBSD: genassym.cf,v 1.4 1998/01/31 12:17:37 ragge Exp $
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#
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# Copyright (c) 1997 Ludd, University of Lule}, Sweden.
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# All rights reserved.
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@ -61,6 +61,8 @@ define PR_IPL PR_IPL
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define PR_SBIFS PR_SBIFS
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define PR_EHSR PR_EHSR
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define PR_MCESR PR_MCESR
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define PR_P0BR PR_P0BR
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define PR_P1BR PR_P1BR
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# trap numbering
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define T_KSPNOTVAL T_KSPNOTVAL
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@ -1,7 +1,7 @@
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/* $NetBSD: intvec.s,v 1.25 1997/11/13 10:43:27 veego Exp $ */
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/* $NetBSD: intvec.s,v 1.26 1998/01/31 12:17:36 ragge Exp $ */
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/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
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* Copyright (c) 1994, 1997 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -214,23 +214,67 @@ L4: addl2 (sp)+,sp # remove info pushed on stack
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TRAPCALL(resopflt, T_RESOPFLT)
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TRAPCALL(resadflt, T_RESADFLT)
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/*
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* Translation fault, used only when simulating page reference bit.
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* Therefore it is done a fast revalidation of the page if it is
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* referenced. Trouble here is the hardware bug on KA650 CPUs that
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* put in a need for an extra check when the fault is gotten during
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* PTE reference.
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*/
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.align 2
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transl_v: .globl transl_v # Translation violation, 20
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pushl $T_TRANSFLT
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L3: bbc $1,4(sp),L1
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bisl2 $T_PTEFETCH, (sp)
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L1: bbc $2,4(sp),L2
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bisl2 $T_WRITE, (sp)
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L2: movl (sp), 4(sp)
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addl2 $4, sp
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jbr trap
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#ifdef DEBUG
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bbc $0,(sp),1f # pte len illegal in trans fault
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pushab 2f
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calls $1,_panic
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2: .asciz "pte trans"
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#endif
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1: pushr $3 # save r0 & r1
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movl 12(sp),r0 # Save faulted address in r0
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blss 2f # Jump if in kernelspace
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ashl $1,r0,r0
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blss 3f # Jump if P1
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mfpr $PR_P0BR,r1
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brb 4f
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3: mfpr $PR_P1BR,r1
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4: bbc $1,8(sp),5f # Jump if not indirect
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extzv $10,$21,r0,r0 # extract pte number
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moval (r1)[r0],r0 # get address of pte
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#if defined(VAX650) || defined(DEBUG)
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extzv $10,$20,r0,r1
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movl _Sysmap,r0
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movaq (r0)[r1],r0
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tstl (r0) # If pte clear, found HW bug.
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bneq 6f
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popr $3
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brb access_v
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#endif
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2: extzv $10,$20,r0,r1 # get pte index
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movl _Sysmap,r0
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movaq (r0)[r1],r0 # pte address
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6: bisl2 $0x80000000,(r0)+ # set valid bit
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bisl2 $0x80000000,(r0)
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popr $3
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addl2 $8,sp
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rei
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5: extzv $11,$20,r0,r0
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movaq (r1)[r0],r0
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brb 6b
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.align 2
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access_v:.globl access_v # Access cntrl viol fault, 24
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blbs (sp), ptelen
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pushl $T_ACCFLT
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jbr L3
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bbc $1,4(sp),1f
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bisl2 $T_PTEFETCH,(sp)
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1: bbc $2,4(sp),2f
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bisl2 $T_WRITE,(sp)
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2: movl (sp), 4(sp)
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addl2 $4, sp
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jbr trap
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ptelen: movl $T_PTELEN, (sp) # PTE must expand (or send segv)
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jbr trap;
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.44 1998/01/27 17:35:03 ragge Exp $ */
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/* $NetBSD: pmap.c,v 1.45 1998/01/31 12:17:34 ragge Exp $ */
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/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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@ -615,6 +615,46 @@ if(startpmapdebug) printf("pmap_protect: pmap %x, start %x, end %x, prot %x\n",
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mtpr(0,PR_TBIA);
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}
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/*
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* Checks if page is referenced; returns true or false depending on result.
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*/
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boolean_t
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pmap_is_referenced(pa)
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vm_offset_t pa;
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{
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struct pv_entry *pv;
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pv = pv_table + (pa >> CLSHIFT);
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if (pv->pv_pte)
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if ((pv->pv_pte[0].pg_v))
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return 1;
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while ((pv = pv->pv_next)) {
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if ((pv->pv_pte[0].pg_v))
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return 1;
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}
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return 0;
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}
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/*
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* Clears valid bit in all ptes referenced to this physical page.
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*/
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void
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pmap_clear_reference(pa)
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vm_offset_t pa;
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{
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struct pv_entry *pv;
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pv = pv_table + (pa >> CLSHIFT);
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if (pv->pv_pte)
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pv->pv_pte[0].pg_v = pv->pv_pte[1].pg_v = 0;
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while ((pv = pv->pv_next))
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pv->pv_pte[0].pg_v = pv->pv_pte[1].pg_v = 0;
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}
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/*
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* Checks if page is modified; returns true or false depending on result.
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*/
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