Support 64-bit DMA addressing on the DP83820, used only when a 64-bit
DMA tag is available.
This commit is contained in:
thorpej
parent
89af285019
commit
a2dcbf132b
@ -1,4 +1,4 @@
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/* $NetBSD: if_sip.c,v 1.178 2020/02/07 00:04:28 thorpej Exp $ */
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/* $NetBSD: if_sip.c,v 1.179 2020/03/08 02:44:12 thorpej Exp $ */
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/*-
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* Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
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@ -73,7 +73,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.178 2020/02/07 00:04:28 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.179 2020/03/08 02:44:12 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -208,9 +208,14 @@ struct sip_softc {
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struct ethercom sc_ethercom; /* ethernet common data */
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const struct sip_product *sc_model; /* which model are we? */
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int sc_gigabit; /* 1: 83820, 0: other */
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bool sc_gigabit; /* 1: 83820, 0: other */
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bool sc_dma64; /* using 64-bit DMA addresses */
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int sc_rev; /* chip revision */
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unsigned int sc_bufptr_idx;
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unsigned int sc_cmdsts_idx;
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unsigned int sc_extsts_idx; /* DP83820 only */
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void *sc_ih; /* interrupt cookie */
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struct mii_data sc_mii; /* MII/media information */
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@ -470,6 +475,24 @@ sip_rxchain_link(struct sip_softc *sc, struct mbuf *m)
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#define SIP_CDTXADDR(sc, x) ((sc)->sc_cddma + SIP_CDTXOFF((x)))
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#define SIP_CDRXADDR(sc, x) ((sc)->sc_cddma + SIP_CDRXOFF((x)))
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static inline void
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sip_set_rxdp(struct sip_softc *sc, bus_addr_t addr)
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{
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if (sc->sc_gigabit)
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_RXDP_HI,
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BUS_ADDR_HI32(addr));
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_RXDP, BUS_ADDR_LO32(addr));
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}
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static inline void
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sip_set_txdp(struct sip_softc *sc, bus_addr_t addr)
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{
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if (sc->sc_gigabit)
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_TXDP_HI,
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BUS_ADDR_HI32(addr));
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_TXDP, BUS_ADDR_LO32(addr));
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}
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static inline void
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sip_cdtxsync(struct sip_softc *sc, const int x0, const int n0, const int ops)
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{
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@ -499,26 +522,51 @@ sip_cdrxsync(struct sip_softc *sc, int x, int ops)
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SIP_CDRXOFF(x), sizeof(struct sip_desc), ops);
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}
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#if 0
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#ifdef DP83820
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uint32_t sipd_bufptr; /* pointer to DMA segment */
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uint32_t sipd_cmdsts; /* command/status word */
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#else
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uint32_t sipd_cmdsts; /* command/status word */
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uint32_t sipd_bufptr; /* pointer to DMA segment */
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#endif /* DP83820 */
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#endif /* 0 */
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static inline volatile uint32_t *
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sipd_cmdsts(struct sip_softc *sc, struct sip_desc *sipd)
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static void
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sip_init_txring(struct sip_softc *sc)
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{
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return &sipd->sipd_cbs[(sc->sc_gigabit) ? 1 : 0];
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struct sip_desc *sipd;
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bus_addr_t next_desc;
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int i;
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memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
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for (i = 0; i < sc->sc_ntxdesc; i++) {
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sipd = &sc->sc_txdescs[i];
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next_desc = SIP_CDTXADDR(sc, sip_nexttx(sc, i));
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if (sc->sc_dma64) {
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sipd->sipd_words[GSIP64_DESC_LINK_LO] =
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htole32(BUS_ADDR_LO32(next_desc));
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sipd->sipd_words[GSIP64_DESC_LINK_HI] =
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htole32(BUS_ADDR_HI32(next_desc));
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} else {
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/* SIP_DESC_LINK == GSIP_DESC_LINK */
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sipd->sipd_words[SIP_DESC_LINK] = htole32(next_desc);
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}
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}
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sip_cdtxsync(sc, 0, sc->sc_ntxdesc,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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sc->sc_txfree = sc->sc_ntxdesc;
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sc->sc_txnext = 0;
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sc->sc_txwin = 0;
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}
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static inline volatile uint32_t *
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sipd_bufptr(struct sip_softc *sc, struct sip_desc *sipd)
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static inline void
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sip_init_txdesc(struct sip_softc *sc, int x, bus_addr_t bufptr, uint32_t cmdsts)
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{
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return &sipd->sipd_cbs[(sc->sc_gigabit) ? 0 : 1];
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struct sip_desc *sipd = &sc->sc_txdescs[x];
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if (sc->sc_dma64) {
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sipd->sipd_words[GSIP64_DESC_BUFPTR_LO] =
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htole32(BUS_ADDR_LO32(bufptr));
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sipd->sipd_words[GSIP64_DESC_BUFPTR_HI] =
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htole32(BUS_ADDR_HI32(bufptr));
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} else {
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sipd->sipd_words[sc->sc_bufptr_idx] = htole32(bufptr);
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}
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sipd->sipd_words[sc->sc_extsts_idx] = 0;
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membar_producer();
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sipd->sipd_words[sc->sc_cmdsts_idx] = htole32(cmdsts);
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/* sip_cdtxsync() will be done later. */
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}
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static inline void
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@ -526,12 +574,27 @@ sip_init_rxdesc(struct sip_softc *sc, int x)
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{
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struct sip_rxsoft *rxs = &sc->sc_rxsoft[x];
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struct sip_desc *sipd = &sc->sc_rxdescs[x];
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const bus_addr_t next_desc = SIP_CDRXADDR(sc, sip_nextrx(sc, x));
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sipd->sipd_link = htole32(SIP_CDRXADDR(sc, sip_nextrx(sc, x)));
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*sipd_bufptr(sc, sipd) = htole32(rxs->rxs_dmamap->dm_segs[0].ds_addr);
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*sipd_cmdsts(sc, sipd) = htole32(CMDSTS_INTR |
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(sc->sc_parm->p_rxbuf_len & sc->sc_bits.b_cmdsts_size_mask));
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sipd->sipd_extsts = 0;
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if (sc->sc_dma64) {
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sipd->sipd_words[GSIP64_DESC_LINK_LO] =
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htole32(BUS_ADDR_LO32(next_desc));
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sipd->sipd_words[GSIP64_DESC_LINK_HI] =
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htole32(BUS_ADDR_HI32(next_desc));
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sipd->sipd_words[GSIP64_DESC_BUFPTR_LO] =
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htole32(BUS_ADDR_LO32(rxs->rxs_dmamap->dm_segs[0].ds_addr));
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sipd->sipd_words[GSIP64_DESC_BUFPTR_HI] =
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htole32(BUS_ADDR_HI32(rxs->rxs_dmamap->dm_segs[0].ds_addr));
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} else {
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sipd->sipd_words[SIP_DESC_LINK] = htole32(next_desc);
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sipd->sipd_words[sc->sc_bufptr_idx] =
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htole32(rxs->rxs_dmamap->dm_segs[0].ds_addr);
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}
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sipd->sipd_words[sc->sc_extsts_idx] = 0;
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membar_producer();
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sipd->sipd_words[sc->sc_cmdsts_idx] =
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htole32(CMDSTS_INTR | (sc->sc_parm->p_rxbuf_len &
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sc->sc_bits.b_cmdsts_size_mask));
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sip_cdrxsync(sc, x, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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}
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@ -670,25 +733,26 @@ static const struct sip_product {
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pci_product_id_t sip_product;
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const char *sip_name;
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const struct sip_variant *sip_variant;
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int sip_gigabit;
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bool sip_gigabit;
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} sipcom_products[] = {
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{ PCI_VENDOR_NS, PCI_PRODUCT_NS_DP83820,
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"NatSemi DP83820 Gigabit Ethernet",
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&sipcom_variant_dp83820, 1 },
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&sipcom_variant_dp83820, true },
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{ PCI_VENDOR_SIS, PCI_PRODUCT_SIS_900,
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"SiS 900 10/100 Ethernet",
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&sipcom_variant_sis900, 0 },
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&sipcom_variant_sis900, false },
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{ PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7016,
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"SiS 7016 10/100 Ethernet",
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&sipcom_variant_sis900, 0 },
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&sipcom_variant_sis900, false },
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{ PCI_VENDOR_NS, PCI_PRODUCT_NS_DP83815,
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"NatSemi DP83815 10/100 Ethernet",
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&sipcom_variant_dp83815, 0 },
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&sipcom_variant_dp83815, false },
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{ 0, 0,
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NULL,
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NULL, 0 },
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NULL, false },
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};
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static const struct sip_product *
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@ -812,24 +876,30 @@ sipcom_dp83820_attach(struct sip_softc *sc, struct pci_attach_args *pa)
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}
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printf("\n");
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}
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/*
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* XXX Need some PCI flags indicating support for
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* XXX 64-bit addressing.
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* The T64ADDR bit is loaded by the chip from the EEPROM and
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* is read-only.
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*/
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#if 0
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if (reg & CFG_M64ADDR)
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sc->sc_cfg |= CFG_M64ADDR;
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if (reg & CFG_T64ADDR)
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sc->sc_cfg |= CFG_T64ADDR;
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#endif
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/*
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* We can use 64-bit DMA addressing regardless of what
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* sort of slot we're in.
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*/
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if (pci_dma64_available(pa)) {
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sc->sc_dmat = pa->pa_dmat64;
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sc->sc_cfg |= CFG_M64ADDR;
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sc->sc_dma64 = true;
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}
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if (reg & (CFG_TBI_EN | CFG_EXT_125)) {
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const char *sep = "";
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printf("%s: using ", device_xname(sc->sc_dev));
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if (reg & CFG_EXT_125) {
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sc->sc_cfg |= CFG_EXT_125;
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printf("%s125MHz clock", sep);
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printf("%sexternal 125MHz clock", sep);
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sep = ", ";
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}
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if (reg & CFG_TBI_EN) {
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@ -1004,15 +1074,32 @@ sipcom_attach(device_t parent, device_t self, void *aux)
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}
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sc->sc_dev = self;
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sc->sc_gigabit = sip->sip_gigabit;
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sc->sc_dma64 = false;
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pmf_self_suspensor_init(self, &sc->sc_suspensor, &sc->sc_qual);
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sc->sc_pc = pc;
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if (sc->sc_gigabit) {
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if (sc->sc_dma64) {
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sc->sc_bufptr_idx = GSIP64_DESC_BUFPTR_LO;
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sc->sc_cmdsts_idx = GSIP64_DESC_CMDSTS;
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sc->sc_extsts_idx = GSIP64_DESC_EXTSTS;
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} else {
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sc->sc_bufptr_idx = GSIP_DESC_BUFPTR;
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sc->sc_cmdsts_idx = GSIP_DESC_CMDSTS;
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sc->sc_extsts_idx = GSIP_DESC_EXTSTS;
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}
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sc->sc_rxintr = gsip_rxintr;
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sc->sc_parm = &gsip_parm;
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} else {
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sc->sc_rxintr = sip_rxintr;
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sc->sc_parm = &sip_parm;
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sc->sc_bufptr_idx = SIP_DESC_BUFPTR;
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sc->sc_cmdsts_idx = SIP_DESC_CMDSTS;
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/*
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* EXTSTS doesn't really exist on non-GigE parts,
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* but we initialize the index for simplicity later.
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*/
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sc->sc_extsts_idx = GSIP_DESC_EXTSTS;
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}
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tx_dmamap_size = sc->sc_parm->p_tx_dmamap_size;
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ntxsegs_alloc = sc->sc_parm->p_ntxsegs_alloc;
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@ -1376,7 +1463,7 @@ static inline void
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sipcom_set_extsts(struct sip_softc *sc, int lasttx, struct mbuf *m0,
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uint64_t capenable)
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{
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uint32_t extsts;
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uint32_t extsts = 0;
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#ifdef DEBUG
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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#endif
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@ -1397,7 +1484,7 @@ sipcom_set_extsts(struct sip_softc *sc, int lasttx, struct mbuf *m0,
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* unconditional swap instead of htons() inside.
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*/
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if (vlan_has_tag(m0)) {
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sc->sc_txdescs[lasttx].sipd_extsts |=
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sc->sc_txdescs[lasttx].sipd_words[sc->sc_extsts_idx] |=
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htole32(EXTSTS_VPKT |
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(bswap16(vlan_get_tag(m0)) &
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EXTSTS_VTCI));
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@ -1413,7 +1500,6 @@ sipcom_set_extsts(struct sip_softc *sc, int lasttx, struct mbuf *m0,
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*
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* Byte-swap constants so the compiler can optimize.
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*/
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extsts = 0;
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if (m0->m_pkthdr.csum_flags & M_CSUM_IPv4) {
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KDASSERT(ifp->if_capenable & IFCAP_CSUM_IPv4_Tx);
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SIP_EVCNT_INCR(&sc->sc_ev_txipsum);
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@ -1428,7 +1514,7 @@ sipcom_set_extsts(struct sip_softc *sc, int lasttx, struct mbuf *m0,
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SIP_EVCNT_INCR(&sc->sc_ev_txudpsum);
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extsts |= htole32(EXTSTS_UDPPKT);
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}
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sc->sc_txdescs[sc->sc_txnext].sipd_extsts |= extsts;
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sc->sc_txdescs[sc->sc_txnext].sipd_words[sc->sc_extsts_idx] |= extsts;
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}
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/*
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@ -1446,6 +1532,7 @@ sipcom_start(struct ifnet *ifp)
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bus_dmamap_t dmamap;
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int error, nexttx, lasttx, seg;
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int ofree = sc->sc_txfree;
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uint32_t cmdsts;
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#if 0
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int firsttx = sc->sc_txnext;
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#endif
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@ -1586,26 +1673,24 @@ sipcom_start(struct ifnet *ifp)
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* yet. That could cause a race condition.
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* We'll do it below.
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*/
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*sipd_bufptr(sc, &sc->sc_txdescs[nexttx]) =
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htole32(dmamap->dm_segs[seg].ds_addr);
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*sipd_cmdsts(sc, &sc->sc_txdescs[nexttx]) =
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htole32((nexttx == sc->sc_txnext ? 0 : CMDSTS_OWN)
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| CMDSTS_MORE | dmamap->dm_segs[seg].ds_len);
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sc->sc_txdescs[nexttx].sipd_extsts = 0;
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cmdsts = dmamap->dm_segs[seg].ds_len;
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if (nexttx != sc->sc_txnext)
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cmdsts |= CMDSTS_OWN;
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if (seg < dmamap->dm_nsegs - 1)
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cmdsts |= CMDSTS_MORE;
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sip_init_txdesc(sc, nexttx,
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dmamap->dm_segs[seg].ds_addr, cmdsts);
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lasttx = nexttx;
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}
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/* Clear the MORE bit on the last segment. */
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*sipd_cmdsts(sc, &sc->sc_txdescs[lasttx]) &=
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htole32(~CMDSTS_MORE);
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/*
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* If we're in the interrupt delay window, delay the
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* interrupt.
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*/
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if (++sc->sc_txwin >= (SIP_TXQUEUELEN * 2 / 3)) {
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SIP_EVCNT_INCR(&sc->sc_ev_txforceintr);
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*sipd_cmdsts(sc, &sc->sc_txdescs[lasttx]) |=
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sc->sc_txdescs[lasttx].sipd_words[sc->sc_cmdsts_idx] |=
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htole32(CMDSTS_INTR);
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sc->sc_txwin = 0;
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}
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@ -1621,7 +1706,7 @@ sipcom_start(struct ifnet *ifp)
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* The entire packet is set up. Give the first descrptor
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* to the chip now.
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*/
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*sipd_cmdsts(sc, &sc->sc_txdescs[sc->sc_txnext]) |=
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sc->sc_txdescs[sc->sc_txnext].sipd_words[sc->sc_cmdsts_idx] |=
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htole32(CMDSTS_OWN);
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sip_cdtxsync(sc, sc->sc_txnext, 1,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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@ -1670,8 +1755,7 @@ sipcom_start(struct ifnet *ifp)
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#if 0
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if ((bus_space_read_4(sc->sc_st, sc->sc_sh, SIP_CR) &
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CR_TXE) == 0) {
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_TXDP,
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SIP_CDTXADDR(sc, firsttx));
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sip_set_txdp(sc, SIP_CDTXADDR(sc, firsttx));
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bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_CR, CR_TXE);
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}
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#else
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@ -1862,8 +1946,8 @@ sipcom_intr(void *arg)
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device_xname(sc->sc_dev));
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/* Get the receive process going again. */
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bus_space_write_4(sc->sc_st, sc->sc_sh,
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SIP_RXDP, SIP_CDRXADDR(sc, sc->sc_rxptr));
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sip_set_rxdp(sc,
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SIP_CDRXADDR(sc, sc->sc_rxptr));
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bus_space_write_4(sc->sc_st, sc->sc_sh,
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SIP_CR, CR_RXE);
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}
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@ -1979,8 +2063,8 @@ sipcom_txintr(struct sip_softc *sc)
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sip_cdtxsync(sc, txs->txs_firstdesc, txs->txs_dmamap->dm_nsegs,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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cmdsts = le32toh(*sipd_cmdsts(sc,
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&sc->sc_txdescs[txs->txs_lastdesc]));
|
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cmdsts = le32toh(sc->sc_txdescs[
|
||||
txs->txs_lastdesc].sipd_words[sc->sc_cmdsts_idx]);
|
||||
if (cmdsts & CMDSTS_OWN)
|
||||
break;
|
||||
|
||||
@ -2051,8 +2135,10 @@ gsip_rxintr(struct sip_softc *sc)
|
||||
sip_cdrxsync(sc, i,
|
||||
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
|
||||
|
||||
cmdsts = le32toh(*sipd_cmdsts(sc, &sc->sc_rxdescs[i]));
|
||||
extsts = le32toh(sc->sc_rxdescs[i].sipd_extsts);
|
||||
cmdsts =
|
||||
le32toh(sc->sc_rxdescs[i].sipd_words[sc->sc_cmdsts_idx]);
|
||||
extsts =
|
||||
le32toh(sc->sc_rxdescs[i].sipd_words[sc->sc_extsts_idx]);
|
||||
len = CMDSTS_SIZE(sc, cmdsts);
|
||||
|
||||
/*
|
||||
@ -2262,7 +2348,8 @@ sip_rxintr(struct sip_softc *sc)
|
||||
sip_cdrxsync(sc, i,
|
||||
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
|
||||
|
||||
cmdsts = le32toh(*sipd_cmdsts(sc, &sc->sc_rxdescs[i]));
|
||||
cmdsts =
|
||||
le32toh(sc->sc_rxdescs[i].sipd_words[sc->sc_cmdsts_idx]);
|
||||
|
||||
/*
|
||||
* NOTE: OWN is set if owned by _consumer_. We're the
|
||||
@ -2527,7 +2614,6 @@ sipcom_init(struct ifnet *ifp)
|
||||
bus_space_handle_t sh = sc->sc_sh;
|
||||
struct sip_txsoft *txs;
|
||||
struct sip_rxsoft *rxs;
|
||||
struct sip_desc *sipd;
|
||||
int i, error = 0;
|
||||
|
||||
if (device_is_active(sc->sc_dev)) {
|
||||
@ -2574,19 +2660,8 @@ sipcom_init(struct ifnet *ifp)
|
||||
bus_space_write_4(st, sh, 0x00cc, 0x0000);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the transmit descriptor ring.
|
||||
*/
|
||||
for (i = 0; i < sc->sc_ntxdesc; i++) {
|
||||
sipd = &sc->sc_txdescs[i];
|
||||
memset(sipd, 0, sizeof(struct sip_desc));
|
||||
sipd->sipd_link = htole32(SIP_CDTXADDR(sc, sip_nexttx(sc, i)));
|
||||
}
|
||||
sip_cdtxsync(sc, 0, sc->sc_ntxdesc,
|
||||
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
|
||||
sc->sc_txfree = sc->sc_ntxdesc;
|
||||
sc->sc_txnext = 0;
|
||||
sc->sc_txwin = 0;
|
||||
/* Initialize the transmit descriptor ring. */
|
||||
sip_init_txring(sc);
|
||||
|
||||
/*
|
||||
* Initialize the transmit job descriptors.
|
||||
@ -2708,8 +2783,8 @@ sipcom_init(struct ifnet *ifp)
|
||||
/*
|
||||
* Give the transmit and receive rings to the chip.
|
||||
*/
|
||||
bus_space_write_4(st, sh, SIP_TXDP, SIP_CDTXADDR(sc, sc->sc_txnext));
|
||||
bus_space_write_4(st, sh, SIP_RXDP, SIP_CDRXADDR(sc, sc->sc_rxptr));
|
||||
sip_set_txdp(sc, SIP_CDTXADDR(sc, sc->sc_txnext));
|
||||
sip_set_rxdp(sc, SIP_CDRXADDR(sc, sc->sc_rxptr));
|
||||
|
||||
/*
|
||||
* Initialize the interrupt mask.
|
||||
@ -2840,8 +2915,9 @@ sipcom_stop(struct ifnet *ifp, int disable)
|
||||
while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
|
||||
if ((ifp->if_flags & IFF_DEBUG) != 0 &&
|
||||
SIMPLEQ_NEXT(txs, txs_q) == NULL &&
|
||||
(le32toh(*sipd_cmdsts(sc, &sc->sc_txdescs[txs->txs_lastdesc])) &
|
||||
CMDSTS_INTR) == 0)
|
||||
(sc->sc_txdescs[
|
||||
txs->txs_lastdesc].sipd_words[
|
||||
sc->sc_cmdsts_idx] & htole32(CMDSTS_INTR)) == 0)
|
||||
printf("%s: sip_stop: last descriptor does not "
|
||||
"have INTR bit set\n", device_xname(sc->sc_dev));
|
||||
SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q);
|
||||
@ -2853,7 +2929,8 @@ sipcom_stop(struct ifnet *ifp, int disable)
|
||||
}
|
||||
#endif
|
||||
cmdsts |= /* DEBUG */
|
||||
le32toh(*sipd_cmdsts(sc, &sc->sc_txdescs[txs->txs_lastdesc]));
|
||||
le32toh(sc->sc_txdescs[
|
||||
txs->txs_lastdesc].sipd_words[sc->sc_cmdsts_idx]);
|
||||
bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
|
||||
m_freem(txs->txs_mbuf);
|
||||
txs->txs_mbuf = NULL;
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: if_sipreg.h,v 1.20 2018/02/08 09:05:19 dholland Exp $ */
|
||||
/* $NetBSD: if_sipreg.h,v 1.21 2020/03/08 02:44:12 thorpej Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
@ -85,17 +85,32 @@
|
||||
* and receive descriptor chains.
|
||||
*
|
||||
* Note the DP83820 can use 64-bit DMA addresses for link and bufptr.
|
||||
* However, we do not yet support that.
|
||||
* Note also that the buffer pointer and command/status words are in
|
||||
* the opposite order on the DP83820 to facilitate 64-bit DMA addresses.
|
||||
*
|
||||
* For transmit, buffers need not be aligned. For receive, buffers
|
||||
* must be aligned to 4-byte (8-byte on DP83820) boundaries.
|
||||
*/
|
||||
#define SIP_DESC_LINK 0 /* link to next descriptor */
|
||||
#define SIP_DESC_CMDSTS 1 /* ccommand/status */
|
||||
#define SIP_DESC_BUFPTR 2 /* pointer to DMA segment */
|
||||
|
||||
#define GSIP_DESC_LINK 0
|
||||
#define GSIP_DESC_BUFPTR 1
|
||||
#define GSIP_DESC_CMDSTS 2
|
||||
#define GSIP_DESC_EXTSTS 3 /* extended status */
|
||||
|
||||
#define GSIP64_DESC_LINK_LO 0
|
||||
#define GSIP64_DESC_LINK_HI 1
|
||||
#define GSIP64_DESC_BUFPTR_LO 2
|
||||
#define GSIP64_DESC_BUFPTR_HI 3
|
||||
#define GSIP64_DESC_CMDSTS 4
|
||||
#define GSIP64_DESC_EXTSTS 5
|
||||
|
||||
#define SIP_NDESC_WORDS 6
|
||||
|
||||
struct sip_desc {
|
||||
u_int32_t sipd_link; /* link to next descriptor */
|
||||
uint32_t sipd_cbs[2]; /* command/status and pointer to
|
||||
* DMA segment
|
||||
*/
|
||||
u_int32_t sipd_extsts; /* extended status */
|
||||
uint32_t sipd_words[SIP_NDESC_WORDS];
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
Loading…
Reference in New Issue
Block a user