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Switch to new emac bindings for H3 boards

This commit is contained in:
jmcneill 2017-11-30 21:36:45 +00:00
parent 33381db08a
commit a2db71c689
5 changed files with 4 additions and 135 deletions
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32
sys/arch/arm/dts/sun50i-a64.dtsi
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@ -1,4 +1,4 @@
/* $NetBSD: sun50i-a64.dtsi,v 1.3 2017/09/09 12:05:28 jmcneill Exp $ */
/* $NetBSD: sun50i-a64.dtsi,v 1.4 2017/11/30 21:36:45 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -75,33 +75,3 @@
drive-strength = <40>;
};
};
/ {
soc {
ehci0: usb@01c1a000 {
compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_BUS_EHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@01c1a400 {
compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
};
};

15
sys/arch/arm/dts/sun8i-h3-nanopi-neo.dts
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@ -1,4 +1,4 @@
/* $NetBSD: sun8i-h3-nanopi-neo.dts,v 1.2 2017/10/05 13:25:33 jmcneill Exp $ */
/* $NetBSD: sun8i-h3-nanopi-neo.dts,v 1.3 2017/11/30 21:36:45 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -57,16 +57,3 @@
enable-active-high;
};
};
&emac {
phy-mode = "mii";
phy = <&phy1>;
allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};

31
sys/arch/arm/dts/sun8i-h3-orangepi-one.dts
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@ -1,31 +0,0 @@
/* $NetBSD: sun8i-h3-orangepi-one.dts,v 1.1 2017/09/11 20:44:14 jun Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts"
#include "sun8i-h3.dtsi"

29
sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
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@ -1,4 +1,4 @@
/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.2 2017/10/02 22:51:15 jmcneill Exp $ */
/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.3 2017/11/30 21:36:45 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -30,18 +30,6 @@
#include "sun8i-h3.dtsi"
/ {
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&emac_phy_reset_pin>;
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
cpus {
cpu@0 {
cpu-supply = <&vdd_cpu>;
@ -57,21 +45,6 @@
};
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_rgmii_a>;
phy-supply = <&reg_gmac_3v3>;
phy-mode = "rgmii";
phy = <&phy1>;
allwinner,leds-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&r_i2c {
status = "okay";

32
sys/arch/arm/dts/sun8i-h3.dtsi
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@ -1,4 +1,4 @@
/* $NetBSD: sun8i-h3.dtsi,v 1.5 2017/10/05 01:32:46 jmcneill Exp $ */
/* $NetBSD: sun8i-h3.dtsi,v 1.6 2017/11/30 21:36:45 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
@ -48,20 +48,6 @@
};
soc {
emac: ethernet@1c30000 {
compatible = "allwinner,sun8i-h3-emac";
reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
reg-names = "emac", "syscon";
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
reset-names = "ahb", "ephy";
clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
clock-names = "ahb", "ephy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
r_i2c: i2c@1f02400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01f02400 0x400>;
@ -87,19 +73,3 @@
};
};
};
&pio {
emac_pins_rgmii_a: emac_rgmii@0 {
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
"PD7", "PD8", "PD9", "PD10", "PD12", "PD13",
"PD15", "PD16", "PD17";
function = "emac";
drive-strength = <40>;
};
emac_phy_reset_pin: emac_phy_reset_pin@0 {
pins = "PD6";
function = "emac";
drive-strength = <10>;
};
};