rearrange code to make sun4m support easier to add.
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deraadt
parent
2db3edfe06
commit
a1f888ed38
@ -42,7 +42,7 @@
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* @(#)locore.s 8.2 (Berkeley) 8/12/93
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*
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* from: Header: locore.s,v 1.51 93/04/21 06:19:37 torek Exp
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* $Id: locore.s,v 1.8 1994/03/23 20:40:26 pk Exp $
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* $Id: locore.s,v 1.9 1994/05/12 08:34:57 deraadt Exp $
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*/
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#define LOCORE
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@ -172,6 +172,29 @@ _kgdb_stack:
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.globl _cpcb
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_cpcb: .word _u0
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/*
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* _cputyp is the current cpu type, to distinguish sun4c/sun4m
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* machines. this should be cleaned up. 0 = sun4c/sun4; 1 = sun4m
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*/
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.globl _cputyp
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_cputyp:
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.word 1
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#if defined(SUN4M)
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_mapme:
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.asciz "0 0 f8000000 15c6a0 map-pages"
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#endif
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#if !defined(SUN4M)
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sun4m_notsup:
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.asciz "cr .( NetBSD/sparc: sun4m support not compiled into kernel) cr"
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#endif
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#if !(defined(SUN4) || defined(SUN4C))
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sun4c_notsup:
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.asciz "cr .( NetBSD/sparc: sun4/sun4c support not compiled into kernel) cr"
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#endif
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ALIGN
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.text
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/*
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@ -595,6 +618,7 @@ Lpanic_red:
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#define CHECK_SP_REDZONE(t1, t2)
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#endif
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#if defined(SUN4) || defined(SUN4C)
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/*
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* The window code must verify user stack addresses before using them.
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* A user stack pointer is invalid if:
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@ -638,6 +662,7 @@ Lpanic_red:
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lda [pte] ASI_PTE, pte; \
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srl pte, PG_PROTSHIFT, pte; \
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cmp pte, PG_PROTUWRITE
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#endif
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/*
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* The calculations in PTE_OF_ADDR and CMP_PTE_USER_* are rather slow:
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@ -2264,11 +2289,38 @@ init_tables:
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stb %o2, [%o3 + %o1] ! (wmask - 1)[i] = j;
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dostart:
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rd %psr, %l0 ! paranoia: make sure ...
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andn %l0, PSR_ET, %l0 ! we have traps off
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wr %l0, 0, %psr ! so that we can fiddle safely
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nop; nop; nop
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mov %o0, %g7 ! save prom vector pointer
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rd %psr, %g4 ! hack: if the cpu version number is
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srl %g4, 24, %g4 ! 4, we have a sun4m machine of some
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and %g4, 0xf, %g4 ! ilk, with some SRMMU thingy instead
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cmp %g4, 0x4
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bne 0f
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mov %g0, %g4 ! clear flag for sun4c
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#if !defined(SUN4M)
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set sun4m_notsup-KERNBASE, %o0
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ld [%g7 + 0x7c], %o1
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call %o1 ! print a message saying that the
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nop ! sun4m architecture is not supported
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ld [%g7 + 0x74], %o1 ! by this kernel, then halt
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call %o1
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nop
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#else
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b 1f
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mov 1, %g4 ! set flag for sun4m
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#endif
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0:
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#if !(defined(SUN4) || defined(SUN4C))
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set sun4c_notsup-KERNBASE, %o0
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ld [%g7 + 0x7c], %o1
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call %o1 ! print a message saying that the
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nop ! sun4c architecture is not supported
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ld [%g7 + 0x74], %o1 ! by this kernel, then halt
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call %o1
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nop
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#endif
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1:
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/*
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* Startup.
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*
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@ -2285,17 +2337,16 @@ dostart:
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*/
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#endif
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wr %g0, 0, %wim ! make sure we can set psr
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mov %o0, %g7 ! save prom vector pointer
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nop; nop
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wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr
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#if (defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
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cmp %g4, %g0 ! skip for sun4m!
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bne 1f
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nop
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#endif
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#if defined(SUN4) || defined(SUN4C)
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set AC_CONTEXT, %g1 ! paranoia: set context to kernel
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stba %g0, [%g1] ASI_CONTROL
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wr %g0, 2, %wim ! set initial %wim (w1 invalid)
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mov 1, %g1 ! set pcb_wim (log2(%wim) = 1)
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sethi %hi(_u0 - KERNBASE + PCB_WIM), %g2
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st %g1, [%g2 + %lo(_u0 - KERNBASE + PCB_WIM)]
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#endif
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1:
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/*
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* Step 1: double map low RAM (addresses [0.._end-start-1])
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* to KERNBASE (addresses [KERNBASE.._end-1]). None of these
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@ -2323,6 +2374,12 @@ dostart:
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add %l2, %o1, %l2
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1:
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#endif
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#if (defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
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cmp %g4, %g0 ! skip for sun4m!
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bne 1f
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nop
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#endif
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#if defined(SUN4) || defined(SUN4C)
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set 1 << 18, %l3 ! segment size in bytes
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0:
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lduba [%l0] ASI_SEGMAP, %l4 ! segmap[highva] = segmap[lowva];
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@ -2343,19 +2400,49 @@ dostart:
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mov IE_ALLIE, %l1
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nop; nop ! paranoia
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stb %l1, [%l0]
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b 2f
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nop
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#endif /* SUN4 || SUN4C */
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1:
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#if defined(SUN4M)
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! rominterpret("0 0 f8000000 15c6a0 map-pages");
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set _mapme-KERNBASE, %o0
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ld [%g7 + 0x7c], %o1
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call %o1 ! forth eval
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nop
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#endif /* SUN4M */
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2:
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/*
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* All set, fix pc and npc. Once we are where we should be,
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* we can give ourselves a stack and enable traps.
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*/
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set 1f, %l0
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jmp %l0
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set 1f, %g1
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jmp %g1
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nop
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1:
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sethi %hi(_cputyp), %o0 ! store sun4c/sun4m flag
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st %g4, [%o0 + %lo(_cputyp)]
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rd %psr, %g3 ! paranoia: make sure ...
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andn %g3, PSR_ET, %g3 ! we have traps off
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wr %g3, 0, %psr ! so that we can fiddle safely
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nop; nop; nop
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wr %g0, 0, %wim ! make sure we can set psr
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nop; nop; nop
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wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr
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nop; nop; nop
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wr %g0, 2, %wim ! set initial %wim (w1 invalid)
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mov 1, %g1 ! set pcb_wim (log2(%wim) = 1)
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sethi %hi(_u0 + PCB_WIM), %g2
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st %g1, [%g2 + %lo(_u0 + PCB_WIM)]
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set USRSTACK - CCFSZ, %fp ! as if called from user code
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set estack0 - CCFSZ - 80, %sp ! via syscall(boot_me_up) or somesuch
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rd %psr, %l0
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wr %l0, PSR_ET, %psr
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nop; nop; nop
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/*
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* Step 2: clear BSS. This may just be paranoia; the boot
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@ -2393,7 +2480,7 @@ dostart:
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*/
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set _trapbase, %l0
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wr %l0, 0, %tbr
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nop ! paranoia
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nop; nop; nop ! paranoia
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/*
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* Bootstrap, call main, and `return' from a fake trap into `icode'.
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@ -3222,10 +3309,26 @@ Lsw_load:
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/* p does have a context: just switch to it */
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Lsw_havectx:
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! ld [%o3 + VM_PMAP_CTXNUM], %o0 ! (done in delay slot)
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#if (defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
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set _cputyp, %o1
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ld [%o1], %o1
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cmp %o1, %g0
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bne 1f
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nop
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#endif
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#if defined(SUN4) || defined(SUN4C)
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set AC_CONTEXT, %o1
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stba %o0, [%o1] ASI_CONTROL ! setcontext(vm->vm_pmap.pm_ctxnum);
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retl
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nop
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#endif
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1:
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#if defined(SUN4M)
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set SRMMU_CXR, %o1
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stba %o0, [%o1] ASI_SRMMU ! setcontext(vm->vm_pmap.pm_ctxnum);
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retl
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nop
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#endif
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Lsw_sameproc:
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/*
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