diff --git a/sys/dev/pci/siop_pci.c b/sys/dev/pci/siop_pci.c index c44b1aa4d1f6..7db48c8aaf59 100644 --- a/sys/dev/pci/siop_pci.c +++ b/sys/dev/pci/siop_pci.c @@ -1,4 +1,4 @@ -/* $NetBSD: siop_pci.c,v 1.7 2000/05/10 17:22:46 thorpej Exp $ */ +/* $NetBSD: siop_pci.c,v 1.8 2000/05/15 07:53:17 bouyer Exp $ */ /* * Copyright (c) 2000 Manuel Bouyer. @@ -17,17 +17,16 @@ * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* SYM53c8xx PCI-SCSI I/O Processors driver: PCI front-end */ @@ -35,166 +34,16 @@ #include #include #include -#include -#include #include -#include - #include #include -#include #include #include #include - -/* structure describing each chip */ -struct siop_product_desc { - u_int32_t product; - int revision; - const char *name; - int features; /* features are defined in siopvar.h */ - u_int8_t maxburst; - u_int8_t maxoff; /* maximum supported offset */ - u_int8_t clock_div; /* clock divider to use for async. logic */ - u_int8_t clock_period; /* clock period (ns * 10) */ -}; - -/* List (array, really :) of chips we know how to handle */ -const struct siop_product_desc siop_products[] = { - { PCI_PRODUCT_SYMBIOS_810, - 0x00, - "Symbios Logic 53c810 (fast scsi)", - SF_PCI_RL, - 4, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_810, - 0x10, - "Symbios Logic 53c810a (fast scsi)", - SF_PCI_RL | SF_PCI_BOF | SF_CHIP_PF, - 4, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_815, - 0x00, - "Symbios Logic 53c815 (fast scsi)", - SF_PCI_RL | SF_PCI_BOF, - 4, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_820, - 0x00, - "Symbios Logic 53c820 (fast wide scsi)", - SF_PCI_RL | SF_BUS_WIDE, - 4, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_825, - 0x00, - "Symbios Logic 53c825 (fast wide scsi)", - SF_PCI_RL | SF_PCI_BOF | SF_BUS_WIDE, - 4, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_825, - 0x10, - "Symbios Logic 53c825a (fast wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | - SF_BUS_WIDE, - 7, 8, 3, 250 - }, - { PCI_PRODUCT_SYMBIOS_860, - 0x00, - "Symbios Logic 53c860 (ultra scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_PF | - SF_BUS_ULTRA, - 4, 8, 5, 125 - }, - { PCI_PRODUCT_SYMBIOS_875, - 0x00, - "Symbios Logic 53c875 (ultra-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | - SF_BUS_ULTRA | SF_BUS_WIDE, - 7, 16, 5, 125 - }, - { PCI_PRODUCT_SYMBIOS_875, - 0x02, - "Symbios Logic 53c875 (ultra-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | - SF_BUS_ULTRA | SF_BUS_WIDE, - 7, 16, 5, 125 - }, - { PCI_PRODUCT_SYMBIOS_875J, - 0x00, - "Symbios Logic 53c875j (ultra-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | - SF_BUS_ULTRA | SF_BUS_WIDE, - 7, 16, 5, 125 - }, - { PCI_PRODUCT_SYMBIOS_885, - 0x00, - "Symbios Logic 53c885 (ultra-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | - SF_BUS_ULTRA | SF_BUS_WIDE, - 7, 16, 5, 125 - }, - { PCI_PRODUCT_SYMBIOS_895, - 0x00, - "Symbios Logic 53c895 (ultra2-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD | - SF_BUS_ULTRA2 | SF_BUS_WIDE, - 7, 31, 7, 62 - }, - { PCI_PRODUCT_SYMBIOS_896, - 0x00, - "Symbios Logic 53c896 (ultra2-wide scsi)", - SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | - SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD | - SF_BUS_ULTRA2 | SF_BUS_WIDE, - 7, 31, 7, 62 - }, - { 0, - 0x00, - NULL, - 0x00, - 0, 0, 0, 0 - }, -}; - -const struct siop_product_desc * siop_lookup_product __P((u_int32_t, int)); - -const struct siop_product_desc * -siop_lookup_product(id, rev) - u_int32_t id; - int rev; -{ - const struct siop_product_desc *pp; - const struct siop_product_desc *rp = NULL; - - if (PCI_VENDOR(id) != PCI_VENDOR_SYMBIOS) - return NULL; - - for (pp = siop_products; pp->name != NULL; pp++) { - if (PCI_PRODUCT(id) == pp->product && pp->revision <= rev) - if (rp == NULL || pp->revision > rp->revision) - rp = pp; - } - return rp; -} - -/* Driver internal state */ -struct siop_pci_softc { - struct siop_softc siop; - pci_chipset_tag_t sc_pc; /* PCI registers info */ - pcitag_t sc_tag; - void *sc_ih; /* PCI interrupt handle */ - const struct siop_product_desc *sc_pp; /* Adapter description */ -}; +#include int siop_pci_match __P((struct device *, struct cfdata *, void *)); void siop_pci_attach __P((struct device *, struct device *, void *)); @@ -225,82 +74,10 @@ siop_pci_attach(parent, self, aux) void *aux; { struct pci_attach_args *pa = aux; - pci_chipset_tag_t pc = pa->pa_pc; - pcitag_t tag = pa->pa_tag; struct siop_pci_softc *sc = (struct siop_pci_softc *)self; - const char *intrstr; - pci_intr_handle_t intrhandle; - bus_space_tag_t iot, memt; - bus_space_handle_t ioh, memh; - pcireg_t memtype; - int memh_valid, ioh_valid; - bus_addr_t ioaddr, memaddr; - sc->sc_pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class)); - if (sc->sc_pp == NULL) { - printf("sym: broken match/attach!!\n"); + if (siop_pci_attach_common(sc, pa) == 0) return; - } - printf(": %s\n", sc->sc_pp->name); - sc->sc_pc = pc; - sc->sc_tag = tag; - sc->siop.sc_dmat = pa->pa_dmat; - memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, 0x14); - switch (memtype) { - case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: - case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: - memh_valid = (pci_mapreg_map(pa, 0x14, memtype, 0, - &memt, &memh, &memaddr, NULL) == 0); - break; - default: - memh_valid = 0; - } - - ioh_valid = (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, - &iot, &ioh, &ioaddr, NULL) == 0); - - if (memh_valid) { - sc->siop.sc_rt = memt; - sc->siop.sc_rh = memh; - sc->siop.sc_raddr = memaddr; - } else if (ioh_valid) { - sc->siop.sc_rt = iot; - sc->siop.sc_rh = ioh; - sc->siop.sc_raddr = ioaddr; - } else { - printf("%s: unable to map device registers\n", - sc->siop.sc_dev.dv_xname); - return; - } - - if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, - pa->pa_intrline, &intrhandle) != 0) { - printf("%s: couldn't map interrupt\n", - sc->siop.sc_dev.dv_xname); - return; - } - intrstr = pci_intr_string(pa->pa_pc, intrhandle); - sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, - siop_intr, &sc->siop); - if (sc->sc_ih != NULL) { - printf("%s: interrupting at %s\n", - sc->siop.sc_dev.dv_xname, - intrstr ? intrstr : "unknown interrupt"); - } else { - printf("%s: couldn't establish interrupt", - sc->siop.sc_dev.dv_xname); - if (intrstr != NULL) - printf(" at %s", intrstr); - printf("\n"); - return; - } - /* copy interesting infos about the chip */ - sc->siop.features = sc->sc_pp->features; - sc->siop.maxburst = sc->sc_pp->maxburst; - sc->siop.maxoff = sc->sc_pp->maxoff; - sc->siop.clock_div = sc->sc_pp->clock_div; - sc->siop.clock_period = sc->sc_pp->clock_period; - /* attach generic code */ siop_attach(&sc->siop); } diff --git a/sys/dev/pci/siop_pci_common.c b/sys/dev/pci/siop_pci_common.c new file mode 100644 index 000000000000..86b14e10a819 --- /dev/null +++ b/sys/dev/pci/siop_pci_common.c @@ -0,0 +1,304 @@ +/* $NetBSD: siop_pci_common.c,v 1.1 2000/05/15 07:53:18 bouyer Exp $ */ + +/* + * Copyright (c) 2000 Manuel Bouyer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Manuel Bouyer + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* SYM53c8xx PCI-SCSI I/O Processors driver: PCI front-end */ + +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include + +/* List (array, really :) of chips we know how to handle */ +const struct siop_product_desc siop_products[] = { + { PCI_PRODUCT_SYMBIOS_810, + 0x00, + "Symbios Logic 53c810 (fast scsi)", + SF_PCI_RL | SF_CHIP_LS, + 4, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_810, + 0x10, + "Symbios Logic 53c810a (fast scsi)", + SF_PCI_RL | SF_PCI_BOF | SF_CHIP_PF | SF_CHIP_LS, + 4, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_815, + 0x00, + "Symbios Logic 53c815 (fast scsi)", + SF_PCI_RL | SF_PCI_BOF, + 4, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_820, + 0x00, + "Symbios Logic 53c820 (fast wide scsi)", + SF_PCI_RL | SF_CHIP_LS | SF_BUS_WIDE, + 4, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_825, + 0x00, + "Symbios Logic 53c825 (fast wide scsi)", + SF_PCI_RL | SF_PCI_BOF | SF_BUS_WIDE, + 4, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_825, + 0x10, + "Symbios Logic 53c825a (fast wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_WIDE, + 7, 8, 3, 250 + }, + { PCI_PRODUCT_SYMBIOS_860, + 0x00, + "Symbios Logic 53c860 (ultra scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_PF | SF_CHIP_LS | + SF_BUS_ULTRA, + 4, 8, 5, 125 + }, + { PCI_PRODUCT_SYMBIOS_875, + 0x00, + "Symbios Logic 53c875 (ultra-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA | SF_BUS_WIDE, + 7, 16, 5, 125 + }, + { PCI_PRODUCT_SYMBIOS_875, + 0x02, + "Symbios Logic 53c875 (ultra-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | + SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA | SF_BUS_WIDE, + 7, 16, 5, 125 + }, + { PCI_PRODUCT_SYMBIOS_875J, + 0x00, + "Symbios Logic 53c875j (ultra-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | + SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA | SF_BUS_WIDE, + 7, 16, 5, 125 + }, + { PCI_PRODUCT_SYMBIOS_885, + 0x00, + "Symbios Logic 53c885 (ultra-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR | + SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA | SF_BUS_WIDE, + 7, 16, 5, 125 + }, + { PCI_PRODUCT_SYMBIOS_895, + 0x00, + "Symbios Logic 53c895 (ultra2-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD | + SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA2 | SF_BUS_WIDE, + 7, 31, 7, 62 + }, + { PCI_PRODUCT_SYMBIOS_896, + 0x00, + "Symbios Logic 53c896 (ultra2-wide scsi)", + SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM | + SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD | + SF_CHIP_LS | SF_CHIP_10REGS | + SF_BUS_ULTRA2 | SF_BUS_WIDE, + 7, 31, 7, 62 + }, + { 0, + 0x00, + NULL, + 0x00, + 0, 0, 0, 0 + }, +}; + +const struct siop_product_desc * +siop_lookup_product(id, rev) + u_int32_t id; + int rev; +{ + const struct siop_product_desc *pp; + const struct siop_product_desc *rp = NULL; + + if (PCI_VENDOR(id) != PCI_VENDOR_SYMBIOS) + return NULL; + + for (pp = siop_products; pp->name != NULL; pp++) { + if (PCI_PRODUCT(id) == pp->product && pp->revision <= rev) + if (rp == NULL || pp->revision > rp->revision) + rp = pp; + } + return rp; +} + +int +siop_pci_attach_common(sc, pa) + struct siop_pci_softc *sc; + struct pci_attach_args *pa; +{ + pci_chipset_tag_t pc = pa->pa_pc; + pcitag_t tag = pa->pa_tag; + const char *intrstr; + pci_intr_handle_t intrhandle; + bus_space_tag_t iot, memt; + bus_space_handle_t ioh, memh; + pcireg_t memtype; + int memh_valid, ioh_valid; + bus_addr_t ioaddr, memaddr; + + sc->sc_pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class)); + if (sc->sc_pp == NULL) { + printf("sym: broken match/attach!!\n"); + return 0; + } + printf(": %s\n", sc->sc_pp->name); + sc->sc_pc = pc; + sc->sc_tag = tag; + sc->siop.sc_dmat = pa->pa_dmat; + + memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, 0x14); + switch (memtype) { + case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: + case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: + memh_valid = (pci_mapreg_map(pa, 0x14, memtype, 0, + &memt, &memh, &memaddr, NULL) == 0); + break; + default: + memh_valid = 0; + } + + ioh_valid = (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, + &iot, &ioh, &ioaddr, NULL) == 0); + + if (memh_valid) { + sc->siop.sc_rt = memt; + sc->siop.sc_rh = memh; + sc->siop.sc_raddr = memaddr; + } else if (ioh_valid) { + sc->siop.sc_rt = iot; + sc->siop.sc_rh = ioh; + sc->siop.sc_raddr = ioaddr; + } else { + printf("%s: unable to map device registers\n", + sc->siop.sc_dev.dv_xname); + return 0; + } + + if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, + pa->pa_intrline, &intrhandle) != 0) { + printf("%s: couldn't map interrupt\n", + sc->siop.sc_dev.dv_xname); + return 0; + } + intrstr = pci_intr_string(pa->pa_pc, intrhandle); + sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, + siop_intr, &sc->siop); + if (sc->sc_ih != NULL) { + printf("%s: interrupting at %s\n", + sc->siop.sc_dev.dv_xname, + intrstr ? intrstr : "unknown interrupt"); + } else { + printf("%s: couldn't establish interrupt", + sc->siop.sc_dev.dv_xname); + if (intrstr != NULL) + printf(" at %s", intrstr); + printf("\n"); + return 0; + } + /* copy interesting infos about the chip */ + sc->siop.features = sc->sc_pp->features; + sc->siop.maxburst = sc->sc_pp->maxburst; + sc->siop.maxoff = sc->sc_pp->maxoff; + sc->siop.clock_div = sc->sc_pp->clock_div; + sc->siop.clock_period = sc->sc_pp->clock_period; + sc->siop.sc_reset = siop_pci_reset; + return 1; +} + +void +siop_pci_reset(sc) + struct siop_softc *sc; +{ + int dmode; + + dmode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DMODE); + if (sc->features & SF_PCI_RL) + dmode |= DMODE_ERL; + if (sc->features & SF_PCI_RM) + dmode |= DMODE_ERMP; + if (sc->features & SF_PCI_BOF) + dmode |= DMODE_BOF; + if (sc->features & SF_PCI_CLS) + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, + bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL) | + DCNTL_CLSE); + if (sc->features & SF_PCI_WRI) + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3, + bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) | + CTEST3_WRIE); + if (sc->maxburst) { + int ctest5 = bus_space_read_1(sc->sc_rt, sc->sc_rh, + SIOP_CTEST5); + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, + bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4) & + ~CTEST4_BDIS); + dmode &= ~DMODE_BL_MASK; + dmode |= ((sc->maxburst - 1) << DMODE_BL_SHIFT) & DMODE_BL_MASK; + ctest5 &= ~CTEST5_BBCK; + ctest5 |= (sc->maxburst - 1) & CTEST5_BBCK; + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5, ctest5); + } else { + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, + bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4) | + CTEST4_BDIS); + } + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DMODE, dmode); +} diff --git a/sys/dev/pci/siop_pci_common.h b/sys/dev/pci/siop_pci_common.h new file mode 100644 index 000000000000..60c10487af04 --- /dev/null +++ b/sys/dev/pci/siop_pci_common.h @@ -0,0 +1,59 @@ +/* $NetBSD: siop_pci_common.h,v 1.1 2000/05/15 07:53:18 bouyer Exp $ */ + +/* + * Copyright (c) 2000 Manuel Bouyer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Manuel Bouyer + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* common functions for the siop and esiop pci front ends */ + +/* structure describing each chip */ +struct siop_product_desc { + u_int32_t product; + int revision; + const char *name; + int features; /* features are defined in siopvar.h */ + u_int8_t maxburst; + u_int8_t maxoff; /* maximum supported offset */ + u_int8_t clock_div; /* clock divider to use for async. logic */ + u_int8_t clock_period; /* clock period (ns * 10) */ +}; + +const struct siop_product_desc * siop_lookup_product __P((u_int32_t, int)); + +/* Driver internal state */ +struct siop_pci_softc { + struct siop_softc siop; + pci_chipset_tag_t sc_pc; /* PCI registers info */ + pcitag_t sc_tag; + void *sc_ih; /* PCI interrupt handle */ + const struct siop_product_desc *sc_pp; /* Adapter description */ +}; + +int siop_pci_attach_common __P((struct siop_pci_softc *, + struct pci_attach_args *)); +void siop_pci_reset __P((struct siop_softc *));