Pull in the bzero() changes from libc for real, with a couple of kernel-
specific hacks: * Make the bias handling depend on STKB, so it switches correctly for 32-bit kernels. * Use the 32-bit stw/ld for 32-bit kernels. * Add a few `-STKB's that were missed in the previous change.
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.86 2000/07/24 14:55:56 pk Exp $ */
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/* $NetBSD: locore.s,v 1.87 2000/07/24 15:57:07 mycroft Exp $ */
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/*
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* Copyright (c) 1996-1999 Eduardo Horvath
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* Copyright (c) 1996 Paul Kranenburg
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@ -8526,7 +8526,7 @@ ENTRY(pmap_zero_page)
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set EINTSTACK-STKB, %l4 ! Are we on intr stack?
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cmp %sp, %l4
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bgu,pt %xcc, 1f
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set INTSTACK, %l4
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set INTSTACK-STKB, %l4
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cmp %sp, %l4
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blu %xcc, 1f
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0:
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@ -8825,7 +8825,7 @@ ENTRY(pmap_copy_page)
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set EINTSTACK-STKB, %l4 ! Are we on intr stack?
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cmp %sp, %l4
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bgu,pt %xcc, 1f
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set INTSTACK, %l4
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set INTSTACK-STKB, %l4
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cmp %sp, %l4
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blu %xcc, 1f
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0:
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@ -9767,20 +9767,17 @@ Lbzero_block:
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save %sp, -(CC64FSZ+FS_SIZE+BLOCK_SIZE), %sp ! Allocate an fpstate
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sethi %hi(FPPROC), %l1
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LDPTR [%l1 + %lo(FPPROC)], %l2 ! Load fpproc
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btst 1, %sp
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add %sp, (CC64FSZ+BLOCK_SIZE-1), %l0 ! Calculate pointer to fpstate
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add %l0, BIAS, %l3
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movnz %xcc, %l3, %l0
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add %sp, (CC64FSZ+STKB+BLOCK_SIZE-1), %l0 ! Calculate pointer to fpstate
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brz,pt %l2, 1f ! fpproc == NULL?
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andn %l0, BLOCK_ALIGN, %l0 ! And make it block aligned
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LDPTR [%l2 + P_FPSTATE], %l3
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brz,pn %l3, 1f ! Make sure we have an fpstate
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mov %l3, %o0
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call _C_LABEL(savefpstate) ! Save the old fpstate
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set EINTSTACK-STKB, %l4 ! Are we on intr stack?
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set EINTSTACK-STKB, %l4 ! Are we on intr stack?
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cmp %sp, %l4
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bgu,pt %xcc, 1f
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set INTSTACK, %l4
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set INTSTACK-STKB, %l4
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cmp %sp, %l4
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blu %xcc, 1f
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0:
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@ -9812,22 +9809,17 @@ Lbzero_block:
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dec 8, %i1
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2:
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brz,pt %i2, 4f ! Do we have a pattern to load?
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fzero %f0 ! Set up FPU
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#ifdef _LP64
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stx %i2, [%sp + BIAS + 0x50] ! Flush this puppy to RAM
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membar #StoreLoad
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ldd [%sp + BIAS + 0x50], %f0
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#else
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stw %i2, [%sp + 0x28] ! Flush this puppy to RAM
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membar #StoreLoad
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ld [%sp + 0x28], %f0
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fmovsa %icc, %f0, %f1
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#endif
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btst 1, %fp
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bnz,pt %icc, 3f ! 64-bit stack?
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nop
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stw %i2, [%sp + 0x8] ! Flush this puppy to RAM
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membar #StoreLoad
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ld [%sp + 0x8], %f0
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ba,pt %icc, 4f
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fmovsa %icc, %f0, %f1
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3:
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stx %i2, [%sp + BIAS + 0x8] ! Flush this puppy to RAM
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membar #StoreLoad
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ldd [%sp + BIAS + 0x8], %f0
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4:
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fmovda %icc, %f0, %f2 ! Duplicate the pattern
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fmovda %icc, %f0, %f4
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fmovda %icc, %f0, %f6
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@ -9835,14 +9827,6 @@ Lbzero_block:
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fmovda %icc, %f0, %f10
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fmovda %icc, %f0, %f12
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fmovda %icc, %f0, %f14
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fmovda %icc, %f0, %f16 ! And second bank
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fmovda %icc, %f0, %f18
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fmovda %icc, %f0, %f20
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fmovda %icc, %f0, %f22
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fmovda %icc, %f0, %f24
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fmovda %icc, %f0, %f26
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fmovda %icc, %f0, %f28
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fmovda %icc, %f0, %f30
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!! Remember: we were 8 bytes too far
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dec 56, %i1 ! Go one iteration too far
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