Get rid of the disgusting struct apc_dma *dma = NULL; hack now that we
have proper definitions for offsets of APM DMA registers. NULL out round_buffersize and round_blocksize in audio_hw_if. We don't seem to have any special requirements and audio(9) already provides enough rounding.
This commit is contained in:
uwe
parent
8bedb90edc
commit
a0a4638c6f
@ -1,4 +1,4 @@
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/* $NetBSD: cs4231_sbus.c,v 1.28 2003/05/03 18:11:39 wiz Exp $ */
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/* $NetBSD: cs4231_sbus.c,v 1.29 2003/09/10 11:45:45 uwe Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2002 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cs4231_sbus.c,v 1.28 2003/05/03 18:11:39 wiz Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cs4231_sbus.c,v 1.29 2003/09/10 11:45:45 uwe Exp $");
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#include "audio.h"
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#if NAUDIO > 0
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@ -107,7 +107,7 @@ struct audio_hw_if audiocs_sbus_hw_if = {
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NULL, /* drain */
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ad1848_query_encoding,
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ad1848_set_params,
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cs4231_round_blocksize,
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NULL, /* round_blocksize */
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ad1848_commit_settings,
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NULL, /* init_output */
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NULL, /* init_input */
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@ -123,7 +123,7 @@ struct audio_hw_if audiocs_sbus_hw_if = {
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cs4231_query_devinfo,
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cs4231_malloc,
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cs4231_free,
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cs4231_round_buffersize,
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NULL, /* round_buffersize */
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NULL, /* mappage */
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cs4231_get_props,
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cs4231_sbus_trigger_output,
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@ -182,7 +182,7 @@ cs4231_sbus_attach(parent, self, aux)
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}
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bus_space_subregion(sa->sa_bustag, bh, CS4231_APCDMA_OFFSET,
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sizeof(struct apc_dma), &sbsc->sc_bh);
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APC_DMA_SIZE, &sbsc->sc_bh);
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cs4231_common_attach(sc, bh);
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printf("\n");
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@ -206,29 +206,28 @@ cs4231_sbus_regdump(label, sc)
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struct cs4231_sbus_softc *sc;
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{
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char bits[128];
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volatile struct apc_dma *dma = NULL;
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printf("cs4231regdump(%s): regs:", label);
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printf("dmapva: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmapva));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_PVA));
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printf("dmapc: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmapc));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_PC));
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printf("dmapnva: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmapnva));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_PNVA));
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printf("dmapnc: 0x%x\n",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmapnc));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_PNC));
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printf("dmacva: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmacva));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_CVA));
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printf("dmacc: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmacc));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_CC));
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printf("dmacnva: 0x%x; ",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmacnva));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_CNVA));
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printf("dmacnc: 0x%x\n",
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmacnc));
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_CNC));
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printf("apc_dmacsr=%s\n",
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bitmask_snprintf(
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bus_space_read_4(sc->sc_bh, sc->sc_bh, &dma->dmacsr),
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bus_space_read_4(sc->sc_bh, sc->sc_bh, APC_DMA_CSR),
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APC_BITS, bits, sizeof(bits)));
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ad1848_dump_regs(&sc->sc_cs4231.sc_ad1848);
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@ -248,7 +247,6 @@ cs4231_sbus_trigger_output(addr, start, end, blksize, intr, arg, param)
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struct cs4231_sbus_softc *sbsc = addr;
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struct cs4231_softc *sc = &sbsc->sc_cs4231;
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struct cs_transfer *t = &sc->sc_playback;
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volatile struct apc_dma *dma = NULL;
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u_int32_t csr;
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bus_addr_t dmaaddr;
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bus_size_t dmasize;
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@ -263,34 +261,34 @@ cs4231_sbus_trigger_output(addr, start, end, blksize, intr, arg, param)
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return (ret);
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DPRINTF(("trigger_output: was: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNC)));
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/* load first block */
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnva, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnc, dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNVA, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNC, dmasize);
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DPRINTF(("trigger_output: 1st: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNC)));
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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DPRINTF(("trigger_output: csr=%s\n",
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bitmask_snprintf(csr, APC_BITS, bits, sizeof(bits))));
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if ((csr & PDMA_GO) == 0 || (csr & APC_PPAUSE) != 0) {
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int cfg;
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csr &= ~(APC_PPAUSE | APC_PMIE | APC_INTR_MASK);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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csr &= ~APC_INTR_MASK;
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csr |= APC_ENABLE | APC_PIE | APC_PMIE | PDMA_GO;
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
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ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
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ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
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@ -304,17 +302,17 @@ cs4231_sbus_trigger_output(addr, start, end, blksize, intr, arg, param)
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}
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/* load next block if we can */
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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if (csr & APC_PD) {
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cs4231_transfer_advance(t, &dmaaddr, &dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnva, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnc, dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNVA, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNC, dmasize);
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DPRINTF(("trigger_output: 2nd: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmapnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_PNC)));
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}
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return (0);
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@ -327,7 +325,6 @@ cs4231_sbus_halt_output(addr)
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{
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struct cs4231_sbus_softc *sbsc = addr;
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struct cs4231_softc *sc = &sbsc->sc_cs4231;
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volatile struct apc_dma *dma = NULL;
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u_int32_t csr;
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int cfg;
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#ifdef AUDIO_DEBUG
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@ -336,19 +333,19 @@ cs4231_sbus_halt_output(addr)
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sc->sc_playback.t_active = 0;
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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DPRINTF(("halt_output: csr=%s\n",
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bitmask_snprintf(csr, APC_BITS, bits, sizeof(bits))));
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csr &= ~APC_INTR_MASK; /* do not clear interrupts accidentally */
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csr |= APC_PPAUSE; /* pause playback (let current complete) */
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
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/* let the curernt transfer complete */
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if (csr & PDMA_GO)
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do {
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh,
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(vaddr_t)&dma->dmacsr);
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APC_DMA_CSR);
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DPRINTF(("halt_output: csr=%s\n",
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bitmask_snprintf(csr, APC_BITS,
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bits, sizeof(bits))));
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@ -374,7 +371,6 @@ cs4231_sbus_trigger_input(addr, start, end, blksize, intr, arg, param)
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struct cs4231_sbus_softc *sbsc = addr;
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struct cs4231_softc *sc = &sbsc->sc_cs4231;
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struct cs_transfer *t = &sc->sc_capture;
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volatile struct apc_dma *dma = NULL;
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u_int32_t csr;
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bus_addr_t dmaaddr;
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bus_size_t dmasize;
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@ -388,36 +384,36 @@ cs4231_sbus_trigger_input(addr, start, end, blksize, intr, arg, param)
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if (ret != 0)
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return (ret);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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DPRINTF(("trigger_input: csr=%s\n",
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bitmask_snprintf(csr, APC_BITS, bits, sizeof(bits))));
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DPRINTF(("trigger_input: was: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNC)));
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/* supply first block */
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnva, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnc, dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNVA, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNC, dmasize);
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DPRINTF(("trigger_input: 1st: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNC)));
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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if ((csr & CDMA_GO) == 0 || (csr & APC_CPAUSE) != 0) {
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int cfg;
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csr &= ~(APC_CPAUSE | APC_CMIE | APC_INTR_MASK);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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csr &= ~APC_INTR_MASK;
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csr |= APC_ENABLE | APC_CIE | CDMA_GO;
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
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ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
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ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
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@ -431,16 +427,16 @@ cs4231_sbus_trigger_input(addr, start, end, blksize, intr, arg, param)
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}
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/* supply next block if we can */
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
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csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
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if (csr & APC_CD) {
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cs4231_transfer_advance(t, &dmaaddr, &dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnva, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnc, dmasize);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNVA, dmaaddr);
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bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNC, dmasize);
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DPRINTF(("trigger_input: 2nd: %x %d, %x %d\n",
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacc),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnva),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacnc)));
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CC),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNVA),
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bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CNC)));
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}
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return (0);
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@ -453,7 +449,6 @@ cs4231_sbus_halt_input(addr)
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{
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struct cs4231_sbus_softc *sbsc = addr;
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struct cs4231_softc *sc = &sbsc->sc_cs4231;
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volatile struct apc_dma *dma = NULL;
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u_int32_t csr;
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int cfg;
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#ifdef AUDIO_DEBUG
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@ -462,19 +457,19 @@ cs4231_sbus_halt_input(addr)
|
||||
|
||||
sc->sc_capture.t_active = 0;
|
||||
|
||||
csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
|
||||
csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
|
||||
DPRINTF(("halt_input: csr=%s\n",
|
||||
bitmask_snprintf(csr, APC_BITS, bits, sizeof(bits))));
|
||||
|
||||
csr &= ~APC_INTR_MASK; /* do not clear interrupts accidentally */
|
||||
csr |= APC_CPAUSE;
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
|
||||
|
||||
/* let the curernt transfer complete */
|
||||
if (csr & CDMA_GO)
|
||||
do {
|
||||
csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh,
|
||||
(vaddr_t)&dma->dmacsr);
|
||||
APC_DMA_CSR);
|
||||
DPRINTF(("halt_input: csr=%s\n",
|
||||
bitmask_snprintf(csr, APC_BITS,
|
||||
bits, sizeof(bits))));
|
||||
@ -493,7 +488,6 @@ cs4231_sbus_intr(arg)
|
||||
{
|
||||
struct cs4231_sbus_softc *sbsc = arg;
|
||||
struct cs4231_softc *sc = &sbsc->sc_cs4231;
|
||||
volatile struct apc_dma *dma = NULL;
|
||||
u_int32_t csr;
|
||||
int status;
|
||||
bus_addr_t dmaaddr;
|
||||
@ -503,12 +497,12 @@ cs4231_sbus_intr(arg)
|
||||
char bits[128];
|
||||
#endif
|
||||
|
||||
csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr);
|
||||
csr = bus_space_read_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR);
|
||||
if ((csr & APC_INTR_MASK) == 0) /* any interrupt pedning? */
|
||||
return (0);
|
||||
|
||||
/* write back DMA status to clear interrupt */
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, (vaddr_t)&dma->dmacsr, csr);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh, APC_DMA_CSR, csr);
|
||||
++sc->sc_intrcnt.ev_count;
|
||||
served = 0;
|
||||
|
||||
@ -538,9 +532,9 @@ cs4231_sbus_intr(arg)
|
||||
|
||||
cs4231_transfer_advance(t, &dmaaddr, &dmasize);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh,
|
||||
(vaddr_t)&dma->dmacnva, dmaaddr);
|
||||
APC_DMA_CNVA, dmaaddr);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh,
|
||||
(vaddr_t)&dma->dmacnc, dmasize);
|
||||
APC_DMA_CNC, dmasize);
|
||||
|
||||
if (t->t_intr != NULL)
|
||||
(*t->t_intr)(t->t_arg);
|
||||
@ -561,9 +555,9 @@ cs4231_sbus_intr(arg)
|
||||
if (t->t_active) {
|
||||
cs4231_transfer_advance(t, &dmaaddr, &dmasize);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh,
|
||||
(vaddr_t)&dma->dmapnva, dmaaddr);
|
||||
APC_DMA_PNVA, dmaaddr);
|
||||
bus_space_write_4(sbsc->sc_bt, sbsc->sc_bh,
|
||||
(vaddr_t)&dma->dmapnc, dmasize);
|
||||
APC_DMA_PNC, dmasize);
|
||||
}
|
||||
|
||||
if (t->t_intr != NULL)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user