Make NetBSD/vax work again. Add support for __HAVE_FAST_SOFTINTS.

Add a few small optimizations.
This commit is contained in:
matt 2008-02-20 16:37:52 +00:00
parent f99dbc5c80
commit a027746fa0
13 changed files with 175 additions and 83 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.81 2008/02/03 08:31:09 matt Exp $ */
/* $NetBSD: cpu.h,v 1.82 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden
@ -139,6 +139,9 @@ struct cpu_info {
*/
int ci_want_resched; /* Should change process */
struct device *ci_dev; /* device struct for this cpu */
#if defined(__HAVE_FAST_SOFTINTS)
lwp_t *ci_softlwps[SOFTINT_COUNT];
#endif
#if defined(MULTIPROCESSOR)
struct pcb *ci_pcb; /* Idle PCB for this CPU */
vaddr_t ci_istack; /* Interrupt stack location */

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@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.26 2008/02/03 08:32:25 matt Exp $ */
/* $NetBSD: intr.h,v 1.27 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1998 Matt Thomas.
@ -39,14 +39,12 @@
/* Interrupt Priority Levels are not mutually exclusive. */
/* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
*/
/* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f) */
#define IPL_HIGH 0x1f /* high -- blocks all interrupts */
#define IPL_SCHED 0x18 /* clock */
#define IPL_VM 0x17 /* memory allocation */
/* Software interrupt levels are 0 (0x00) thru 15 (0x0f)
*/
/* Software interrupt levels are 0 (0x00) thru 15 (0x0f) */
#define IPL_SOFTDDB 0x0f /* used by DDB on VAX */
#define IPL_SOFTSERIAL 0x0d /* soft serial */
#define IPL_SOFTNET 0x0c /* soft network */
@ -54,14 +52,11 @@
#define IPL_SOFTCLOCK 0x08
#define IPL_NONE 0x00
/* vax weirdness
*/
/* vax weirdness */
#define IPL_UBA IPL_VM /* unibus adapters */
#define IPL_CONSMEDIA IPL_VM /* console media */
/* Misc
*/
/* Misc */
#define IPL_LEVELS 32
#define IST_UNUSABLE -1 /* interrupt cannot be used */
@ -117,53 +112,30 @@ splraiseipl(ipl_cookie_t icookie)
return oldipl;
}
#define _setsirr(reg) mtpr((reg), PR_SIRR)
#define spl0() _splset(IPL_NONE) /* IPL00 */
#define splddb() splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
#define splconsmedia() splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL14 */
#define splconsmedia() splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL17 */
#include <sys/spl.h>
/* These are better to use when playing with VAX buses */
#define spluba() splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
#define spl4() splx(0x14)
#define spl5() splx(0x15)
#define spl6() splx(0x16)
#define spl7() splx(0x17)
#define spl7() splvm()
/* schedule software interrupts
*/
#define setsoftddb() _setsirr(IPL_SOFTDDB)
#define setsoftserial() _setsirr(IPL_SOFTSERIAL)
#define setsoftnet() _setsirr(IPL_SOFTNET)
#define setsoftddb() ((void)mtpr(IPL_SOFTDDB, PR_SIRR))
#if !defined(_LOCORE)
LIST_HEAD(sh_head, softintr_handler);
struct softintr_head {
int shd_ipl;
struct sh_head shd_intrs;
};
struct softintr_handler {
struct softintr_head *sh_head;
LIST_ENTRY(softintr_handler) sh_link;
void (*sh_func)(void *);
void *sh_arg;
int sh_pending;
};
extern void *softintr_establish(int, void (*)(void *), void *);
extern void softintr_disestablish(void *);
static __inline void
softintr_schedule(void *arg)
#if defined(__HAVE_FAST_SOFTINTS)
static inline void
softint_trigger(uintptr_t machdep)
{
struct softintr_handler * const sh = arg;
sh->sh_pending = 1;
_setsirr(sh->sh_head->shd_ipl);
mtpr(machdep, PR_SIRR);
}
#endif /* _LOCORE */
#endif /* __HAVE_FAST_SOFTINTS */
#endif /* !_LOCORE */
#endif /* _KERNEL */
#endif /* _VAX_INTR_H */

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@ -1,4 +1,4 @@
/* $NetBSD: pcb.h,v 1.10 1996/02/02 18:08:26 mycroft Exp $ */
/* $NetBSD: pcb.h,v 1.11 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -58,6 +58,7 @@ struct pcb {
/* Software registers, only used by kernel software */
void *framep; /* Pointer to syscall frame */
void *iftrap; /* Tells whether fault copy */
paddr_t pcb_paddr; /* physical address of PCB */
};
#define AST_MASK 0x07000000

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@ -1,4 +1,4 @@
/* $NetBSD: scb.h,v 1.11 2000/07/10 09:14:34 ragge Exp $ */
/* $NetBSD: scb.h,v 1.12 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -131,10 +131,10 @@ extern struct scb *scb;
extern struct ivec_dsp *scb_vec;
extern struct evcnt devipl_intrcnts[4]; /* IPL 2[0123] */
extern paddr_t scb_init (paddr_t);
extern int scb_vecref (int *, int *);
extern void scb_fake (int, int);
extern void scb_vecalloc (int, void(*)(void *), void *, int, struct evcnt *);
paddr_t scb_init (paddr_t);
int scb_vecref (int *, int *);
void scb_fake (int, int);
void scb_vecalloc (int, void(*)(void *), void *, int, struct evcnt *);
#endif /* _KERNEL */
#endif /* _VAX_SCB_H */

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@ -1,4 +1,4 @@
/* $NetBSD: types.h,v 1.38 2008/01/20 18:09:10 joerg Exp $ */
/* $NetBSD: types.h,v 1.39 2008/02/20 16:37:52 matt Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
@ -67,5 +67,6 @@ typedef volatile char __cpu_simple_lock_t;
#define __HAVE_DEVICE_REGISTER
#define __HAVE_SYSCALL_INTERN
#define __HAVE_FAST_SOFTINTS
#endif /* _MACHTYPES_H_ */

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@ -1,4 +1,4 @@
/* $NetBSD: crx.c,v 1.11 2007/03/04 06:00:58 christos Exp $ */
/* $NetBSD: crx.c,v 1.12 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: crx.c,v 1.11 2007/03/04 06:00:58 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: crx.c,v 1.12 2008/02/20 16:37:52 matt Exp $");
#include <sys/param.h>
#include <sys/time.h>
@ -158,7 +158,7 @@ crxrw(dev, uio, flags)
rs = &rx50state;
/* lock out others */
i = spl4();
i = splvm();
while (rs->rs_flags & RS_BUSY) {
rs->rs_flags |= RS_WANT;
(void) tsleep(&rx50state, PRIBIO, "crxbusy", 0);
@ -206,7 +206,7 @@ crxrw(dev, uio, flags)
#endif
rxaddr->rxgo = 0; /* start it up */
ka820port_ptr->csr |= KA820PORT_RXIRQ;
i = spl4();
i = splvm();
while ((rs->rs_flags & RS_DONE) == 0) {
#if CRXDEBUG
printf("crx: sleeping on I/O\n");

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@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.38 2008/02/13 18:41:35 matt Exp $
# $NetBSD: genassym.cf,v 1.39 2008/02/20 16:37:52 matt Exp $
#
# Copyright (c) 1997 Ludd, University of Lule}, Sweden.
# All rights reserved.
@ -54,6 +54,7 @@ define L_ADDR offsetof(struct lwp, l_addr)
define L_CPU offsetof(struct lwp, l_cpu)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)
define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define P_VMSPACE offsetof(struct proc, p_vmspace)
define P_MD_SYSCALL offsetof(struct proc, p_md.md_syscall)
@ -65,7 +66,19 @@ define P1LR offsetof(struct pcb, P1LR)
define IFTRAP offsetof(struct pcb, iftrap)
define ESP offsetof(struct pcb, ESP)
define SSP offsetof(struct pcb, SSP)
define KSP offsetof(struct pcb, KSP)
define PCB_R0 offsetof(struct pcb, R[0])
define PCB_R6 offsetof(struct pcb, R[6])
define PCB_R7 offsetof(struct pcb, R[7])
define PCB_FP offsetof(struct pcb, FP)
define PCB_PC offsetof(struct pcb, PC)
define PCB_PSL offsetof(struct pcb, PSL)
define PCB_PADDR offsetof(struct pcb, pcb_paddr)
define SOFTINT_CLOCK SOFTINT_CLOCK
define SOFTINT_BIO SOFTINT_BIO
define SOFTINT_NET SOFTINT_NET
define SOFTINT_SERIAL SOFTINT_SERIAL
define MCHK offsetof(struct cpu_dep, cpu_mchk)
define MEMERR offsetof(struct cpu_dep, cpu_memerr)
@ -81,6 +94,7 @@ define UVME_SOFTS offsetof(struct uvmexp, softs)
define CI_CURLWP offsetof(struct cpu_info, ci_curlwp)
define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
define CI_MTX_OLDSPL offsetof(struct cpu_info, ci_mtx_oldspl)
define CI_SOFTLWPS offsetof(struct cpu_info, ci_softlwps)
# mtpr register numbers
define PR_KSP PR_KSP

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@ -1,4 +1,4 @@
/* $NetBSD: intvec.S,v 1.14 2008/01/31 03:30:36 christos Exp $ */
/* $NetBSD: intvec.S,v 1.15 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994, 1997 Ludd, University of Lule}, Sweden.
@ -35,8 +35,6 @@
#include <sys/cdefs.h>
#include <net/netisr.h>
#define __HAVE_GENERIC_SOFT_INTERRUPTS /* XXX - cannot include types.h! */
#include "opt_ddb.h"
#include "opt_cputype.h"
#include "opt_emulate.h"
@ -130,12 +128,12 @@ _C_LABEL(rpb):
NOVEC; # Unused, 94
NOVEC; # Unused, 98
NOVEC; # Unused, 9C
NOVEC; # Unused, A0
INTVEC(softclock, KSTACK); # Software clock interupt, A0 (IPL 08)
NOVEC; # Unused, A4 (IPL 09)
NOVEC; # Unused, A8 (IPL 10)
NOVEC; # Unused, AC (IPL 11)
NOVEC; # Unused, B0
NOVEC; # Unused, B4
INTVEC(softbio, KSTACK); # Software bio interrupt, AC (IPL 11)
INTVEC(softnet, KSTACK); # Software net interrupt, B0 (IPL 12)
INTVEC(softserial, KSTACK); # Software serial interrupt, B4 (IPL 13)
NOVEC; # Unused, B8 (IPL 14)
INTVEC(ddbtrap, ISTACK) # Kernel debugger trap, BC (IPL 15)
INTVEC(hardclock,ISTACK) # Interval Timer

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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.160 2008/02/03 08:36:41 matt Exp $ */
/* $NetBSD: machdep.c,v 1.161 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
@ -83,7 +83,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.160 2008/02/03 08:36:41 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.161 2008/02/20 16:37:52 matt Exp $");
#include "opt_ddb.h"
#include "opt_compat_netbsd.h"
@ -610,6 +610,26 @@ vax_unmap_physmem(addr, size)
"can't free region\n", addr, size);
}
#define SOFTINT_IPLS ((IPL_SOFTCLOCK << (SOFTINT_CLOCK * 5)) \
| (IPL_SOFTBIO << (SOFTINT_BIO * 5)) \
| (IPL_SOFTNET << (SOFTINT_NET * 5)) \
| (IPL_SOFTSERIAL << (SOFTINT_SERIAL * 5)))
extern const char softint_process[];
void
softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep)
{
const int ipl = (SOFTINT_IPLS >> (5 * level)) & 0x1F;
l->l_cpu->ci_softlwps[level] = l;
*machdep = ipl;
#ifdef MULTIPROCESSOR
l->l_addr->u_pcb.SSP = (uintptr_t)l->l_cpu;
#endif
}
#include <dev/bi/bivar.h>
/*
* This should be somewhere else.

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@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.154 2008/02/19 22:18:03 matt Exp $ */
/* $NetBSD: pmap.c,v 1.155 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994, 1998, 1999, 2003 Ludd, University of Lule}, Sweden.
* All rights reserved.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.154 2008/02/19 22:18:03 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.155 2008/02/20 16:37:52 matt Exp $");
#include "opt_ddb.h"
#include "opt_cputype.h"
@ -254,6 +254,7 @@ calc_kvmsize(vsize_t usrptsize)
#ifndef PIPE_SOCKETPAIR
kvmsize += PIPE_DIRECT_CHUNK*10;
#endif
kvmsize = (kvmsize + PAGE_SIZE + 1) & ~(PAGE_SIZE - 1);
return kvmsize;
}

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@ -1,4 +1,4 @@
/* $NetBSD: subr.S,v 1.20 2008/02/05 00:04:24 matt Exp $ */
/* $NetBSD: subr.S,v 1.21 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -47,6 +47,11 @@
#endif
#define JSBENTRY(x) .globl x ; .align 2 ; x :
#define SCBENTRY(name) \
.text ; \
.align 2 ; \
.globl __CONCAT(X,name) ; \
__CONCAT(X,name):
.text
@ -123,8 +128,9 @@ to: movw $0xfff,_C_LABEL(panic) # Save all regs in panic
addl3 $USPACE,_C_LABEL(proc0paddr),%r0 # Get kernel stack top
mtpr %r0,$PR_KSP # put in IPR KSP
movl %r0,_C_LABEL(Sysmap) # SPT start addr after KSP
movl _C_LABEL(proc0paddr),%r0 # get PCB virtual address
movab IFTRAP(%r0),4(%r0) # Save trap address in ESP
movl _C_LABEL(proc0paddr),%r0 # get PCB virtual address
mfpr $PR_PCBB,PCB_PADDR(%r0) # save PCB physical address
movab IFTRAP(%r0),ESP(%r0) # Save trap address in ESP
mtpr 4(%r0),$PR_ESP # Put it in ESP also
# Set some registers in known state
@ -304,6 +310,80 @@ _C_LABEL(vax_mp_tramp):
rei
#endif
.globl softint_cleaup,softint_exit,softint_process
softint_cleanup:
mfpr $PR_SSP,%r1 /* get cpu_info */
incl CI_MTX_COUNT(%r1) /* increment mutex count */
clrl L_CTXSWTCH(%r0) /* clear l_ctxswtch of old lwp */
softint_exit:
popr $0x3 /* restore r0 and r1 */
rei /* return from interrupt */
softint_process:
/*
* R6 contains pinned LWP
* R7 contains ipl to dispatch with
*/
movq %r6,-(%sp) /* push old lwp and ipl onto stack */
calls $2,_C_LABEL(softint_dispatch) /* dispatch it */
/* We can use any register because ldpctx will overwrite them */
mfpr $PR_SSP,%r8 /* get cpu_info */
movl %r6,CI_CURLWP(%r8) /* update ci_curlwp */
movl L_ADDR(%r6),%r3 /* Get pointer to new pcb. */
movab softint_exit,PCB_PC(%r3)/* do a quick exit */
#if 0
movl KSP(%r3),%r0 /* get pinned lwp's KSP */
movq (%r0)+,PCB_PC(%r3) /* return to real PC & PSL */
movq (%r0)+,PCB_R0(%r3) /* restore saved r0 and r1 */
movl %r0,KSP(%r3) /* restore pinned KSP */
#endif
mtpr PCB_PADDR(%r3),$PR_PCBB /* restore PA of interrupted pcb */
ldpctx
rei
softint_common:
mfpr $PR_IPL,%r1
mtpr $IPL_HIGH,$PR_IPL /* we need to be at IPL_HIGH */
movpsl -(%sp) /* add cleanup hook */
pushab softint_cleanup
svpctx
/* We can use any register because ldpctx will overwrite them */
mfpr $PR_SSP,%r8 /* Get curcpu */
movl CI_SOFTLWPS(%r8)[%r0],%r2 /* get softlwp to switch to */
movl L_ADDR(%r2),%r3 /* Get pointer to its pcb. */
movl CI_CURLWP(%r8),PCB_R6(%r3) /* move old lwp into new pcb */
movl %r1,PCB_R7(%r3) /* move IPL into new pcb */
movab softint_process,PCB_PC(%r3) /* where we want to start running */
movl %r2,CI_CURLWP(%r8) /* update ci_curlwp */
mtpr PCB_PADDR(%r3),$PR_PCBB /* set PA of new pcb */
ldpctx /* load it */
rei /* get off interrupt stack */
SCBENTRY(softclock)
pushr $0x3 /* save r0 and r1 */
movl $SOFTINT_CLOCK,%r0
brb softint_common
SCBENTRY(softbio)
pushr $0x3 /* save r0 and r1 */
movl $SOFTINT_BIO,%r0
brb softint_common
SCBENTRY(softnet)
pushr $0x3 /* save r0 and r1 */
movl $SOFTINT_NET,%r0
brb softint_common
SCBENTRY(softserial)
pushr $0x3 /* save r0 and r1 */
movl $SOFTINT_SERIAL,%r0
brb softint_common
/*
* Helper routine for cpu_lwp_fork. It get invoked by Swtchto.
* It let's the kernel know the lwp is alive and then calls func(arg)
@ -331,15 +411,12 @@ JSBENTRY(Swtchto)
movl %r1,CI_CURLWP(%r4) # update ci_curlwp
movl L_ADDR(%r1),%r3 # Get pointer to new pcb.
movl %r0,PCB_R0(%r3) # move r0 into new pcb (return value)
#ifdef MULTIPROCESSOR
movl %r4,SSP(%r3) # Put curcpu into new PCB
addl3 %r3,$IFTRAP,%r4 # Save for copy* functions.
mtpr %r4,$PR_ESP # Use ESP as CPU-specific pointer
movl %r4,ESP(%r3) # Must save in PCB also.
#endif
extzv $9,$21,%r3,%r1 # extract offset of PCB
ashl $9,*_C_LABEL(Sysmap)[%r1],%r4
mtpr %r4,$PR_PCBB # set PA of new pcb
mtpr PCB_PADDR(%r3),$PR_PCBB # set PA of new pcb
mtpr $IPL_HIGH,$PR_IPL /* we need to be at IPL_HIGH */
ldpctx # load it
/* r0 already has previous lwp */
/* r1 already has this lwp */

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@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.110 2007/10/17 19:58:00 garbled Exp $ */
/* $NetBSD: trap.c,v 1.111 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -33,7 +33,7 @@
/* All bugs are subject to removal without further notice */
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.110 2007/10/17 19:58:00 garbled Exp $");
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.111 2008/02/20 16:37:52 matt Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@ -143,13 +143,13 @@ fram:
#ifdef DDB
kdb_trap(frame);
#endif
printf("Trap: type %x, code %x, pc %x, psl %x\n",
panic("trap: type %x, code %x, pc %x, psl %x",
(u_int)frame->trap, (u_int)frame->code,
(u_int)frame->pc, (u_int)frame->psl);
panic("trap");
case T_KSPNOTVAL:
panic("kernel stack invalid");
panic("kernel stack invalid %#x@%#x psl %#x)",
mfpr(PR_KSP), (u_int)frame->pc, (u_int)frame->psl);
case T_TRANSFLT|T_USER:
case T_TRANSFLT:

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@ -1,4 +1,4 @@
/* $NetBSD: vm_machdep.c,v 1.99 2007/12/22 08:59:02 dsl Exp $ */
/* $NetBSD: vm_machdep.c,v 1.100 2008/02/20 16:37:52 matt Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.99 2007/12/22 08:59:02 dsl Exp $");
__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.100 2008/02/20 16:37:52 matt Exp $");
#include "opt_compat_ultrix.h"
#include "opt_multiprocessor.h"
@ -147,10 +147,15 @@ cpu_lwp_fork(struct lwp *l1, struct lwp *l2, void *stack, size_t stacksize,
pcb->FP = (uintptr_t)cf;
pcb->PC = (uintptr_t)cpu_lwp_bootstrap + 2;
pcb->PSL = PSL_HIGHIPL;
pcb->ESP = (uintptr_t)&pcb->iftrap;
#ifndef MULTIPROCESSOR
pcb->SSP = (uintptr_t)curcpu();
#endif
/* pcb->R[0] (oldlwp) set by Swtchto */
pcb->R[1] = (uintptr_t)l2;
pcb->R[2] = (uintptr_t)func;
pcb->R[3] = (uintptr_t)arg;
pcb->pcb_paddr = kvtophys(pcb);
/*
* If specified, give the child a different stack.