Switch on branch prediction on the 68060. Also add some instrumentation
for branch prediction errors (could be used to detect strange binaries), integer instruction, FP instruction, FP data type and FP effective address emulations. The latter can be used to diagnose binaries which should be recompiled with -m68060. XXX Maybe these diagnostics should be switchable by sysctl or XXX options DIAGNOSTIC.
This commit is contained in:
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parent
1999f88fac
commit
9df370b3f3
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@ -1,4 +1,4 @@
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/* $NetBSD: genassym.c,v 1.28 1996/10/14 03:04:32 mhitch Exp $ */
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/* $NetBSD: genassym.c,v 1.29 1996/12/17 07:32:55 is Exp $ */
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/*
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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@ -132,6 +132,10 @@ main()
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printf("#define\tDC_CLEAR %d\n", DC_CLEAR);
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printf("#define\tCACHE40_ON %d\n", CACHE40_ON);
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printf("#define\tCACHE40_OFF %d\n", CACHE40_OFF);
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printf("#define\tCACHE60_ON %d\n", CACHE60_ON);
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printf("#define\tCACHE60_OFF %d\n", CACHE60_OFF);
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printf("#define\tIC60_CUBC %d\n", IC60_CUBC);
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printf("#define\tIC60_CABC %d\n", IC60_CABC);
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printf("#define\tPG_V %d\n", PG_V);
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printf("#define\tPG_NV %d\n", PG_NV);
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printf("#define\tPG_RO %d\n", PG_RO);
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.70 1996/11/26 15:54:23 is Exp $ */
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/* $NetBSD: locore.s,v 1.71 1996/12/17 07:32:52 is Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -126,10 +126,11 @@ _addrerr:
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btst #2,d0 | branch prediction error?
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jeq Lnobpe
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movc cacr,d2
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orl #0x00400000,d2 | clear all branch cache entries
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orl #IC60_CABC,d2 | clear all branch cache entries
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movc d2,cacr
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movl d0,d1
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andl #0x7ffd,d1
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addql #1,L60bpe
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jeq Lbpedone
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Lnobpe:
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movl d0,sp@ | code is FSLW now.
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@ -958,7 +959,7 @@ Lsetcpu040:
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movl #CACHE40_OFF,d0 | 68040 cache disable
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btst #7,sp@(3) | XXX
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jeq Lstartnot040
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orl #0x400000,d0 | XXX and clear all 060 branch cache
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orl #IC60_CABC,d0 | XXX and clear all 060 branch cache
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Lstartnot040:
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movc d0,cacr | clear and disable on-chip cache(s)
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movl #Lvectab,a0
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@ -1005,6 +1006,11 @@ Lunshadow:
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| is this needed? MLH
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.word 0xf4f8 | cpusha bc - push & invalidate caches
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movl #CACHE40_ON,d0
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#ifdef M68060
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btst #7,_machineid+3
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jeq Lcacheon
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movl #CACHE60_ON,d0
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#endif
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Lcacheon:
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movc d0,cacr | clear cache(s)
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/* final setup for C code */
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@ -1047,7 +1053,7 @@ Lcacheon:
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btst #7,_machineid+3
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jeq Lnoflush
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movc cacr,d0
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orl #200000,d0
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orl #IC60_CUBC,d0
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movc d0,cacr
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Lnoflush:
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movl sp@(FR_SP),a0 | grab and load
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@ -1488,7 +1494,7 @@ Lres2:
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btst #7,_machineid+3
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jeq Lres3
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movc cacr,d2
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orl #0x00200000,d2 | clear user branch cache entries
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orl #IC60_CUBC,d2 | clear user branch cache entries
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movc d2,cacr
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#endif
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Lres3:
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@ -1687,7 +1693,7 @@ Ltbia040:
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btst #7,_machineid+3
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jeq Ltbiano60
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movc cacr,d0
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orl #0x400000,d0 | and clear all branch cache entries
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orl #IC60_CABC,d0 | and clear all branch cache entries
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movc d0,cacr
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#endif
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Ltbiano60:
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@ -1724,7 +1730,7 @@ Ltbis040:
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btst #7,_machineid+3
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jeq Ltbisno60
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movc cacr,d0
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orl #0x400000,d0 | and clear all branch cache entries
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orl #IC60_CABC,d0 | and clear all branch cache entries
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movc d0,cacr
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Ltbisno60:
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#endif
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@ -1756,7 +1762,7 @@ Ltbias040:
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btst #7,_machineid+3
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jeq Ltbiasno60
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movc cacr,d0
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orl #0x400000,d0 | and clear all branch cache entries
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orl #IC60_CABC,d0 | and clear all branch cache entries
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movc d0,cacr
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Ltbiasno60:
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#endif
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@ -1788,7 +1794,7 @@ Ltbiau040:
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btst #7,_machineid+3
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jeq Ltbiauno60
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movc cacr,d0
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orl #0x200000,d0 | but only user branch cache entries
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orl #IC60_CUBC,d0 | but only user branch cache entries
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movc d0,cacr
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Ltbiauno60:
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#endif
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@ -1966,7 +1972,7 @@ ENTRY(loadustp)
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#ifdef M68060
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Lldustp060:
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movc cacr,d1
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orl #0x200000,d1 | clear user branch cache entries
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orl #IC60_CUBC,d1 | clear user branch cache entries
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movc d1,cacr
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#endif
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Lldustp040:
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@ -1997,7 +2003,7 @@ Lnot68851:
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#ifdef M68060
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Lflustp060:
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movc cacr,d1
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orl #0x200000,d1 | clear user branch cache entries
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orl #IC60_CUBC,d1 | clear user branch cache entries
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movc d1,cacr
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rts
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#endif
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@ -2321,6 +2327,22 @@ Ldelay: | longword aligned again.
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jcc Ldelay
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rts
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#ifdef M68060
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.globl _intemu60, _fpiemu60, _fpdemu60, _fpeaemu60
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_intemu60:
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addql #1,L60iem
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jra _I_CALL_TOP+128+0x00
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_fpiemu60:
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addql #1,L60fpiem
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jra _FP_CALL_TOP+128+0x30
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_fpdemu60:
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addql #1,L60fpdem
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jra _I_CALL_TOP+128+0x38
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_fpeaemu60:
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addql #1,L60fpeaem
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jra _I_CALL_TOP+128+0x40
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#endif
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.data
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.space NBPG
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tmpstk:
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@ -2375,6 +2397,13 @@ _intrnames:
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.asciz "lcl/zbus" | 6: lcl/zorro lev6
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.asciz "buserr" | 7: nmi: bus timeout
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#endif
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#ifdef M68060
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.asciz "60intemu"
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.asciz "60fpiemu"
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.asciz "60fpdemu"
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.asciz "60fpeaemu"
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.asciz "60bpe"
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#endif
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_eintrnames:
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.align 2
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_intrcnt:
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@ -2383,4 +2412,11 @@ _intrcnt:
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Drintrcnt:
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.long 0,0,0,0,0,0,0
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#endif
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#ifdef M68060
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L60iem: .long 0
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L60fpiem: .long 0
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L60fpdem: .long 0
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L60fpeaem: .long 0
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L60bpe: .long 0
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#endif
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_eintrcnt:
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.81 1996/11/30 00:29:38 is Exp $ */
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/* $NetBSD: machdep.c,v 1.82 1996/12/17 07:32:54 is Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -1210,7 +1210,8 @@ initcpu()
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#ifdef M68060
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#if defined(M060SP)
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extern u_int8_t I_CALL_TOP[];
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/*extern u_int8_t I_CALL_TOP[];*/
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extern u_int8_t intemu60, fpiemu60, fpdemu60, fpeaemu60;
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extern u_int8_t FP_CALL_TOP[];
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#else
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extern u_int8_t illinst;
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@ -1230,17 +1231,17 @@ initcpu()
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#if defined(M060SP)
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/* integer support */
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vectab[61] = &I_CALL_TOP[128 + 0x00];
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vectab[61] = &intemu60/*&I_CALL_TOP[128 + 0x00]*/;
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/* floating point support */
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/*
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* XXX maybe we really should run-time check for the
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* stack frame format here:
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*/
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vectab[11] = &FP_CALL_TOP[128 + 0x30];
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vectab[11] = &fpiemu60/*&FP_CALL_TOP[128 + 0x30]*/;
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vectab[55] = &FP_CALL_TOP[128 + 0x38];
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vectab[60] = &FP_CALL_TOP[128 + 0x40];
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vectab[55] = &fpdemu60/*&FP_CALL_TOP[128 + 0x38]*/;
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vectab[60] = &fpeaemu60/*&FP_CALL_TOP[128 + 0x40]*/;
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vectab[54] = &FP_CALL_TOP[128 + 0x00];
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vectab[52] = &FP_CALL_TOP[128 + 0x08];
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