Driver for GPIB controllers boards based on the uPD7210 GPIB controller,
including boards made by Captial Equipment Corp.
This commit is contained in:
gmcgarry
parent
59720b5acd
commit
9d6ae676dd
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@ -0,0 +1,712 @@
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/* $NetBSD: cec.c,v 1.1 2003/06/02 03:57:15 gmcgarry Exp $ */
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/*-
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* Copyright (c) 2003 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gregory McGarry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cec.c,v 1.1 2003/06/02 03:57:15 gmcgarry Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/callout.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <machine/bus.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/gpib/gpibvar.h>
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#include <dev/ic/nec7210reg.h>
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#define DEBUG
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#ifdef DEBUG
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int cecdebug = 0x1f;
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#define DPRINTF(flag, str) if (cecdebug & (flag)) printf str
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#define DBG_FOLLOW 0x01
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#define DBG_CONFIG 0x02
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#define DBG_INTR 0x04
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#define DBG_REPORTTIME 0x08
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#define DBG_FAIL 0x10
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#define DBG_WAIT 0x20
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#else
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#define DPRINTF(flag, str) /* nothing */
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#endif
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#define CEC_IOSIZE 8
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struct cec_softc {
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struct device sc_dev; /* generic device glue */
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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isa_chipset_tag_t sc_ic;
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int sc_drq;
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void *sc_ih;
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int sc_myaddr; /* my address */
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struct gpib_softc *sc_gpib;
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volatile int sc_flags;
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#define CECF_IO 0x1
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#define CECF_PPOLL 0x4
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#define CECF_READ 0x8
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#define CECF_TIMO 0x10
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#define CECF_USEDMA 0x20
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int sc_ppoll_slave; /* XXX stash our ppoll address */
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struct callout sc_timeout_ch;
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};
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int cecprobe(struct device *, struct cfdata *, void *);
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void cecattach(struct device *, struct device *, void *);
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CFATTACH_DECL(cec, sizeof(struct cec_softc),
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cecprobe, cecattach, NULL, NULL);
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void cecreset(void *);
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int cecpptest(void *, int);
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void cecppwatch(void *, int);
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void cecppclear(void *);
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void cecxfer(void *, int, int, void *, int, int, int);
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void cecgo(void *v);
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int cecintr(void *);
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int cecsendcmds(void *, void *, int);
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int cecsenddata(void *, void *, int);
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int cecrecvdata(void *, void *, int);
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int cecgts(void *);
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int cectc(void *, int);
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void cecifc(void *);
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static int cecwait(struct cec_softc *, int, int);
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static void cectimeout(void *v);
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static int nec7210_setaddress(struct cec_softc *, int, int);
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static void nec7210_init(struct cec_softc *);
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static void nec7210_ifc(struct cec_softc *);
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/*
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* Our chipset structure.
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*/
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struct gpib_chipset_tag cec_ic = {
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cecreset,
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NULL,
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NULL,
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cecpptest,
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cecppwatch,
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cecppclear,
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cecxfer,
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cectc,
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cecgts,
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cecifc,
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cecsendcmds,
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cecsenddata,
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cecrecvdata
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};
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int cecwtimeout = 0x10000;
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int cecdmathresh = 3;
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int
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cecprobe(struct device *parent, struct cfdata *match, void *aux)
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{
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struct isa_attach_args *ia = aux;
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bus_space_tag_t iot = ia->ia_iot;
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bus_space_handle_t ioh;
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DPRINTF(DBG_CONFIG, ("cecprobe: called\n"));
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if (ia->ia_nio < 1)
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return (0);
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if (ia->ia_nirq < 1)
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return (0);
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if (ia->ia_ndrq < 1)
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return (0);
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if (ISA_DIRECT_CONFIG(ia))
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return (0);
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if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
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return (0);
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if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISACF_DRQ_DEFAULT)
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ia->ia_ndrq = 0;
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if (bus_space_map(iot, ia->ia_io[0].ir_addr, CEC_IOSIZE, 0, &ioh))
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return (0);
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/* XXX insert probe here */
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ia->ia_io[0].ir_size = CEC_IOSIZE;
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ia->ia_niomem = 0;
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bus_space_unmap(iot, ioh, CEC_IOSIZE);
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return (1);
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}
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void
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cecattach(struct device *parent, struct device *self, void *aux)
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{
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struct cec_softc *sc = (struct cec_softc *)self;
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struct isa_attach_args *ia = aux;
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struct gpibdev_attach_args ga;
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bus_size_t maxsize;
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printf("\n");
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DPRINTF(DBG_CONFIG, ("cecattach: called\n"));
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sc->sc_iot = ia->ia_iot;
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sc->sc_ic = ia->ia_ic;
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if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr, CEC_IOSIZE,
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0, &sc->sc_ioh) != 0) {
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printf("%s: unable to map I/O space\n", sc->sc_dev.dv_xname);
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return;
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}
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if (ia->ia_ndrq > 0) {
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sc->sc_flags |= CECF_USEDMA;
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sc->sc_drq = ia->ia_drq[0].ir_drq;
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(void) isa_drq_alloc(sc->sc_ic, sc->sc_drq);
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maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq);
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if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
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maxsize, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW)) {
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printf("%s: unable to create map for drq %d\n",
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sc->sc_dev.dv_xname, sc->sc_drq);
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sc->sc_flags &= ~CECF_USEDMA;
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}
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}
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sc->sc_myaddr = 15; /* XXX */
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cecreset(sc);
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(void) nec7210_setaddress(sc, sc->sc_myaddr, -1);
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sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq,
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IST_EDGE, IPL_BIO, cecintr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt\n",
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sc->sc_dev.dv_xname);
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return;
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}
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callout_init(&sc->sc_timeout_ch);
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/* attach MI GPIB bus */
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cec_ic.cookie = (void *)sc;
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ga.ga_ic = &cec_ic;
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ga.ga_address = sc->sc_myaddr;
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sc->sc_gpib =
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(struct gpib_softc *)config_found(self, &ga, gpibdevprint);
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}
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int
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cecintr(void *v)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int8_t stat1, stat2;
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stat1 = bus_space_read_1(iot, ioh, NEC7210_ISR1);
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stat2 = bus_space_read_1(iot, ioh, NEC7210_ISR2);
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DPRINTF(DBG_INTR, ("cecintr: sc=%p stat1=0x%x stat2=0x%x\n",
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sc, stat1, stat2));
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if (sc->sc_flags & CECF_IO) {
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if (sc->sc_flags & CECF_TIMO)
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callout_stop(&sc->sc_timeout_ch);
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bus_space_write_1(iot, ioh, NEC7210_IMR1, 0);
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bus_space_write_1(iot, ioh, NEC7210_IMR2, 0);
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_TCA);
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sc->sc_flags &= ~(CECF_IO | CECF_READ | CECF_TIMO);
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if (sc->sc_flags & CECF_USEDMA)
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isa_dmadone(sc->sc_ic, sc->sc_drq);
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gpibintr(sc->sc_gpib);
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} else if (sc->sc_flags & CECF_PPOLL) {
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if (cecpptest(sc, sc->sc_ppoll_slave)) {
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sc->sc_flags &= ~CECF_PPOLL;
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bus_space_write_1(iot, ioh, NEC7210_IMR2, 0);
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gpibintr(sc->sc_gpib);
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}
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}
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return (1);
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}
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void
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cecreset(void *v)
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{
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struct cec_softc *sc = v;
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u_int8_t cmd;
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DPRINTF(DBG_FOLLOW, ("cecreset: sc=%p\n", sc));
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nec7210_init(sc);
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nec7210_ifc(sc);
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/* we're now the system controller */
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/* XXX should be pushed higher */
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/* universal device clear */
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cmd = GPIBCMD_DCL;
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(void) cecsendcmds(sc, &cmd, 1);
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/* delay for devices to clear */
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DELAY(100000);
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}
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int
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cecsendcmds(void *v, void *ptr, int origcnt)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int cnt = origcnt;
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u_int8_t *addr = ptr;
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DPRINTF(DBG_FOLLOW, ("cecsendcmds: sc=%p, ptr=%p cnt=%d\n",
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sc, ptr, origcnt));
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while (--cnt >= 0) {
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bus_space_write_1(iot, ioh, NEC7210_CDOR, *addr++);
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if (cecwait(sc, 0, ISR2_CO))
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return (origcnt - cnt - 1);
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}
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return (origcnt);
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}
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int
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cecrecvdata(void *v, void *ptr, int origcnt)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int cnt = origcnt;
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u_int8_t *addr = ptr;
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DPRINTF(DBG_FOLLOW, ("cecrecvdata: sc=%p, ptr=%p cnt=%d\n",
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sc, ptr, origcnt));
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/* XXX holdoff on end */
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, NEC7210_AUXMR, AUXCMD_RHDF);
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if (cnt) {
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while (--cnt >= 0) {
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if (cecwait(sc, ISR1_DI, 0))
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return (origcnt - cnt - 1);
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*addr++ = bus_space_read_1(iot, ioh, NEC7210_DIR);
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}
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}
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return (origcnt);
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}
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int
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cecsenddata(void *v, void *ptr, int origcnt)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int cnt = origcnt;
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u_int8_t *addr = ptr;
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DPRINTF(DBG_FOLLOW, ("cecdsenddata: sc=%p, ptr=%p cnt=%d\n",
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sc, ptr, origcnt));
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if (cnt) {
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while (--cnt > 0) {
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bus_space_write_1(iot, ioh, NEC7210_CDOR, *addr++);
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if (cecwait(sc, ISR1_DO, 0))
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return (origcnt - cnt - 1);
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}
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_SEOI);
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bus_space_write_1(iot, ioh, NEC7210_CDOR, *addr);
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(void) cecwait(sc, ISR1_DO, 0);
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}
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return (origcnt);
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}
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int
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cectc(void *v, int sync)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int8_t adsr;
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int timo = cecwtimeout;
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DPRINTF(DBG_FOLLOW, ("cectc: sc=%p, sync=%d\n", sc, sync));
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adsr = bus_space_read_1(iot, ioh, NEC7210_ADSR);
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#if 0
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if ((adsr & (ADSR_CIC | ADSR_NATN)) == ADSR_CIC) {
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DPRINTF(0xff, ("cectc: already CIC\n"));
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return (0);
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}
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#endif
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if (sync) {
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_RHDF);
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_TCS);
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} else {
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_TCA);
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}
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/* wait until ATN is asserted */
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for (;;) {
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adsr = bus_space_read_1(iot, ioh, NEC7210_ADSR);
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if (--timo == 0) {
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DPRINTF(DBG_REPORTTIME, ("cectc: timeout\n"));
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return (1);
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}
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if ((adsr & ADSR_NATN) == 0)
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break;
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DELAY(1);
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}
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return (0);
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}
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int
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cecgts(void *v)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int8_t adsr;
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int timo = cecwtimeout;
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DPRINTF(DBG_FOLLOW, ("cecgts: sc=%p\n", sc));
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adsr = bus_space_read_1(iot, ioh, NEC7210_ADSR);
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#if 0
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if ((adsr & (ADSR_CIC | ADSR_NATN)) == ADSR_NATN) {
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DPRINTF(0xff, ("cecgts: already standby\n"));
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return (0);
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}
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#endif
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bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_GTS);
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/* wait unit ATN is released */
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for (;;) {
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adsr = bus_space_read_1(iot, ioh, NEC7210_ADSR);
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if (--timo == 0) {
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DPRINTF(DBG_REPORTTIME, ("cecgts: timeout\n"));
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return (1);
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}
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if ((adsr & ADSR_NATN) == ADSR_NATN)
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break;
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DELAY(1);
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}
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return (0);
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}
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int
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cecpptest(void *v, int slave)
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{
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struct cec_softc *sc = v;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int ppoll;
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DPRINTF(DBG_FOLLOW, ("cecpptest: sc=%p slave=%d\n", sc, slave));
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|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_EPP);
|
||||
DELAY(25);
|
||||
ppoll = bus_space_read_1(iot, ioh, NEC7210_CPTR);
|
||||
DPRINTF(0xff, ("cecpptest: ppoll=%x\n", ppoll));
|
||||
return ((ppoll & (0x80 >> slave)) != 0);
|
||||
}
|
||||
|
||||
void
|
||||
cecppwatch(void *v, int slave)
|
||||
{
|
||||
struct cec_softc *sc = v;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
DPRINTF(DBG_FOLLOW, ("cecppwatch: sc=%p\n", sc));
|
||||
|
||||
sc->sc_flags |= CECF_PPOLL;
|
||||
sc->sc_ppoll_slave = slave;
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_CO);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_EPP);
|
||||
}
|
||||
|
||||
void
|
||||
cecppclear(void *v)
|
||||
{
|
||||
struct cec_softc *sc = v;
|
||||
|
||||
DPRINTF(DBG_FOLLOW, ("cecppclear: sc=%p\n", sc));
|
||||
|
||||
sc->sc_flags &= ~CECF_PPOLL;
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, NEC7210_IMR2, 0);
|
||||
}
|
||||
|
||||
void
|
||||
cecxfer(void *v, int slave, int sec, void *buf, int count, int dir, int timo)
|
||||
{
|
||||
struct cec_softc *sc = v;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
DPRINTF(DBG_FOLLOW,
|
||||
("cecxfer: slave=%d sec=%d buf=%p count=%d dir=%x timo=%d\n",
|
||||
slave, sec, buf, count, dir, timo));
|
||||
|
||||
sc->sc_flags |= CECF_IO;
|
||||
if (dir == GPIB_READ)
|
||||
sc->sc_flags |= CECF_READ;
|
||||
if (timo) {
|
||||
sc->sc_flags |= CECF_TIMO;
|
||||
callout_reset(&sc->sc_timeout_ch, 5*hz, cectimeout, sc);
|
||||
}
|
||||
|
||||
if (sc->sc_flags & CECF_READ) {
|
||||
DPRINTF(DBG_FOLLOW, ("cecxfer: DMA read request\n"));
|
||||
if ((sc->sc_flags & CECF_USEDMA) != 0) {
|
||||
isa_dmastart(sc->sc_ic, sc->sc_drq, buf, count, NULL,
|
||||
DMAMODE_READ | DMAMODE_DEMAND, BUS_DMA_NOWAIT);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_DMAI);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_END);
|
||||
// XXX (void) cecrecv(sc, slave, sec, NULL, 0);
|
||||
(void) gpibrecv(&cec_ic, slave, sec, NULL, 0);
|
||||
} else {
|
||||
/* XXX this doesn't work */
|
||||
DPRINTF(DBG_FOLLOW, ("cecxfer: polling instead\n"));
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_END);
|
||||
// XXX (void) cecrecv(sc, slave, sec, buf, count);
|
||||
(void) gpibrecv(&cec_ic, slave, sec, buf, count);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_CO);
|
||||
}
|
||||
} else {
|
||||
DPRINTF(DBG_FOLLOW, ("cecxfer: DMA write request\n"));
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, 0);
|
||||
if (count < cecdmathresh ||
|
||||
(sc->sc_flags & CECF_USEDMA) == 0) {
|
||||
DPRINTF(DBG_FOLLOW, ("cecxfer: polling instead\n"));
|
||||
// XXX (void) cecsend(sc, slave, sec, buf, count);
|
||||
(void) gpibsend(&cec_ic, slave, sec, buf, count);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_CO);
|
||||
return;
|
||||
}
|
||||
/* we send the last byte with EOI set */
|
||||
isa_dmastart(sc->sc_ic, sc->sc_drq, buf, count-1, NULL,
|
||||
DMAMODE_WRITE | DMAMODE_DEMAND, BUS_DMA_NOWAIT);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_DMAO);
|
||||
// XXX (void) cecsend(sc, slave, sec, NULL, 0);
|
||||
(void) gpibsend(&cec_ic, slave, sec, NULL, 0);
|
||||
while (!isa_dmafinished(sc->sc_ic, sc->sc_drq))
|
||||
DELAY(1);
|
||||
(void) cecwait(sc, ISR1_DO, 0);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_SEOI);
|
||||
bus_space_write_1(iot, ioh, NEC7210_CDOR, *(char *)buf+count);
|
||||
/* generate interrupt */
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_DO);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
cecifc(void *v)
|
||||
{
|
||||
struct cec_softc *sc = v;
|
||||
|
||||
nec7210_ifc(sc);
|
||||
}
|
||||
|
||||
static int
|
||||
nec7210_setaddress(struct cec_softc *sc, int pri, int sec)
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
u_int8_t admr;
|
||||
|
||||
/* assign our primary address */
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADDR, (pri & ADDR_MASK));
|
||||
|
||||
admr = ADMR_TRM0 | ADMR_TRM1;
|
||||
|
||||
/* assign our secondary address */
|
||||
if (sec != -1) {
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADDR,
|
||||
(ADDR_ARS | (sec & ADDR_MASK)));
|
||||
admr |= ADMR_ADM1;
|
||||
} else {
|
||||
/* disable secondary address */
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADDR,
|
||||
(ADDR_ARS | ADDR_DT | ADDR_DL));
|
||||
admr |= ADMR_ADM0;
|
||||
}
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADMR, admr);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
nec7210_init(struct cec_softc *sc)
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
/* reset chip */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_CRST);
|
||||
|
||||
/* clear interrupts */
|
||||
bus_space_read_1(iot, ioh, NEC7210_CPTR);
|
||||
bus_space_read_1(iot, ioh, NEC7210_ISR1);
|
||||
bus_space_read_1(iot, ioh, NEC7210_ISR2);
|
||||
|
||||
/* initialise interrupts */
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR1, 0);
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR2, 0);
|
||||
bus_space_write_1(iot, ioh, NEC7210_SPMR, 0);
|
||||
bus_space_write_1(iot, ioh, NEC7210_EOSR, 0);
|
||||
|
||||
/* set internal clock to 8MHz */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, (AUXMR_ICR | 0x8));
|
||||
/* parallel poll unconfigure */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, (AUXMR_PPOLL | PPOLL_PPU));
|
||||
|
||||
/* assign our address */
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADDR, 0);
|
||||
/* disable secondary address */
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADDR,
|
||||
(ADDR_ARS | ADDR_DT | ADDR_DL));
|
||||
|
||||
/* setup transceivers */
|
||||
bus_space_write_1(iot, ioh, NEC7210_ADMR,
|
||||
(ADMR_ADM0 | ADMR_TRM0 | ADMR_TRM1));
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR,
|
||||
(AUXMR_REGA | AUX_A_HSNORM));
|
||||
|
||||
/* set INT pin to active high */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXMR_REGB);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXMR_REGE);
|
||||
|
||||
/* holdoff on end condition */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, (AUXMR_REGA | AUX_A_HLDE));
|
||||
|
||||
/* reconnect to bus */
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, (AUXMR_CMD | AUXCMD_IEPON));
|
||||
}
|
||||
|
||||
/*
|
||||
* Place all devices on the bus into quiescient state ready for
|
||||
* remote programming.
|
||||
* Obviously, we're the system controller upon exit.
|
||||
*/
|
||||
void
|
||||
nec7210_ifc(struct cec_softc *sc)
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
|
||||
/*XXX*/ bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_TCA);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_CREN);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_SIFC);
|
||||
/* wait for devices to enter quiescient state */
|
||||
DELAY(100);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_CIFC);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_SREN);
|
||||
}
|
||||
|
||||
static int
|
||||
cecwait(struct cec_softc *sc, int x1, int x2)
|
||||
{
|
||||
int timo = cecwtimeout;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
u_int8_t stat1, stat2;
|
||||
|
||||
DPRINTF(DBG_WAIT, ("cecwait: sc=%p, x1=0x%x x2=0x%x\n", sc, x1, x2));
|
||||
|
||||
for (;;) {
|
||||
stat1 = bus_space_read_1(iot, ioh, NEC7210_ISR1);
|
||||
stat2 = bus_space_read_1(iot, ioh, NEC7210_ISR2);
|
||||
#if 0
|
||||
if ((stat1 & ISR1_ERR)) {
|
||||
DPRINTF(DBG_WAIT, ("cecwait: got ERR\n"));
|
||||
return (1);
|
||||
}
|
||||
#endif
|
||||
if (--timo == 0) {
|
||||
DPRINTF(DBG_REPORTTIME,
|
||||
("cecwait: timeout x1=0x%x x2=0x%x\n", x1, x2));
|
||||
return (1);
|
||||
}
|
||||
if ((stat1 & x1) || (stat2 & x2))
|
||||
break;
|
||||
DELAY(1);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
cectimeout(void *v)
|
||||
{
|
||||
struct cec_softc *sc = v;
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh = sc->sc_ioh;
|
||||
int s;
|
||||
|
||||
DPRINTF(DBG_FOLLOW, ("cectimeout: sc=%p\n", sc));
|
||||
|
||||
s = splbio();
|
||||
if (sc->sc_flags & CECF_IO) {
|
||||
bus_space_write_1(iot, ioh, NEC7210_IMR1, 0);
|
||||
bus_space_write_2(iot, ioh, NEC7210_IMR2, 0);
|
||||
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_TCA);
|
||||
sc->sc_flags &= ~(CECF_IO | CECF_READ | CECF_TIMO);
|
||||
isa_dmaabort(sc->sc_ic, sc->sc_drq);
|
||||
printf("%s: %s timeout\n", sc->sc_dev.dv_xname,
|
||||
sc->sc_flags & CECF_READ ? "read" : "write");
|
||||
gpibintr(sc->sc_gpib);
|
||||
}
|
||||
splx(s);
|
||||
}
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.isa,v 1.128 2003/03/03 22:07:21 mycroft Exp $
|
||||
# $NetBSD: files.isa,v 1.129 2003/06/02 03:57:16 gmcgarry Exp $
|
||||
#
|
||||
# Config file and device description for machine-independent ISA code.
|
||||
# Included by ports that need it. Requires that the SCSI files be
|
||||
|
|
@ -154,6 +154,14 @@ device wt: tape, isadma
|
|||
attach wt at isa
|
||||
file dev/isa/wt.c wt needs-flag
|
||||
|
||||
#
|
||||
# GPIB controllers
|
||||
#
|
||||
|
||||
device cec: gpibdev
|
||||
attach cec at isa
|
||||
file dev/isa/cec.c cec
|
||||
|
||||
#
|
||||
# ISA networking drivers
|
||||
#
|
||||
|
|
|
|||
Loading…
Reference in New Issue