move from libc.
This commit is contained in:
christos
parent
66feb1b71d
commit
9ce35109d3
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@ -0,0 +1,269 @@
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/* $NetBSD: bcopy.S,v 1.1 2005/12/22 01:25:12 christos Exp $ */
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/*
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* Copyright (c) 2000 SHIMIZU Ryo <ryo@misakimix.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#if defined(LIBC_SCCS) && !defined(lint)
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RCSID("$NetBSD: bcopy.S,v 1.1 2005/12/22 01:25:12 christos Exp $")
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#endif
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#if defined(MEMCOPY) || defined(MEMMOVE)
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#define REG_DST0 r3
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#define REG_SRC r5
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#define REG_DST r4
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#else
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#define REG_SRC r4
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#define REG_DST r5
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#endif
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#define REG_LEN r6
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#ifdef MEMCOPY
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ENTRY(memcpy)
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#else
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#ifdef MEMMOVE
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ENTRY(memmove)
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#else
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ENTRY(bcopy)
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#endif
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#endif
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#ifdef REG_DST0
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mov REG_DST,REG_DST0
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#endif
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cmp/eq REG_DST,REG_SRC /* if ( src == dst ) return; */
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bt/s bcopy_return
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cmp/hi REG_DST,REG_SRC
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bf/s bcopy_overlap
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mov REG_SRC,r0
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xor REG_DST,r0
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and #3,r0
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mov r0,r1
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tst r0,r0 /* (src ^ dst) & 3 */
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bf/s word_align
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longword_align:
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tst REG_LEN,REG_LEN /* if ( len==0 ) return; */
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bt/s bcopy_return
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mov REG_SRC,r0
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tst #1,r0 /* if ( src & 1 ) */
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bt 1f
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mov.b @REG_SRC+,r0 /* *dst++ = *src++; */
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add #-1,REG_LEN
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mov.b r0,@REG_DST
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add #1,REG_DST
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1:
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mov #1,r0
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cmp/hi r0,REG_LEN /* if ( (len > 1) && */
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bf/s 1f
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mov REG_SRC,r0
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tst #2,r0 /* (src & 2) { */
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bt 1f
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mov.w @REG_SRC+,r0 /* *((unsigned short*)dst)++ = *((unsigned short*)src)++; */
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add #-2,REG_LEN /* len -= 2; */
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mov.w r0,@REG_DST
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add #2,REG_DST /* } */
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1:
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mov #3,r1
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cmp/hi r1,REG_LEN /* while ( len > 3 ) { */
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bf/s no_align_delay
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tst REG_LEN,REG_LEN
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2:
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mov.l @REG_SRC+,r0 /* *((unsigned long*)dst)++ = *((unsigned long*)src)++; */
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add #-4,REG_LEN /* len -= 4; */
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mov.l r0,@REG_DST
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cmp/hi r1,REG_LEN
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bt/s 2b
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add #4,REG_DST /* } */
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bra no_align_delay
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tst REG_LEN,REG_LEN
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word_align:
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mov r1,r0
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tst #1,r0
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bf/s no_align_delay
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tst REG_LEN,REG_LEN /* if ( len == 0 ) return; */
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bt bcopy_return
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mov REG_SRC,r0 /* if ( src & 1 ) */
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tst #1,r0
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bt 1f
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mov.b @REG_SRC+,r0 /* *dst++ = *src++; */
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add #-1,REG_LEN
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mov.b r0,@REG_DST
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add #1,REG_DST
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1:
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mov #1,r1
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cmp/hi r1,REG_LEN /* while ( len > 1 ) { */
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bf/s no_align_delay
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tst REG_LEN,REG_LEN
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2:
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mov.w @REG_SRC+,r0 /* *((unsigned short*)dst)++ = *((unsigned short*)src)++; */
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add #-2,REG_LEN /* len -= 2; */
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mov.w r0,@REG_DST
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cmp/hi r1,REG_LEN
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bt/s 2b
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add #2,REG_DST /* } */
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no_align:
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tst REG_LEN,REG_LEN /* while ( len!= ) { */
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no_align_delay:
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bt bcopy_return
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1:
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mov.b @REG_SRC+,r0 /* *dst++ = *src++; */
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add #-1,REG_LEN /* len--; */
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mov.b r0,@REG_DST
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tst REG_LEN,REG_LEN
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bf/s 1b
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add #1,REG_DST /* } */
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bcopy_return:
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rts
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#ifdef REG_DST0
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mov REG_DST0,r0
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#else
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nop
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#endif
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bcopy_overlap:
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add REG_LEN,REG_SRC
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add REG_LEN,REG_DST
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mov REG_SRC,r0
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xor REG_DST,r0
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and #3,r0
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mov r0,r1
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tst r0,r0 /* (src ^ dst) & 3 */
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bf/s ov_word_align
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ov_longword_align:
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tst REG_LEN,REG_LEN /* if ( len==0 ) return; */
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bt/s bcopy_return
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mov REG_SRC,r0
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tst #1,r0 /* if ( src & 1 ) */
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bt 1f
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add #-1,REG_SRC /* *--dst = *--src; */
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mov.b @REG_SRC,r0
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mov.b r0,@-REG_DST
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add #-1,REG_LEN
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1:
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mov #1,r0
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cmp/hi r0,REG_LEN /* if ( (len > 1) && */
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bf/s 1f
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mov REG_SRC,r0
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tst #2,r0 /* (src & 2) { */
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bt 1f
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add #-2,REG_SRC /* *--((unsigned short*)dst) = *--((unsigned short*)src); */
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mov.w @REG_SRC,r0
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add #-2,REG_LEN /* len -= 2; */
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mov.w r0,@-REG_DST /* } */
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1:
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mov #3,r1
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cmp/hi r1,REG_LEN /* while ( len > 3 ) { */
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bf/s ov_no_align_delay
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tst REG_LEN,REG_LEN
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2:
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add #-4,REG_SRC
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mov.l @REG_SRC,r0 /* *((unsigned long*)dst)++ = *((unsigned long*)src)++; */
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add #-4,REG_LEN /* len -= 4; */
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cmp/hi r1,REG_LEN
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bt/s 2b
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mov.l r0,@-REG_DST /* } */
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bra ov_no_align_delay
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tst REG_LEN,REG_LEN
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ov_word_align:
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mov r1,r0
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tst #1,r0
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bf/s ov_no_align_delay
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tst REG_LEN,REG_LEN /* if ( len == 0 ) return; */
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bt bcopy_return
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mov REG_SRC,r0 /* if ( src & 1 ) */
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tst #1,r0
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bt 1f
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add #-1,REG_SRC
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mov.b @REG_SRC,r0 /* *--dst = *--src; */
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add #-1,REG_LEN
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mov.b r0,@-REG_DST
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1:
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mov #1,r1
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cmp/hi r1,REG_LEN /* while ( len > 1 ) { */
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bf/s ov_no_align_delay
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tst REG_LEN,REG_LEN
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2:
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add #-2,REG_SRC
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mov.w @REG_SRC,r0 /* *--((unsigned short*)dst) = *--((unsigned short*)src); */
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add #-2,REG_LEN /* len -= 2; */
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cmp/hi r1,REG_LEN
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bt/s 2b
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mov.w r0,@-REG_DST /* } */
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ov_no_align:
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tst REG_LEN,REG_LEN /* while ( len!= ) { */
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ov_no_align_delay:
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bt 9f
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1:
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add #-1,REG_SRC
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mov.b @REG_SRC,r0 /* *--dst = *--src; */
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add #-1,REG_LEN /* len--; */
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tst REG_LEN,REG_LEN
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bf/s 1b
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mov.b r0,@-REG_DST /* } */
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9:
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rts
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#ifdef REG_DST0
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mov REG_DST0,r0
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#else
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nop
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#endif
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