"#define<TAB>" police.
This commit is contained in:
simonb
parent
9f857ffb2f
commit
9cd9c7cf83
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ansi.h,v 1.16 2003/08/07 16:28:59 agc Exp $ */
|
||||
/* $NetBSD: ansi.h,v 1.17 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990, 1993
|
||||
|
|
@ -76,8 +76,8 @@
|
|||
#define _BSD_WCHAR_T_ int /* wchar_t */
|
||||
#define _BSD_WINT_T_ int /* wint_t */
|
||||
#define _BSD_RUNE_T_ int /* rune_t */
|
||||
#define _BSD_WCTRANS_T_ void * /* wctrans_t */
|
||||
#define _BSD_WCTYPE_T_ void * /* wctype_t */
|
||||
#define _BSD_WCTRANS_T_ void * /* wctrans_t */
|
||||
#define _BSD_WCTYPE_T_ void * /* wctype_t */
|
||||
|
||||
/*
|
||||
* mbstate_t is an opaque object to keep conversion state, during multibyte
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: aout_machdep.h,v 1.9 2002/12/10 17:14:16 thorpej Exp $ */
|
||||
/* $NetBSD: aout_machdep.h,v 1.10 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,9 +37,9 @@
|
|||
*/
|
||||
|
||||
#ifndef _PC532_EXEC_H_
|
||||
#define _PC532_EXEC_H_
|
||||
#define _PC532_EXEC_H_
|
||||
|
||||
#define AOUT_LDPGSZ 4096
|
||||
#define AOUT_LDPGSZ 4096
|
||||
|
||||
/* Relocation format. */
|
||||
struct relocation_info_pc532 {
|
||||
|
|
@ -54,6 +54,6 @@ struct relocation_info_pc532 {
|
|||
r_disp : 2, /* ns32k data type */
|
||||
r_baserel : 1; /* linkage table relative */
|
||||
};
|
||||
#define relocation_info relocation_info_pc532
|
||||
#define relocation_info relocation_info_pc532
|
||||
|
||||
#endif /* _PC532_EXEC_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: asm.h,v 1.15 2003/12/06 14:06:28 simonb Exp $ */
|
||||
/* $NetBSD: asm.h,v 1.16 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
|
@ -37,16 +37,16 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_ASM_H_
|
||||
#define _MACHINE_ASM_H_
|
||||
#define _MACHINE_ASM_H_
|
||||
|
||||
#if __STDC__
|
||||
#define CAT(a, b) a ## b
|
||||
#define CAT(a, b) a ## b
|
||||
#else
|
||||
#define CAT(a, b) a/**/b
|
||||
#define CAT(a, b) a/**/b
|
||||
#endif
|
||||
|
||||
#define _C_LABEL(name) CAT(_,name)
|
||||
#define _ASM_LABEL(name) name
|
||||
#define _C_LABEL(name) CAT(_,name)
|
||||
#define _ASM_LABEL(name) name
|
||||
|
||||
/* let kernels and others override entrypoint alignment */
|
||||
#ifndef _ALIGN_TEXT
|
||||
|
|
@ -57,51 +57,51 @@
|
|||
# define _ALIGN_DATA .align 2
|
||||
#endif
|
||||
|
||||
#define S_ARG0 4(sp)
|
||||
#define S_ARG1 8(sp)
|
||||
#define S_ARG2 12(sp)
|
||||
#define S_ARG3 16(sp)
|
||||
#define S_ARG0 4(sp)
|
||||
#define S_ARG1 8(sp)
|
||||
#define S_ARG2 12(sp)
|
||||
#define S_ARG3 16(sp)
|
||||
|
||||
#define B_ARG0 8(fp)
|
||||
#define B_ARG1 12(fp)
|
||||
#define B_ARG2 16(fp)
|
||||
#define B_ARG3 20(fp)
|
||||
#define B_ARG0 8(fp)
|
||||
#define B_ARG1 12(fp)
|
||||
#define B_ARG2 16(fp)
|
||||
#define B_ARG3 20(fp)
|
||||
|
||||
#ifdef PIC
|
||||
#define PIC_PROLOGUE \
|
||||
#define PIC_PROLOGUE \
|
||||
sprd sb,tos ; \
|
||||
addr _C_LABEL(_GLOBAL_OFFSET_TABLE_)(pc),r1; \
|
||||
lprd sb,r1
|
||||
|
||||
#define PIC_EPILOGUE \
|
||||
#define PIC_EPILOGUE \
|
||||
lprd sb,tos
|
||||
|
||||
#define PIC_GOT(name) 0(name(sb))
|
||||
#define PIC_GOT(name) 0(name(sb))
|
||||
|
||||
#define PIC_S_ARG0 8(sp)
|
||||
#define PIC_S_ARG1 12(sp)
|
||||
#define PIC_S_ARG2 16(sp)
|
||||
#define PIC_S_ARG3 20(sp)
|
||||
#define PIC_S_ARG0 8(sp)
|
||||
#define PIC_S_ARG1 12(sp)
|
||||
#define PIC_S_ARG2 16(sp)
|
||||
#define PIC_S_ARG3 20(sp)
|
||||
#else
|
||||
#define PIC_PROLOGUE
|
||||
#define PIC_EPILOGUE
|
||||
#define PIC_PROLOGUE
|
||||
#define PIC_EPILOGUE
|
||||
#define PIC_GOT(name) name(pc)
|
||||
|
||||
#define PIC_S_ARG0 4(sp)
|
||||
#define PIC_S_ARG1 8(sp)
|
||||
#define PIC_S_ARG2 12(sp)
|
||||
#define PIC_S_ARG3 16(sp)
|
||||
#define PIC_S_ARG0 4(sp)
|
||||
#define PIC_S_ARG1 8(sp)
|
||||
#define PIC_S_ARG2 12(sp)
|
||||
#define PIC_S_ARG3 16(sp)
|
||||
#endif
|
||||
|
||||
#if defined(_KERNEL) && defined(MRTD)
|
||||
#define _SETARGS(args) \
|
||||
#define _SETARGS(args) \
|
||||
.set ARGS,args
|
||||
#else
|
||||
#define _SETARGS(args) \
|
||||
#define _SETARGS(args) \
|
||||
.set ARGS,0
|
||||
#endif
|
||||
|
||||
#define _ENTRY(name, args) \
|
||||
#define _ENTRY(name, args) \
|
||||
.text ; \
|
||||
_ALIGN_TEXT ; \
|
||||
.globl name ; \
|
||||
|
|
@ -128,7 +128,7 @@
|
|||
#define ENTRY_NOPROFILE(name) _ENTRY(_C_LABEL(name), 0)
|
||||
#define ASENTRY_NOPROFILE(name) _ENTRY(_ASM_LABEL(name), 0)
|
||||
|
||||
#define ALTENTRY(name, rname) \
|
||||
#define ALTENTRY(name, rname) \
|
||||
.globl _C_LABEL(name) ; \
|
||||
.type _C_LABEL(name),@function ; \
|
||||
.set _C_LABEL(name),_C_LABEL(rname)
|
||||
|
|
@ -136,18 +136,18 @@
|
|||
#define ASMSTR \
|
||||
.asciz
|
||||
|
||||
#define RCSID(string) \
|
||||
#define RCSID(string) \
|
||||
.text ; \
|
||||
ASMSTR string
|
||||
|
||||
/*
|
||||
* Global variables of whatever sort.
|
||||
*/
|
||||
#define GLOBAL(name) \
|
||||
#define GLOBAL(name) \
|
||||
.globl _C_LABEL(name) ; \
|
||||
_C_LABEL(name):
|
||||
|
||||
#define ASGLOBAL(name) \
|
||||
#define ASGLOBAL(name) \
|
||||
.globl _ASM_LABEL(name) ; \
|
||||
_ASM_LABEL(name):
|
||||
|
||||
|
|
@ -164,7 +164,7 @@
|
|||
* Items in the DATA segment.
|
||||
*/
|
||||
|
||||
#define _DATA(name, pseudo, init) \
|
||||
#define _DATA(name, pseudo, init) \
|
||||
.data ; \
|
||||
.globl name ; \
|
||||
.type name,@object ; \
|
||||
|
|
@ -175,12 +175,12 @@
|
|||
#define DATA_D(name, init) _DATA(_C_LABEL(name), .long, init)
|
||||
#define DATA_W(name, init) _DATA(_C_LABEL(name), .word, init)
|
||||
#define DATA_B(name, init) _DATA(_C_LABEL(name), .byte, init)
|
||||
#define DATA_S(name, init) _DATA(_C_LABEL(name), .asciz, init)
|
||||
#define DATA_S(name, init) _DATA(_C_LABEL(name), .asciz, init)
|
||||
|
||||
#define ASDATA_D(name, init) _DATA(_ASM_LABEL(name), .long, init)
|
||||
#define ASDATA_W(name, init) _DATA(_ASM_LABEL(name), .word, init)
|
||||
#define ASDATA_B(name, init) _DATA(_ASM_LABEL(name), .byte, init)
|
||||
#define ASDATA_S(name, init) _DATA(_ASM_LABEL(name), .asciz, init)
|
||||
#define ASDATA_S(name, init) _DATA(_ASM_LABEL(name), .asciz, init)
|
||||
|
||||
/*
|
||||
* Items in the BSS segment.
|
||||
|
|
@ -196,7 +196,7 @@
|
|||
* Shorthand for calling panic().
|
||||
* Note the side-effect: it uses up the 9: label, so be careful!
|
||||
*/
|
||||
#define PANIC(message) \
|
||||
#define PANIC(message) \
|
||||
addr 9f,tos ; \
|
||||
bsr _C_LABEL(panic) ; \
|
||||
9: .asciz message
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: autoconf.h,v 1.4 2000/06/01 00:49:50 matt Exp $ */
|
||||
/* $NetBSD: autoconf.h,v 1.5 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994 Matthias Pfaller.
|
||||
|
|
@ -42,7 +42,7 @@ struct confargs {
|
|||
/* Locator aliases */
|
||||
#include "locators.h"
|
||||
|
||||
#define cf_addr cf_loc[MAINBUSCF_ADDR]
|
||||
#define cf_irq cf_loc[MAINBUSCF_IRQ]
|
||||
#define cf_addr cf_loc[MAINBUSCF_ADDR]
|
||||
#define cf_irq cf_loc[MAINBUSCF_IRQ]
|
||||
|
||||
extern u_long bootdev;
|
||||
|
|
|
|||
|
|
@ -1,18 +1,18 @@
|
|||
/* $NetBSD: bswap.h,v 1.2 1999/08/21 05:39:54 simonb Exp $ */
|
||||
/* $NetBSD: bswap.h,v 1.3 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/* Written by Manuel Bouyer. Public domain */
|
||||
|
||||
#ifndef _MACHINE_BSWAP_H_
|
||||
#define _MACHINE_BSWAP_H_
|
||||
|
||||
#define __BSWAP_RENAME
|
||||
#define __BSWAP_RENAME
|
||||
#include <sys/bswap.h>
|
||||
|
||||
#ifdef __GNUC__
|
||||
|
||||
#include <machine/byte_swap.h>
|
||||
#define bswap16(x) __byte_swap_word(x)
|
||||
#define bswap32(x) __byte_swap_long(x)
|
||||
#define bswap16(x) __byte_swap_word(x)
|
||||
#define bswap32(x) __byte_swap_long(x)
|
||||
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: byte_swap.h,v 1.3 2003/08/07 16:28:59 agc Exp $ */
|
||||
/* $NetBSD: byte_swap.h,v 1.4 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1987, 1991 Regents of the University of California.
|
||||
|
|
@ -32,7 +32,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _PC532_BYTE_SWAP_H_
|
||||
#define _PC532_BYTE_SWAP_H_
|
||||
#define _PC532_BYTE_SWAP_H_
|
||||
|
||||
static __inline unsigned int
|
||||
__byte_swap_long_variable(unsigned int x)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpu.h,v 1.38 2004/01/04 11:33:30 jdolecek Exp $ */
|
||||
/* $NetBSD: cpu.h,v 1.39 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_CPU_H_
|
||||
#define _NS532_CPU_H_
|
||||
#define _NS532_CPU_H_
|
||||
|
||||
#if defined(_KERNEL_OPT)
|
||||
#include "opt_lockdebug.h"
|
||||
|
|
@ -71,7 +71,7 @@ extern struct cpu_info cpu_info_store;
|
|||
* referenced in generic code
|
||||
*/
|
||||
#define cpu_proc_fork(p1, p2) /* nothing */
|
||||
#define cpu_swapin(p) /* nothing */
|
||||
#define cpu_swapin(p) /* nothing */
|
||||
#define cpu_number() 0
|
||||
|
||||
/*
|
||||
|
|
@ -80,7 +80,7 @@ extern struct cpu_info cpu_info_store;
|
|||
* clockframe; for now, use generic intrframe.
|
||||
*/
|
||||
|
||||
#define clockframe intrframe
|
||||
#define clockframe intrframe
|
||||
|
||||
#define CLKF_USERMODE(framep) USERMODE((framep)->if_regs.r_psr)
|
||||
#define CLKF_BASEPRI(framep) ((framep)->if_pl == imask[IPL_ZERO])
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: cpufunc.h,v 1.5 2002/12/09 23:47:47 simonb Exp $ */
|
||||
/* $NetBSD: cpufunc.h,v 1.6 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996 Matthias Pfaller.
|
||||
|
|
@ -46,39 +46,39 @@
|
|||
/*
|
||||
* Load the FPU status register.
|
||||
*/
|
||||
#define lfsr(src) __asm __volatile("lfsr %0" : : "g" (src))
|
||||
#define lfsr(src) __asm __volatile("lfsr %0" : : "g" (src))
|
||||
|
||||
/*
|
||||
* Store the FPU status register.
|
||||
*/
|
||||
#define sfsr(src) __asm __volatile("sfsr %0" : "=g" (src) :)
|
||||
#define sfsr(src) __asm __volatile("sfsr %0" : "=g" (src) :)
|
||||
|
||||
/*
|
||||
* Load a processor register.
|
||||
*/
|
||||
#define lprd(reg, src) __asm __volatile("lprd " #reg ",%0" : : "g" (src))
|
||||
#define lprw(reg, src) __asm __volatile("lprw " #reg ",%0" : : "g" (src))
|
||||
#define lprb(reg, src) __asm __volatile("lprb " #reg ",%0" : : "g" (src))
|
||||
#define lprd(reg, src) __asm __volatile("lprd " #reg ",%0" : : "g" (src))
|
||||
#define lprw(reg, src) __asm __volatile("lprw " #reg ",%0" : : "g" (src))
|
||||
#define lprb(reg, src) __asm __volatile("lprb " #reg ",%0" : : "g" (src))
|
||||
|
||||
/*
|
||||
* Store a processor register.
|
||||
*/
|
||||
#define sprd(reg, dst) __asm __volatile("sprd " #reg ",%0" : "=g" (dst) :)
|
||||
#define sprw(reg, dst) __asm __volatile("sprw " #reg ",%0" : "=g" ((short) (dst)) :)
|
||||
#define sprb(reg, dst) __asm __volatile("sprb " #reg ",%0" : "=g" ((char) (dst)) :)
|
||||
#define sprd(reg, dst) __asm __volatile("sprd " #reg ",%0" : "=g" (dst) :)
|
||||
#define sprw(reg, dst) __asm __volatile("sprw " #reg ",%0" : "=g" ((short) (dst)) :)
|
||||
#define sprb(reg, dst) __asm __volatile("sprb " #reg ",%0" : "=g" ((char) (dst)) :)
|
||||
|
||||
/*
|
||||
* Move data. This can be used to force
|
||||
* gcc to load a register variable.
|
||||
*/
|
||||
#define movd(src, dst) __asm __volatile("movd %1,%0" : "=g" (dst) : "g" (src))
|
||||
#define movd(src, dst) __asm __volatile("movd %1,%0" : "=g" (dst) : "g" (src))
|
||||
|
||||
/*
|
||||
* movs[bdw] for fast blockmoves.
|
||||
* movs[bdw](from, to, n) update "from" and "to".
|
||||
* movs[bdw]nu(from, to, n) do not update "from" and "to".
|
||||
*/
|
||||
#define movs(type, from, to, n) \
|
||||
#define movs(type, from, to, n) \
|
||||
register int r0 __asm ("r0") = n; \
|
||||
register void *r1 __asm("r1") = from; \
|
||||
register void *r2 __asm("r2") = to; \
|
||||
|
|
@ -87,41 +87,41 @@
|
|||
: \
|
||||
: "memory" \
|
||||
);
|
||||
#define movs_update(type, from, to, n) do { \
|
||||
#define movs_update(type, from, to, n) do { \
|
||||
movs(type, from, to, n); \
|
||||
from = r1; to = r2; \
|
||||
} while (0)
|
||||
|
||||
#define movs_noupdate(type, from, to, n) do { \
|
||||
#define movs_noupdate(type, from, to, n) do { \
|
||||
movs(type, from, to, n); \
|
||||
} while (0)
|
||||
|
||||
#define movsd(from, to, n) movs_update("d", from, to, n)
|
||||
#define movsw(from, to, n) movs_update("w", from, to, n)
|
||||
#define movsb(from, to, n) movs_update("b", from, to, n)
|
||||
#define movsd(from, to, n) movs_update("d", from, to, n)
|
||||
#define movsw(from, to, n) movs_update("w", from, to, n)
|
||||
#define movsb(from, to, n) movs_update("b", from, to, n)
|
||||
|
||||
#define movsdnu(from, to, n) movs_noupdate("d", from, to, n)
|
||||
#define movswnu(from, to, n) movs_noupdate("w", from, to, n)
|
||||
#define movsbnu(from, to, n) movs_noupdate("b", from, to, n)
|
||||
#define movsdnu(from, to, n) movs_noupdate("d", from, to, n)
|
||||
#define movswnu(from, to, n) movs_noupdate("w", from, to, n)
|
||||
#define movsbnu(from, to, n) movs_noupdate("b", from, to, n)
|
||||
|
||||
/*
|
||||
* Invalidate data and/or instruction cache lines.
|
||||
*/
|
||||
#define cinv(mode, adr) __asm __volatile("cinv " #mode ",%0" : : "g" (adr))
|
||||
#define cinv(mode, adr) __asm __volatile("cinv " #mode ",%0" : : "g" (adr))
|
||||
|
||||
/*
|
||||
* Load the ptb. This loads ptb0 and ptb1 to
|
||||
* avoid a cpu-bug when using dual address
|
||||
* space instructions.
|
||||
*/
|
||||
#define load_ptb(src) __asm __volatile("lmr ptb0,%0; lmr ptb1,%0" : : "g" (src))
|
||||
#define load_ptb(src) __asm __volatile("lmr ptb0,%0; lmr ptb1,%0" : : "g" (src))
|
||||
|
||||
/*
|
||||
* Flush tlb. Just to be save this flushes
|
||||
* kernelmode and usermode translations.
|
||||
*/
|
||||
#define tlbflush() __asm __volatile("smr ptb0,r0; lmr ptb0,r0; lmr ptb1,r0" : : : "r0")
|
||||
#define tlbflush_entry(p) do { \
|
||||
#define tlbflush() __asm __volatile("smr ptb0,r0; lmr ptb0,r0; lmr ptb1,r0" : : : "r0")
|
||||
#define tlbflush_entry(p) do { \
|
||||
lmr(ivar0, p); \
|
||||
lmr(ivar1, p); \
|
||||
} while(0)
|
||||
|
|
@ -129,20 +129,20 @@
|
|||
/*
|
||||
* Trigger a T_BPT.
|
||||
*/
|
||||
#define breakpoint() __asm __volatile("bpt")
|
||||
#define breakpoint() __asm __volatile("bpt")
|
||||
|
||||
/*
|
||||
* Bits in the cfg register.
|
||||
*/
|
||||
#define CFG_I 0x0001 /* Enable vectored interrupts */
|
||||
#define CFG_F 0x0002 /* Enable floating-point instruction set */
|
||||
#define CFG_M 0x0004 /* Enable memory management instruction set */
|
||||
#define CFG_ONE 0x00f0 /* Must be one */
|
||||
#define CFG_DE 0x0100 /* Enable direct exception mode */
|
||||
#define CFG_DC 0x0200 /* Enable data cache */
|
||||
#define CFG_LDC 0x0400 /* Lock data cache */
|
||||
#define CFG_IC 0x0800 /* Enable instruction cache */
|
||||
#define CFG_LIC 0x1000 /* Lock instruction cache */
|
||||
#define CFG_I 0x0001 /* Enable vectored interrupts */
|
||||
#define CFG_F 0x0002 /* Enable floating-point instruction set */
|
||||
#define CFG_M 0x0004 /* Enable memory management instruction set */
|
||||
#define CFG_ONE 0x00f0 /* Must be one */
|
||||
#define CFG_DE 0x0100 /* Enable direct exception mode */
|
||||
#define CFG_DC 0x0200 /* Enable data cache */
|
||||
#define CFG_LDC 0x0400 /* Lock data cache */
|
||||
#define CFG_IC 0x0800 /* Enable instruction cache */
|
||||
#define CFG_LIC 0x1000 /* Lock instruction cache */
|
||||
#define CFG_PF 0x2000 /* Enable pipelined floating-point execution */
|
||||
|
||||
#endif /* !_NS532_CPUFUNC_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: db_machdep.h,v 1.14 2003/04/29 17:06:06 scw Exp $ */
|
||||
/* $NetBSD: db_machdep.h,v 1.15 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
|
@ -59,9 +59,9 @@ typedef long db_expr_t; /* expression - signed */
|
|||
|
||||
typedef struct trapframe db_regs_t;
|
||||
db_regs_t ddb_regs; /* register state */
|
||||
#define DDB_REGS (&ddb_regs)
|
||||
#define DDB_REGS (&ddb_regs)
|
||||
|
||||
#define PC_REGS(regs) ((db_addr_t)(regs)->tf_regs.r_pc)
|
||||
#define PC_REGS(regs) ((db_addr_t)(regs)->tf_regs.r_pc)
|
||||
|
||||
#define BKPT_ADDR(addr) (addr) /* breakpoint address */
|
||||
#define BKPT_INST 0xf2 /* breakpoint instruction */
|
||||
|
|
@ -72,13 +72,13 @@ db_regs_t ddb_regs; /* register state */
|
|||
#define db_set_single_step(regs) ((regs)->tf_regs.r_psr |= PSL_T)
|
||||
|
||||
#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BPT)
|
||||
#define IS_WATCHPOINT_TRAP(type, code) ((type) == T_WATCHPOINT)
|
||||
#define IS_WATCHPOINT_TRAP(type, code) ((type) == T_WATCHPOINT)
|
||||
|
||||
#define I_BSR 0x02
|
||||
#define I_JSR 0x7f /* and low 3 bits of next byte are 0x6 */
|
||||
#define I_RET 0x12
|
||||
#define I_RETT 0x42
|
||||
#define I_RETI 0x52
|
||||
#define I_BSR 0x02
|
||||
#define I_JSR 0x7f /* and low 3 bits of next byte are 0x6 */
|
||||
#define I_RET 0x12
|
||||
#define I_RETT 0x42
|
||||
#define I_RETI 0x52
|
||||
|
||||
#define inst_trap_return(ins) (((ins)&0xff) == I_RETT || \
|
||||
((ins)&0xff) == I_RETI)
|
||||
|
|
@ -87,8 +87,8 @@ db_regs_t ddb_regs; /* register state */
|
|||
(((ins)&0xff) == I_JSR && \
|
||||
((ins)&0x0700) == 0x0600))
|
||||
|
||||
#define inst_load(ins) 0
|
||||
#define inst_store(ins) 0
|
||||
#define inst_load(ins) 0
|
||||
#define inst_store(ins) 0
|
||||
|
||||
extern int db_active_ipl;
|
||||
|
||||
|
|
@ -96,8 +96,8 @@ extern int db_active_ipl;
|
|||
* This is needed for kgdb.
|
||||
*/
|
||||
typedef long kgdb_reg_t;
|
||||
#define KGDB_NUMREGS 25
|
||||
#define KGDB_BUFLEN 512
|
||||
#define KGDB_NUMREGS 25
|
||||
#define KGDB_BUFLEN 512
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: disklabel.h,v 1.1 1994/10/14 18:27:14 cgd Exp $ */
|
||||
/* $NetBSD: disklabel.h,v 1.2 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1994 Christopher G. Demetriou
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_DISKLABEL_H_
|
||||
#define _MACHINE_DISKLABEL_H_
|
||||
#define _MACHINE_DISKLABEL_H_
|
||||
|
||||
#define LABELSECTOR 0 /* sector containing label */
|
||||
#define LABELOFFSET 64 /* offset of label in sector */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: elf_machdep.h,v 1.1 2003/06/23 12:59:27 thorpej Exp $ */
|
||||
/* $NetBSD: elf_machdep.h,v 1.2 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
|
||||
#define ELF32_MACHDEP_ID_CASES \
|
||||
|
|
@ -11,6 +11,6 @@
|
|||
|
||||
#define ELF32_MACHDEP_ID EM_NS32K
|
||||
|
||||
#define ARCH_ELFSIZE 32 /* MD native binary size */
|
||||
#define ARCH_ELFSIZE 32 /* MD native binary size */
|
||||
|
||||
/* XXX relocations */
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* $NetBSD: endian_machdep.h,v 1.1 2000/03/17 00:09:24 mycroft Exp $ */
|
||||
/* $NetBSD: endian_machdep.h,v 1.2 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
#define _BYTE_ORDER _LITTLE_ENDIAN
|
||||
#define _BYTE_ORDER _LITTLE_ENDIAN
|
||||
|
||||
#ifdef __GNUC__
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: fpu.h,v 1.1 1996/04/04 06:36:41 phil Exp $ */
|
||||
/* $NetBSD: fpu.h,v 1.2 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* IEEE floating point support for NS32081 and NS32381 fpus.
|
||||
|
|
@ -29,37 +29,37 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_FPU_H_
|
||||
#define _NS532_FPU_H_
|
||||
#define _NS532_FPU_H_
|
||||
/*
|
||||
* Control register
|
||||
*/
|
||||
#define FPC_RMB 0x00010000 /* register modify bit */
|
||||
#define FPC_SWF 0x0000fe00 /* reserved for software */
|
||||
#define FPC_RM 0x00000180 /* rounding mode */
|
||||
#define FPC_RM_NEAREST 0x00000000 /* round to nearest */
|
||||
#define FPC_RM_TOZERO 0x00000080 /* round towards zero */
|
||||
#define FPC_RM_TOPOS 0x00000100 /* round towards +infinity */
|
||||
#define FPC_RM_TONEG 0x00000180 /* round towards -infinity */
|
||||
#define FPC_IF 0x00000040 /* inexact result flag */
|
||||
#define FPC_IEN 0x00000020 /* inexact result trap enable */
|
||||
#define FPC_UF 0x00000010 /* underflow flag (else 0) */
|
||||
#define FPC_UEN 0x00000008 /* underflow trap enable */
|
||||
#define FPC_TT 0x00000007 /* trap type */
|
||||
#define FPC_TT_NONE 0x00000000 /* no exceptional condition */
|
||||
#define FPC_TT_UNDFL 0x00000001 /* underflow */
|
||||
#define FPC_TT_OVFL 0x00000002 /* overflow */
|
||||
#define FPC_TT_DIV0 0x00000003 /* divide by zero */
|
||||
#define FPC_TT_ILL 0x00000004 /* illegal instruction */
|
||||
#define FPC_TT_INVOP 0x00000005 /* invalid operation */
|
||||
#define FPC_TT_INEXACT 0x00000006 /* inexact result */
|
||||
#define FPC_RMB 0x00010000 /* register modify bit */
|
||||
#define FPC_SWF 0x0000fe00 /* reserved for software */
|
||||
#define FPC_RM 0x00000180 /* rounding mode */
|
||||
#define FPC_RM_NEAREST 0x00000000 /* round to nearest */
|
||||
#define FPC_RM_TOZERO 0x00000080 /* round towards zero */
|
||||
#define FPC_RM_TOPOS 0x00000100 /* round towards +infinity */
|
||||
#define FPC_RM_TONEG 0x00000180 /* round towards -infinity */
|
||||
#define FPC_IF 0x00000040 /* inexact result flag */
|
||||
#define FPC_IEN 0x00000020 /* inexact result trap enable */
|
||||
#define FPC_UF 0x00000010 /* underflow flag (else 0) */
|
||||
#define FPC_UEN 0x00000008 /* underflow trap enable */
|
||||
#define FPC_TT 0x00000007 /* trap type */
|
||||
#define FPC_TT_NONE 0x00000000 /* no exceptional condition */
|
||||
#define FPC_TT_UNDFL 0x00000001 /* underflow */
|
||||
#define FPC_TT_OVFL 0x00000002 /* overflow */
|
||||
#define FPC_TT_DIV0 0x00000003 /* divide by zero */
|
||||
#define FPC_TT_ILL 0x00000004 /* illegal instruction */
|
||||
#define FPC_TT_INVOP 0x00000005 /* invalid operation */
|
||||
#define FPC_TT_INEXACT 0x00000006 /* inexact result */
|
||||
|
||||
/* Bits in the SWF field used for software emulation */
|
||||
#define FPC_OVE 0x200 /* Overflow enable */
|
||||
#define FPC_OVF 0x400 /* Overflow flag */
|
||||
#define FPC_IVE 0x800 /* Invalid enable */
|
||||
#define FPC_IVF 0x1000 /* Invalid flag */
|
||||
#define FPC_DZE 0x2000 /* Divide by zero enable */
|
||||
#define FPC_DZF 0x4000 /* Divide by zero flag */
|
||||
#define FPC_UNDE 0x8000 /* Soft Underflow enable, requires FPC_UEN */
|
||||
#define FPC_OVE 0x200 /* Overflow enable */
|
||||
#define FPC_OVF 0x400 /* Overflow flag */
|
||||
#define FPC_IVE 0x800 /* Invalid enable */
|
||||
#define FPC_IVF 0x1000 /* Invalid flag */
|
||||
#define FPC_DZE 0x2000 /* Divide by zero enable */
|
||||
#define FPC_DZF 0x4000 /* Divide by zero flag */
|
||||
#define FPC_UNDE 0x8000 /* Soft Underflow enable, requires FPC_UEN */
|
||||
|
||||
#endif /* _NS532_FPU_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: frame.h,v 1.11 2003/11/06 00:41:20 simonb Exp $ */
|
||||
/* $NetBSD: frame.h,v 1.12 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_FRAME_H_
|
||||
#define _NS532_FRAME_H_
|
||||
#define _NS532_FRAME_H_
|
||||
|
||||
#include <sys/signal.h>
|
||||
#include <machine/reg.h>
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: icu.h,v 1.10 1997/03/20 12:02:40 matthias Exp $ */
|
||||
/* $NetBSD: icu.h,v 1.11 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1993 Philip A. Nelson.
|
||||
|
|
@ -36,55 +36,55 @@
|
|||
/* icu.h: defines for use with the ns32532 icu. */
|
||||
|
||||
#ifndef _NS532_ICU_H_
|
||||
#define _NS532_ICU_H_
|
||||
#define _NS532_ICU_H_
|
||||
|
||||
/* We don't use vector interrupts, but make it right anyway */
|
||||
#define VEC_ICU 0x10
|
||||
#define VEC_ICU 0x10
|
||||
|
||||
/* The address of the ICU! */
|
||||
#define ICU_ADR 0xfffffe00
|
||||
#define ICU_ADR 0xfffffe00
|
||||
|
||||
/* ICU clock speed. */
|
||||
#define ICU_CLK_HZ (3686400/4) /* raw ICU clock speed */
|
||||
#define ICU_CLK_HZ (3686400/4) /* raw ICU clock speed */
|
||||
|
||||
/* ICU registers
|
||||
*/
|
||||
#define HVCT 0
|
||||
#define SVCT 1
|
||||
#define ELTG 2
|
||||
#define TPL 4
|
||||
#define IPND 6
|
||||
#define ISRV 8
|
||||
#define IMSK 10
|
||||
#define CSRC 12
|
||||
#define FPRT 14
|
||||
#define MCTL 16
|
||||
#define OCASN 17
|
||||
#define CIPTR 18
|
||||
#define PDAT 19
|
||||
#define IPS 20
|
||||
#define PDIR 21
|
||||
#define CCTL 22
|
||||
#define CICTL 23
|
||||
#define LCSV 24
|
||||
#define HCSV 26
|
||||
#define LCCV 28
|
||||
#define HCCV 30
|
||||
#define HVCT 0
|
||||
#define SVCT 1
|
||||
#define ELTG 2
|
||||
#define TPL 4
|
||||
#define IPND 6
|
||||
#define ISRV 8
|
||||
#define IMSK 10
|
||||
#define CSRC 12
|
||||
#define FPRT 14
|
||||
#define MCTL 16
|
||||
#define OCASN 17
|
||||
#define CIPTR 18
|
||||
#define PDAT 19
|
||||
#define IPS 20
|
||||
#define PDIR 21
|
||||
#define CCTL 22
|
||||
#define CICTL 23
|
||||
#define LCSV 24
|
||||
#define HCSV 26
|
||||
#define LCCV 28
|
||||
#define HCCV 30
|
||||
|
||||
/* Byte and Word access to ICU registers
|
||||
*/
|
||||
#define ICUB(n) *((unsigned char *)(ICU_ADR + n))
|
||||
#define ICUW(n) *((unsigned short *)(ICU_ADR + n))
|
||||
#define ICUB(n) *((unsigned char *)(ICU_ADR + n))
|
||||
#define ICUW(n) *((unsigned short *)(ICU_ADR + n))
|
||||
|
||||
/*
|
||||
* ICU IPND register;
|
||||
* induce h/w interrupt condition atomicly by poking magic value
|
||||
* into IPND (Interrupt pending register).
|
||||
*/
|
||||
#define IPND_SET 0x80
|
||||
#define IPND_CLR 0x00
|
||||
#define setsofticu(ir) (ICUB(IPND + (((ir) < 8) ? 0 : 1)) = (IPND_SET + (ir)))
|
||||
#define clrsofticu(ir) (ICUB(IPND + (((ir) < 8) ? 0 : 1)) = (IPND_CLR + (ir)))
|
||||
#define IPND_SET 0x80
|
||||
#define IPND_CLR 0x00
|
||||
#define setsofticu(ir) (ICUB(IPND + (((ir) < 8) ? 0 : 1)) = (IPND_SET + (ir)))
|
||||
#define clrsofticu(ir) (ICUB(IPND + (((ir) < 8) ? 0 : 1)) = (IPND_CLR + (ir)))
|
||||
|
||||
#ifndef _LOCORE
|
||||
/* Interrupt trigger modes
|
||||
|
|
@ -94,26 +94,26 @@ enum {HIGH_LEVEL, LOW_LEVEL, RISING_EDGE, FALLING_EDGE} int_modes;
|
|||
|
||||
/* Hardware interrupt request lines.
|
||||
*/
|
||||
#define IR_CLK 2 /* highest priority */
|
||||
#define IR_SCSI0 5 /* Adaptec 6250 */
|
||||
#define IR_SCSI1 4 /* NCR DP8490 */
|
||||
#define IR_TTY0 13
|
||||
#define IR_TTY0RDY 12
|
||||
#define IR_TTY1 11
|
||||
#define IR_TTY1RDY 10
|
||||
#define IR_TTY2 9
|
||||
#define IR_TTY2RDY 8
|
||||
#define IR_TTY3 7
|
||||
#define IR_TTY3RDY 6
|
||||
#define IR_SOFT 14
|
||||
#define IR_CLK 2 /* highest priority */
|
||||
#define IR_SCSI0 5 /* Adaptec 6250 */
|
||||
#define IR_SCSI1 4 /* NCR DP8490 */
|
||||
#define IR_TTY0 13
|
||||
#define IR_TTY0RDY 12
|
||||
#define IR_TTY1 11
|
||||
#define IR_TTY1RDY 10
|
||||
#define IR_TTY2 9
|
||||
#define IR_TTY2RDY 8
|
||||
#define IR_TTY3 7
|
||||
#define IR_TTY3RDY 6
|
||||
#define IR_SOFT 14
|
||||
|
||||
#define ints_off bicpsrw PSL_I ; nop
|
||||
#define ints_on bispsrw PSL_I
|
||||
#define ints_off bicpsrw PSL_I ; nop
|
||||
#define ints_on bispsrw PSL_I
|
||||
|
||||
/* SCSI controllers */
|
||||
#define AIC6250 0
|
||||
#define DP8490 1
|
||||
#define ICU_SCSI_BIT 0x80
|
||||
#define AIC6250 0
|
||||
#define DP8490 1
|
||||
#define ICU_SCSI_BIT 0x80
|
||||
|
||||
#ifndef _LOCORE
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ieeefp.h,v 1.2 1996/04/04 06:36:45 phil Exp $ */
|
||||
/* $NetBSD: ieeefp.h,v 1.3 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Written by J.T. Conklin, Apr 28, 1995
|
||||
|
|
@ -6,14 +6,14 @@
|
|||
*/
|
||||
|
||||
#ifndef _PC532_IEEEFP_H_
|
||||
#define _PC532_IEEEFP_H_
|
||||
#define _PC532_IEEEFP_H_
|
||||
|
||||
typedef int fp_except;
|
||||
#define FP_X_IMP 0x0020 /* imprecise (loss of precision) */
|
||||
#define FP_X_OFL 0x0200 /* overflow exception */
|
||||
#define FP_X_INV 0x0800 /* invalid operation exception */
|
||||
#define FP_X_DZ 0x2000 /* divide-by-zero exception */
|
||||
#define FP_X_UFL 0x8000 /* underflow exception */
|
||||
#define FP_X_IMP 0x0020 /* imprecise (loss of precision) */
|
||||
#define FP_X_OFL 0x0200 /* overflow exception */
|
||||
#define FP_X_INV 0x0800 /* invalid operation exception */
|
||||
#define FP_X_DZ 0x2000 /* divide-by-zero exception */
|
||||
#define FP_X_UFL 0x8000 /* underflow exception */
|
||||
|
||||
typedef enum {
|
||||
FP_RN=0, /* round to nearest representable number */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: int_const.h,v 1.1 2001/04/14 22:38:41 kleink Exp $ */
|
||||
/* $NetBSD: int_const.h,v 1.2 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS32K_INT_CONST_H_
|
||||
#define _NS32K_INT_CONST_H_
|
||||
#define _NS32K_INT_CONST_H_
|
||||
|
||||
/*
|
||||
* 7.18.4 Macros for integer constants
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:23 kleink Exp $ */
|
||||
/* $NetBSD: int_fmtio.h,v 1.3 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS32K_INT_FMTIO_H_
|
||||
#define _NS32K_INT_FMTIO_H_
|
||||
#define _NS32K_INT_FMTIO_H_
|
||||
|
||||
/*
|
||||
* 7.8.1 Macros for format specifiers
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: int_limits.h,v 1.2 2001/04/26 16:25:23 kleink Exp $ */
|
||||
/* $NetBSD: int_limits.h,v 1.3 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS32K_INT_LIMITS_H_
|
||||
#define _NS32K_INT_LIMITS_H_
|
||||
#define _NS32K_INT_LIMITS_H_
|
||||
|
||||
/*
|
||||
* 7.18.2 Limits of specified-width integer types
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: int_mwgwtypes.h,v 1.2 2001/04/26 16:25:24 kleink Exp $ */
|
||||
/* $NetBSD: int_mwgwtypes.h,v 1.3 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS32K_INT_MWGWTYPES_H_
|
||||
#define _NS32K_INT_MWGWTYPES_H_
|
||||
#define _NS32K_INT_MWGWTYPES_H_
|
||||
|
||||
/*
|
||||
* 7.18.1 Integer types
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: jmpbuf.h,v 1.3 1994/10/26 08:24:30 cgd Exp $ */
|
||||
/* $NetBSD: jmpbuf.h,v 1.4 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1993 Philip A. Nelson.
|
||||
|
|
@ -35,19 +35,19 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_JMPBUF_H_
|
||||
#define _MACHINE_JMPBUF_H_
|
||||
#define _MACHINE_JMPBUF_H_
|
||||
|
||||
/* These are byte offsets into the jmp buffer. */
|
||||
|
||||
#define JMP_BUF_R3 0
|
||||
#define JMP_BUF_R4 4
|
||||
#define JMP_BUF_R5 8
|
||||
#define JMP_BUF_R6 12
|
||||
#define JMP_BUF_R7 16
|
||||
#define JMP_BUF_PC 20
|
||||
#define JMP_BUF_SP 24
|
||||
#define JMP_BUF_FP 28
|
||||
#define JMP_BUF_SB 32
|
||||
#define JMP_BUF_SIGMASK 36
|
||||
#define JMP_BUF_R3 0
|
||||
#define JMP_BUF_R4 4
|
||||
#define JMP_BUF_R5 8
|
||||
#define JMP_BUF_R6 12
|
||||
#define JMP_BUF_R7 16
|
||||
#define JMP_BUF_PC 20
|
||||
#define JMP_BUF_SP 24
|
||||
#define JMP_BUF_FP 28
|
||||
#define JMP_BUF_SB 32
|
||||
#define JMP_BUF_SIGMASK 36
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: kcore.h,v 1.3 1998/09/02 19:17:22 matthias Exp $ */
|
||||
/* $NetBSD: kcore.h,v 1.4 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Matthias Pfaller.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _PC532_KCORE_H_
|
||||
#define _PC532_KCORE_H_
|
||||
#define _PC532_KCORE_H_
|
||||
|
||||
typedef struct cpu_kcore_hdr {
|
||||
paddr_t ptd; /* Phys address of PTD */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: limits.h,v 1.13 2003/08/07 16:28:59 agc Exp $ */
|
||||
/* $NetBSD: limits.h,v 1.14 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 The Regents of the University of California.
|
||||
|
|
@ -48,7 +48,7 @@
|
|||
|
||||
#define USHRT_MAX 0xffff /* max value for an unsigned short */
|
||||
#define SHRT_MAX 0x7fff /* max value for a short */
|
||||
#define SHRT_MIN (-0x7fff-1) /* min value for a short */
|
||||
#define SHRT_MIN (-0x7fff-1) /* min value for a short */
|
||||
|
||||
#define UINT_MAX 0xffffffff /* max value for an unsigned int */
|
||||
#define INT_MAX 0x7fffffff /* max value for an int */
|
||||
|
|
@ -80,16 +80,16 @@
|
|||
#endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */
|
||||
|
||||
#if defined(_XOPEN_SOURCE) || defined(_NETBSD_SOURCE)
|
||||
#define LONG_BIT 32
|
||||
#define WORD_BIT 32
|
||||
#define LONG_BIT 32
|
||||
#define WORD_BIT 32
|
||||
|
||||
#define DBL_DIG 15
|
||||
#define DBL_MIN 2.2250738585072014E-308
|
||||
#define DBL_MAX 1.7976931348623157E+308
|
||||
#define DBL_DIG 15
|
||||
#define DBL_MIN 2.2250738585072014E-308
|
||||
#define DBL_MAX 1.7976931348623157E+308
|
||||
|
||||
#define FLT_DIG 6
|
||||
#define FLT_MAX 3.40282347E+38F
|
||||
#define FLT_MIN 1.17549435E-38F
|
||||
#define FLT_DIG 6
|
||||
#define FLT_MAX 3.40282347E+38F
|
||||
#define FLT_MIN 1.17549435E-38F
|
||||
#endif
|
||||
|
||||
#endif /* _MACHINE_LIMITS_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mcontext.h,v 1.3 2003/11/06 00:41:20 simonb Exp $ */
|
||||
/* $NetBSD: mcontext.h,v 1.4 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS32K_MCONTEXT_H_
|
||||
#define _NS32K_MCONTEXT_H_
|
||||
#define _NS32K_MCONTEXT_H_
|
||||
|
||||
/*
|
||||
* Layout of mcontext_t for the ns32k architecture. Lacking an SVR4
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: param.h,v 1.29 2004/01/23 03:54:54 simonb Exp $ */
|
||||
/* $NetBSD: param.h,v 1.30 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -42,7 +42,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_PARAM_H_
|
||||
#define _MACHINE_PARAM_H_
|
||||
#define _MACHINE_PARAM_H_
|
||||
|
||||
#ifdef _KERNEL
|
||||
#include <machine/cpu.h>
|
||||
|
|
@ -65,9 +65,9 @@
|
|||
* (within reasonable limits).
|
||||
*
|
||||
*/
|
||||
#define ALIGNBYTES (sizeof(int) - 1)
|
||||
#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES)
|
||||
#define ALIGNED_POINTER(p,t) 1
|
||||
#define ALIGNBYTES (sizeof(int) - 1)
|
||||
#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES)
|
||||
#define ALIGNED_POINTER(p,t) 1
|
||||
|
||||
#define PGSHIFT 12 /* LOG2(NBPG) */
|
||||
#define NBPG (1 << PGSHIFT) /* bytes/page */
|
||||
|
|
@ -79,16 +79,16 @@
|
|||
|
||||
#define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */
|
||||
#define DEV_BSIZE (1 << DEV_BSHIFT)
|
||||
#define BLKDEV_IOSIZE 4096 /* Was 2048 (pan) */
|
||||
#define BLKDEV_IOSIZE 4096 /* Was 2048 (pan) */
|
||||
#define MAXPHYS (64 * 1024) /* max raw I/O transfer size */
|
||||
|
||||
#define SSIZE 1 /* initial stack size/NBPG */
|
||||
#define SINCR 1 /* increment of stack/NBPG */
|
||||
#define UPAGES 2 /* pages of u-area */
|
||||
#define USPACE (UPAGES * NBPG) /* total size of u-area */
|
||||
#define USPACE (UPAGES * NBPG) /* total size of u-area */
|
||||
|
||||
#ifndef MSGBUFSIZE
|
||||
#define MSGBUFSIZE NBPG /* default message buffer size */
|
||||
#define MSGBUFSIZE NBPG /* default message buffer size */
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -153,18 +153,18 @@
|
|||
/*
|
||||
* Mach derived conversion macros
|
||||
*/
|
||||
#define ns532_round_pdr(x) ((((unsigned)(x)) + PDOFSET) & ~PDOFSET)
|
||||
#define ns532_trunc_pdr(x) ((unsigned)(x) & ~PDOFSET)
|
||||
#define ns532_btod(x) ((unsigned)(x) >> PDSHIFT)
|
||||
#define ns532_dtob(x) ((unsigned)(x) << PDSHIFT)
|
||||
#define ns532_round_page(x) ((((unsigned)(x)) + PGOFSET) & ~PGOFSET)
|
||||
#define ns532_trunc_page(x) ((unsigned)(x) & ~PGOFSET)
|
||||
#define ns532_btop(x) ((unsigned)(x) >> PGSHIFT)
|
||||
#define ns532_ptob(x) ((unsigned)(x) << PGSHIFT)
|
||||
#define ns532_round_pdr(x) ((((unsigned)(x)) + PDOFSET) & ~PDOFSET)
|
||||
#define ns532_trunc_pdr(x) ((unsigned)(x) & ~PDOFSET)
|
||||
#define ns532_btod(x) ((unsigned)(x) >> PDSHIFT)
|
||||
#define ns532_dtob(x) ((unsigned)(x) << PDSHIFT)
|
||||
#define ns532_round_page(x) ((((unsigned)(x)) + PGOFSET) & ~PGOFSET)
|
||||
#define ns532_trunc_page(x) ((unsigned)(x) & ~PGOFSET)
|
||||
#define ns532_btop(x) ((unsigned)(x) >> PGSHIFT)
|
||||
#define ns532_ptob(x) ((unsigned)(x) << PGSHIFT)
|
||||
|
||||
/* Macros to read and write from absolute addresses. */
|
||||
|
||||
#define WR_ADR(type,adr,val) (*((volatile type *)(adr))=(val))
|
||||
#define RD_ADR(type,adr) (*((volatile type *)(adr)))
|
||||
#define WR_ADR(type,adr,val) (*((volatile type *)(adr))=(val))
|
||||
#define RD_ADR(type,adr) (*((volatile type *)(adr)))
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pcb.h,v 1.12 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: pcb.h,v 1.13 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_PCB_H_
|
||||
#define _MACHINE_PCB_H_
|
||||
#define _MACHINE_PCB_H_
|
||||
|
||||
/*
|
||||
* PC 532 process control block
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pmap.h,v 1.38 2003/06/23 13:06:55 thorpej Exp $ */
|
||||
/* $NetBSD: pmap.h,v 1.39 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
*
|
||||
|
|
@ -141,9 +141,9 @@
|
|||
* the following defines identify the slots used as described above.
|
||||
*/
|
||||
|
||||
#define PDSLOT_PTE ((KERNBASE/NBPD)-1) /* 895: for recursive PDP map */
|
||||
#define PDSLOT_KERN (KERNBASE/NBPD) /* 896: start of kernel space */
|
||||
#define PDSLOT_APTE ((unsigned)1022) /* 1022: alternative recursive slot */
|
||||
#define PDSLOT_PTE ((KERNBASE/NBPD)-1) /* 895: for recursive PDP map */
|
||||
#define PDSLOT_KERN (KERNBASE/NBPD) /* 896: start of kernel space */
|
||||
#define PDSLOT_APTE ((unsigned)1022) /* 1022: alternative recursive slot */
|
||||
|
||||
/*
|
||||
* the following defines give the virtual addresses of various MMU
|
||||
|
|
@ -153,12 +153,12 @@
|
|||
* PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
|
||||
*/
|
||||
|
||||
#define PTE_BASE ((pt_entry_t *) (PDSLOT_PTE * NBPD) )
|
||||
#define APTE_BASE ((pt_entry_t *) (PDSLOT_APTE * NBPD) )
|
||||
#define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * PAGE_SIZE)))
|
||||
#define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * PAGE_SIZE)))
|
||||
#define PDP_PDE (PDP_BASE + PDSLOT_PTE)
|
||||
#define APDP_PDE (PDP_BASE + PDSLOT_APTE)
|
||||
#define PTE_BASE ((pt_entry_t *) (PDSLOT_PTE * NBPD) )
|
||||
#define APTE_BASE ((pt_entry_t *) (PDSLOT_APTE * NBPD) )
|
||||
#define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * PAGE_SIZE)))
|
||||
#define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * PAGE_SIZE)))
|
||||
#define PDP_PDE (PDP_BASE + PDSLOT_PTE)
|
||||
#define APDP_PDE (PDP_BASE + PDSLOT_APTE)
|
||||
|
||||
/*
|
||||
* XXXCDC: tmp xlate from old names:
|
||||
|
|
@ -175,10 +175,10 @@
|
|||
*/
|
||||
|
||||
#ifndef NKPTP
|
||||
#define NKPTP 4 /* 16MB to start */
|
||||
#define NKPTP 4 /* 16MB to start */
|
||||
#endif
|
||||
#define NKPTP_MIN 4 /* smallest value we allow */
|
||||
#define NKPTP_MAX (1024 - (KERNBASE/NBPD) - 2)
|
||||
#define NKPTP_MIN 4 /* smallest value we allow */
|
||||
#define NKPTP_MAX (1024 - (KERNBASE/NBPD) - 2)
|
||||
/* largest value (-2 for APTP and i/o space) */
|
||||
|
||||
/*
|
||||
|
|
@ -197,17 +197,17 @@
|
|||
* NBPD == number of bytes a PTP can map (4MB)
|
||||
*/
|
||||
|
||||
#define ptp_i2o(I) ((I) * PAGE_SIZE) /* index => offset */
|
||||
#define ptp_o2i(O) ((O) / PAGE_SIZE) /* offset => index */
|
||||
#define ptp_i2v(I) ((I) * NBPD) /* index => VA */
|
||||
#define ptp_v2i(V) ((V) / NBPD) /* VA => index (same as pdei) */
|
||||
#define ptp_i2o(I) ((I) * PAGE_SIZE) /* index => offset */
|
||||
#define ptp_o2i(O) ((O) / PAGE_SIZE) /* offset => index */
|
||||
#define ptp_i2v(I) ((I) * NBPD) /* index => VA */
|
||||
#define ptp_v2i(V) ((V) / NBPD) /* VA => index (same as pdei) */
|
||||
|
||||
/*
|
||||
* PG_AVAIL usage: we make use of the ignored bits of the PTE
|
||||
*/
|
||||
|
||||
#define PG_W PG_AVAIL1 /* "wired" mapping */
|
||||
#define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */
|
||||
#define PG_W PG_AVAIL1 /* "wired" mapping */
|
||||
#define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */
|
||||
/* PG_AVAIL3 not used */
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
|
@ -281,7 +281,7 @@ struct pv_page_info {
|
|||
* (note: won't work on systems where NPBG isn't a constant)
|
||||
*/
|
||||
|
||||
#define PVE_PER_PVPAGE ((PAGE_SIZE - sizeof(struct pv_page_info)) / \
|
||||
#define PVE_PER_PVPAGE ((PAGE_SIZE - sizeof(struct pv_page_info)) / \
|
||||
sizeof(struct pv_entry))
|
||||
|
||||
/*
|
||||
|
|
@ -298,7 +298,7 @@ struct pv_page {
|
|||
* flush TLB. if we have more than PMAP_RR_MAX then we stop recording.
|
||||
*/
|
||||
|
||||
#define PMAP_RR_MAX 16 /* max of 16 pages (64K) */
|
||||
#define PMAP_RR_MAX 16 /* max of 16 pages (64K) */
|
||||
|
||||
struct pmap_remove_record {
|
||||
int prr_npages;
|
||||
|
|
@ -324,14 +324,14 @@ extern int nkpde; /* current # of PDEs for kernel */
|
|||
#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
|
||||
#define pmap_update(pmap) /* nothing (yet) */
|
||||
|
||||
#define pmap_clear_modify(pg) pmap_change_attrs(pg, 0, PG_M)
|
||||
#define pmap_clear_reference(pg) pmap_change_attrs(pg, 0, PG_U)
|
||||
#define pmap_copy(DP,SP,D,L,S)
|
||||
#define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
|
||||
#define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
|
||||
#define pmap_move(DP,SP,D,L,S)
|
||||
#define pmap_phys_address(ppn) ns532_ptob(ppn)
|
||||
#define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
|
||||
#define pmap_clear_modify(pg) pmap_change_attrs(pg, 0, PG_M)
|
||||
#define pmap_clear_reference(pg) pmap_change_attrs(pg, 0, PG_U)
|
||||
#define pmap_copy(DP,SP,D,L,S)
|
||||
#define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
|
||||
#define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
|
||||
#define pmap_move(DP,SP,D,L,S)
|
||||
#define pmap_phys_address(ppn) ns532_ptob(ppn)
|
||||
#define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -353,7 +353,7 @@ void pmap_write_protect __P((struct pmap *, vaddr_t,
|
|||
|
||||
vaddr_t reserve_dumppages __P((vaddr_t)); /* XXX: not a pmap fn */
|
||||
|
||||
#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
|
||||
#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
|
||||
|
||||
/*
|
||||
* Do idle page zero'ing uncached to avoid polluting the cache.
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: proc.h,v 1.7 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: proc.h,v 1.8 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1991 Regents of the University of California.
|
||||
|
|
@ -32,7 +32,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_PROC_H_
|
||||
#define _NS532_PROC_H_
|
||||
#define _NS532_PROC_H_
|
||||
|
||||
/*
|
||||
* Machine-dependent part of the lwp structure for the pc532.
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: psl.h,v 1.28 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: psl.h,v 1.29 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_PSL_H_
|
||||
#define _NS532_PSL_H_
|
||||
#define _NS532_PSL_H_
|
||||
|
||||
/*
|
||||
* 32532 processor status longword.
|
||||
|
|
@ -48,9 +48,9 @@
|
|||
#define PSL_Z 0x00000040 /* zero bit */
|
||||
#define PSL_N 0x00000080 /* negative bit */
|
||||
|
||||
#define PSL_USER 0x00000100 /* User mode bit */
|
||||
#define PSL_US 0x00000200 /* User stack mode bit */
|
||||
#define PSL_P 0x00000400 /* Prevent TRC trap */
|
||||
#define PSL_USER 0x00000100 /* User mode bit */
|
||||
#define PSL_US 0x00000200 /* User stack mode bit */
|
||||
#define PSL_P 0x00000400 /* Prevent TRC trap */
|
||||
#define PSL_I 0x00000800 /* interrupt enable bit */
|
||||
|
||||
#define PSL_USERSET (PSL_USER | PSL_US | PSL_I)
|
||||
|
|
@ -58,6 +58,6 @@
|
|||
#define USERMODE(psr) (((psr) & PSL_USER) == PSL_USER)
|
||||
|
||||
/* The PSR versions ... */
|
||||
#define PSR_USR PSL_USER
|
||||
#define PSR_USR PSL_USER
|
||||
|
||||
#endif /* _NS532_PSL_H_ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pte.h,v 1.4 2003/04/02 07:36:02 thorpej Exp $ */
|
||||
/* $NetBSD: pte.h,v 1.5 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
*
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_PTE_H_
|
||||
#define _NS532_PTE_H_
|
||||
#define _NS532_PTE_H_
|
||||
|
||||
/*
|
||||
* ns32532 MMU hardware structure:
|
||||
|
|
@ -159,9 +159,9 @@ typedef u_int32_t pt_entry_t; /* PTE */
|
|||
#define PG_N 0x00000040 /* non-cacheable */
|
||||
#define PG_U 0x00000080 /* has been used */
|
||||
#define PG_M 0x00000100 /* has been modified */
|
||||
#define PG_AVAIL1 0x00000200 /* ignored by hardware */
|
||||
#define PG_AVAIL2 0x00000400 /* ignored by hardware */
|
||||
#define PG_AVAIL3 0x00000800 /* ignored by hardware */
|
||||
#define PG_AVAIL1 0x00000200 /* ignored by hardware */
|
||||
#define PG_AVAIL2 0x00000400 /* ignored by hardware */
|
||||
#define PG_AVAIL3 0x00000800 /* ignored by hardware */
|
||||
#define PG_FRAME 0xfffff000 /* page frame mask */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: reg.h,v 1.12 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: reg.h,v 1.13 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_REG_H_
|
||||
#define _MACHINE_REG_H_
|
||||
#define _MACHINE_REG_H_
|
||||
|
||||
/*
|
||||
* Location of the users' stored
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: signal.h,v 1.11 2003/11/06 00:41:20 simonb Exp $ */
|
||||
/* $NetBSD: signal.h,v 1.12 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1982, 1986, 1989, 1991 Regents of the University of California.
|
||||
|
|
@ -32,17 +32,17 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_SIGNAL_H_
|
||||
#define _MACHINE_SIGNAL_H_
|
||||
#define _MACHINE_SIGNAL_H_
|
||||
|
||||
#include <sys/featuretest.h>
|
||||
|
||||
typedef int sig_atomic_t;
|
||||
|
||||
#define __HAVE_SIGINFO
|
||||
#define __HAVE_SIGINFO
|
||||
#ifdef COMPAT_16
|
||||
#define SIGTRAMP_VALID(vers) ((unsigned)(vers) <= 2)
|
||||
#define SIGTRAMP_VALID(vers) ((unsigned)(vers) <= 2)
|
||||
#else
|
||||
#define SIGTRAMP_VALID(vers) ((vers) == 2)
|
||||
#define SIGTRAMP_VALID(vers) ((vers) == 2)
|
||||
#endif
|
||||
|
||||
#if defined(_NETBSD_SOURCE)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: stdarg.h,v 1.18 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: stdarg.h,v 1.19 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1991, 1993
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
typedef _BSD_VA_LIST_ va_list;
|
||||
|
||||
#ifdef __lint__
|
||||
#define __builtin_next_arg(t) ((t) ? 0 : 0)
|
||||
#define __builtin_next_arg(t) ((t) ? 0 : 0)
|
||||
#endif
|
||||
|
||||
#define __va_size(type) \
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: trap.h,v 1.5 1999/01/15 07:42:48 matthias Exp $ */
|
||||
/* $NetBSD: trap.h,v 1.6 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
|
@ -35,60 +35,60 @@
|
|||
*/
|
||||
|
||||
#ifndef _MACHINE_TRAP_H_
|
||||
#define _MACHINE_TRAP_H_
|
||||
#define _MACHINE_TRAP_H_
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
#define T_NVI 0 /* non-vectored interrupt */
|
||||
#define T_NMI 1 /* non-maskable interrupt */
|
||||
#define T_ABT 2 /* abort */
|
||||
#define T_SLAVE 3 /* coprocessor trap */
|
||||
#define T_ILL 4 /* illegal operation in user mode */
|
||||
#define T_SVC 5 /* supervisor call */
|
||||
#define T_DVZ 6 /* divide by zero */
|
||||
#define T_FLG 7 /* flag instruction */
|
||||
#define T_BPT 8 /* breakpoint instruction */
|
||||
#define T_TRC 9 /* trace trap */
|
||||
#define T_UND 10 /* undefined instruction */
|
||||
#define T_RBE 11 /* restartable bus error */
|
||||
#define T_NBE 12 /* non-restartable bus error */
|
||||
#define T_OVF 13 /* integer overflow trap */
|
||||
#define T_DBG 14 /* debug trap */
|
||||
#define T_RESERVED 15 /* reserved */
|
||||
#define T_NVI 0 /* non-vectored interrupt */
|
||||
#define T_NMI 1 /* non-maskable interrupt */
|
||||
#define T_ABT 2 /* abort */
|
||||
#define T_SLAVE 3 /* coprocessor trap */
|
||||
#define T_ILL 4 /* illegal operation in user mode */
|
||||
#define T_SVC 5 /* supervisor call */
|
||||
#define T_DVZ 6 /* divide by zero */
|
||||
#define T_FLG 7 /* flag instruction */
|
||||
#define T_BPT 8 /* breakpoint instruction */
|
||||
#define T_TRC 9 /* trace trap */
|
||||
#define T_UND 10 /* undefined instruction */
|
||||
#define T_RBE 11 /* restartable bus error */
|
||||
#define T_NBE 12 /* non-restartable bus error */
|
||||
#define T_OVF 13 /* integer overflow trap */
|
||||
#define T_DBG 14 /* debug trap */
|
||||
#define T_RESERVED 15 /* reserved */
|
||||
|
||||
/* Not a real trap. */
|
||||
#define T_WATCHPOINT 17 /* watchpoint */
|
||||
#define T_WATCHPOINT 17 /* watchpoint */
|
||||
|
||||
/* To allow for preemption */
|
||||
#define T_AST 18 /* asynchronous system trap */
|
||||
#define T_AST 18 /* asynchronous system trap */
|
||||
|
||||
/* To include system/user mode in the trap information. */
|
||||
#define T_USER 32
|
||||
#define T_USER 32
|
||||
|
||||
#define PARRDU_PHYS 0x28000040 /* Read parity error */
|
||||
#define PARCLU_PHYS 0x28000050 /* Clear parity error */
|
||||
#define PARRDU_PHYS 0x28000040 /* Read parity error */
|
||||
#define PARCLU_PHYS 0x28000050 /* Clear parity error */
|
||||
|
||||
#define PARRDU_VM 0xFFC80040 /* Read parity error */
|
||||
#define PARCLU_VM 0xFFC80050 /* Clear parity error */
|
||||
#define PARRDU_VM 0xFFC80040 /* Read parity error */
|
||||
#define PARCLU_VM 0xFFC80050 /* Clear parity error */
|
||||
|
||||
/* memory management status register bits and meanings. */
|
||||
#define MSR_STT 0xf0 /* CPU status. */
|
||||
#define STT_SEQ_INS 0x80 /* Sequential instruction fetch */
|
||||
#define STT_NSQ_INS 0x90 /* Non-sequential instruction fetch */
|
||||
#define STT_DATA 0xa0 /* Data transfer */
|
||||
#define STT_RMW 0xb0 /* Read/modify/write */
|
||||
#define STT_REA 0xc0 /* Read for effective address */
|
||||
#define MSR_STT 0xf0 /* CPU status. */
|
||||
#define STT_SEQ_INS 0x80 /* Sequential instruction fetch */
|
||||
#define STT_NSQ_INS 0x90 /* Non-sequential instruction fetch */
|
||||
#define STT_DATA 0xa0 /* Data transfer */
|
||||
#define STT_RMW 0xb0 /* Read/modify/write */
|
||||
#define STT_REA 0xc0 /* Read for effective address */
|
||||
|
||||
#define MSR_UST 0x08 /* User/supervisor */
|
||||
#define UST_USER 0x08 /* User mode is 1. Super = 0 */
|
||||
#define MSR_UST 0x08 /* User/supervisor */
|
||||
#define UST_USER 0x08 /* User mode is 1. Super = 0 */
|
||||
|
||||
#define MSR_DDT 0x04 /* Data Direction */
|
||||
#define DDT_WRITE 0x04 /* Write is 1. Read is 0 */
|
||||
#define MSR_DDT 0x04 /* Data Direction */
|
||||
#define DDT_WRITE 0x04 /* Write is 1. Read is 0 */
|
||||
|
||||
#define MSR_TEX 0x03 /* Exception kind. */
|
||||
#define TEX_PTE1 0x01 /* First level PTE invalid */
|
||||
#define TEX_PTE2 0x02 /* Second level PTE invalid */
|
||||
#define TEX_PROT 0x03 /* Protection violation */
|
||||
#define MSR_TEX 0x03 /* Exception kind. */
|
||||
#define TEX_PTE1 0x01 /* First level PTE invalid */
|
||||
#define TEX_PTE2 0x02 /* Second level PTE invalid */
|
||||
#define TEX_PROT 0x03 /* Protection violation */
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vmparam.h,v 1.29 2003/08/07 16:29:00 agc Exp $ */
|
||||
/* $NetBSD: vmparam.h,v 1.30 2004/01/23 04:03:38 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#ifndef _NS532_VMPARAM_H_
|
||||
#define _NS532_VMPARAM_H_
|
||||
#define _NS532_VMPARAM_H_
|
||||
|
||||
/*
|
||||
* Machine dependent constants for 532.
|
||||
|
|
@ -64,7 +64,7 @@
|
|||
/*
|
||||
* INTSTACK is a temporary stack for the idle process and cpu_exit.
|
||||
*/
|
||||
#define INTSTACK (0xffc00000 + PAGE_SIZE - 4)
|
||||
#define INTSTACK (0xffc00000 + PAGE_SIZE - 4)
|
||||
|
||||
/*
|
||||
* Virtual memory related constants, all in bytes
|
||||
|
|
@ -87,7 +87,7 @@
|
|||
* Size of shared memory map
|
||||
*/
|
||||
#ifndef SHMMAXPGS
|
||||
#define SHMMAXPGS 1024
|
||||
#define SHMMAXPGS 1024
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -95,7 +95,7 @@
|
|||
* One page is enough to handle 4Mb of simultaneous raw IO operations.
|
||||
*/
|
||||
#ifndef USRIOSIZE
|
||||
#define USRIOSIZE (1 * NPTEPG) /* 4mb */
|
||||
#define USRIOSIZE (1 * NPTEPG) /* 4mb */
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -103,28 +103,28 @@
|
|||
*/
|
||||
|
||||
/* user/kernel map constants */
|
||||
#define VM_MIN_ADDRESS ((vaddr_t)0)
|
||||
#define VM_MIN_ADDRESS ((vaddr_t)0)
|
||||
/* (PDSLOT_PTE << PDSHIFT) */
|
||||
#define VM_MAXUSER_ADDRESS ((vaddr_t)0xDFC00000)
|
||||
#define VM_MAXUSER_ADDRESS ((vaddr_t)0xDFC00000)
|
||||
/* (PDSLOT_PTE << PDSHIFT) + (PDSLOT_PTE << PGSHIFT) */
|
||||
#define VM_MAX_ADDRESS ((vaddr_t)0xDFFDF000)
|
||||
#define VM_MAX_ADDRESS ((vaddr_t)0xDFFDF000)
|
||||
/* PDSLOT_KERN << PDSHIFT */
|
||||
#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xE0000000)
|
||||
#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xE0000000)
|
||||
/* PDSLOT_APTE << PDSHIFT */
|
||||
#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xFF800000)
|
||||
#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xFF800000)
|
||||
|
||||
/* XXX max. amount of KVM to be used by buffers. */
|
||||
#ifndef VM_MAX_KERNEL_BUF
|
||||
#define VM_MAX_KERNEL_BUF \
|
||||
#define VM_MAX_KERNEL_BUF \
|
||||
((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 1024 * 7 / 10 * 1024)
|
||||
#endif
|
||||
|
||||
/* virtual sizes (bytes) for various kernel submaps */
|
||||
#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
|
||||
#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
|
||||
|
||||
#define VM_PHYSSEG_MAX 1 /* we have contiguous memory */
|
||||
#define VM_PHYSSEG_STRAT VM_PSTRAT_RANDOM
|
||||
#define VM_PHYSSEG_NOADD /* can't add RAM after vm_mem_init */
|
||||
#define VM_PHYSSEG_MAX 1 /* we have contiguous memory */
|
||||
#define VM_PHYSSEG_STRAT VM_PSTRAT_RANDOM
|
||||
#define VM_PHYSSEG_NOADD /* can't add RAM after vm_mem_init */
|
||||
|
||||
#define VM_NFREELIST 1
|
||||
#define VM_FREELIST_DEFAULT 0
|
||||
|
|
|
|||
Loading…
Reference in New Issue