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s/inerrupt/interrupt/ and s/intrrupt/interrupt/ in comments.

This commit is contained in:
andvar 2022-09-25 12:41:46 +00:00
parent a132a01c5c
commit 9cc225e6d6
4 changed files with 12 additions and 12 deletions
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8
sys/arch/hpcmips/isa/isa_machdep.c
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@ -1,4 +1,4 @@
/* $NetBSD: isa_machdep.c,v 1.41 2021/08/07 16:18:54 thorpej Exp $ */
/* $NetBSD: isa_machdep.c,v 1.42 2022/09/25 12:41:46 andvar Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.41 2021/08/07 16:18:54 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.42 2022/09/25 12:41:46 andvar Exp $");
#include "opt_vr41xx.h"
@ -71,7 +71,7 @@ int vrisa_debug = VRISADEBUG_CONF;
#endif /* VRISADEBUG */
/*
* intrrupt no. encoding:
* interrupt no. encoding:
*
* 0x0000000f ISA IRQ#
* 0x00ff0000 GPIO port#
@ -90,7 +90,7 @@ void vrisabattach(device_t, device_t, void *);
struct vrisab_softc {
hpcio_chip_t sc_hc;
int sc_intr_map[INTR_NIRQS]; /* ISA <-> GIU inerrupt line mapping */
int sc_intr_map[INTR_NIRQS]; /* ISA <-> GIU interrupt line mapping */
struct hpcmips_isa_chipset sc_isa_ic;
};

6
sys/arch/mips/alchemy/dev/aupcmcia.c
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@ -1,4 +1,4 @@
/* $NetBSD: aupcmcia.c,v 1.12 2021/08/07 16:18:58 thorpej Exp $ */
/* $NetBSD: aupcmcia.c,v 1.13 2022/09/25 12:41:46 andvar Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
@ -35,7 +35,7 @@
/* #include "pci.h" */
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: aupcmcia.c,v 1.12 2021/08/07 16:18:58 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: aupcmcia.c,v 1.13 2022/09/25 12:41:46 andvar Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -374,7 +374,7 @@ aupcm_event_thread(void *arg)
* XXX: Currently, the au_icu.c lacks support
* for edge-triggered interrupts. So we
* cannot really use the status change
* inerrupts. For now we poll (once per sec).
* interrupts. For now we poll (once per sec).
* FYI, Linux does it this way, and they *do*
* have support for edge triggered interrupts.
* Go figure.

4
sys/dev/i2c/sensirion_voc_algorithm.h
View File

@ -1,5 +1,5 @@
/*
* $NetBSD: sensirion_voc_algorithm.h,v 1.1 2021/10/14 13:54:46 brad Exp $
* $NetBSD: sensirion_voc_algorithm.h,v 1.2 2022/09/25 12:41:46 andvar Exp $
*/
/*
@ -140,7 +140,7 @@ void VocAlgorithm_get_states(VocAlgorithmParams* params, int32_t* state0,
/**
* Set previously retrieved algorithm states to resume operation after a short
* interruption, skipping initial learning phase. This feature should not be
* used after inerruptions of more than 10 minutes. Call this once after
* used after interruptions of more than 10 minutes. Call this once after
* VocAlgorithm_init() and the optional VocAlgorithm_set_tuning_parameters(), if
* desired. Otherwise, the algorithm will start with initial learning phase.
* @param params Pointer to the VocAlgorithmParams struct

6
sys/dev/pci/if_bce.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_bce.c,v 1.61 2022/09/24 18:12:42 thorpej Exp $ */
/* $NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $ */
/*
* Copyright (c) 2003 Clifford Wright. All rights reserved.
@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.61 2022/09/24 18:12:42 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -884,7 +884,7 @@ bce_init(struct ifnet *ifp)
/* Cancel any pending I/O. */
bce_stop(ifp, 0);
/* enable pci inerrupts, bursts, and prefetch */
/* enable pci interrupts, bursts, and prefetch */
/* remap the pci registers to the Sonics config registers */