PR/32238: Ryo Shimizu: Add support for Promise SATA300TX4 SATA Controller
(PDC40718)
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christos
parent
826e1b36bc
commit
99b3a7df46
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@ -1,4 +1,4 @@
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$NetBSD: pcidevs,v 1.738 2005/11/27 10:17:26 jdolecek Exp $
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$NetBSD: pcidevs,v 1.739 2005/12/04 17:39:03 christos Exp $
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/*
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* Copyright (c) 1995, 1996 Christopher G. Demetriou
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@ -2463,6 +2463,8 @@ product PROMISE PDC20618 0x6626 PDC20618 dual Ultra/133 IDE controller
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product PROMISE PDC20619 0x6629 PDC20619 dual Ultra/133 IDE controller
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product PROMISE PDC20620 0x6620 PDC20620 dual Ultra/133 IDE controller
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product PROMISE PDC20621 0x6621 PDC20621 dual Ultra/133 IDE controller
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product PROMISE PDC40718 0x3d17 PDC40718 SATA/300 IDE controller
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product PROMISE PDC40719 0x3515 PDC40719 SATA/300 IDE controller
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/* QLogic products */
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product QLOGIC ISP1020 0x1020 ISP1020
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@ -1,4 +1,4 @@
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/* $NetBSD: pdcsata.c,v 1.3 2005/02/27 00:27:33 perry Exp $ */
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/* $NetBSD: pdcsata.c,v 1.4 2005/12/04 17:39:03 christos Exp $ */
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/*
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* Copyright (c) 2004, Manuel Bouyer.
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@ -38,8 +38,12 @@
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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#include <dev/ata/atareg.h>
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#include <dev/ata/satavar.h>
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#include <dev/ata/satareg.h>
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#define PDC203xx_NCHANNELS 4
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#define PDC40718_NCHANNELS 4
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#define PDC203xx_BAR_IDEREGS 0x1c /* BAR where the IDE registers are mapped */
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@ -51,6 +55,11 @@ static int pdc203xx_dma_init(void *, int, int, void *, size_t, int);
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static void pdc203xx_dma_start(void *,int ,int);
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static int pdc203xx_dma_finish(void *, int, int, int);
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/* PDC205xx, PDC405xx and PDC407xx. but tested only pdc40718 */
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static int pdc205xx_pci_intr(void *);
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static void pdc205xx_do_reset(struct ata_channel *, int);
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static void pdc205xx_drv_probe(struct ata_channel *);
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static int pdcsata_match(struct device *, struct cfdata *, void *);
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static void pdcsata_attach(struct device *, struct device *, void *);
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@ -98,6 +107,16 @@ static const struct pciide_product_desc pciide_pdcsata_products[] = {
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"Promise PDC20379 SATA150 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC40718,
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0,
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"Promise PDC40718 SATA300 controller",
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pdcsata_chip_map,
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},
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{ PCI_PRODUCT_PROMISE_PDC40719,
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0,
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"Promise PDC40719 SATA300 controller",
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pdcsata_chip_map,
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},
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{ 0,
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0,
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NULL,
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@ -148,8 +167,28 @@ pdcsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, intrhandle);
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sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
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intrhandle, IPL_BIO, pdc203xx_pci_intr, sc);
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switch (sc->sc_pp->ide_product) {
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case PCI_PRODUCT_PROMISE_PDC20318:
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case PCI_PRODUCT_PROMISE_PDC20319:
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case PCI_PRODUCT_PROMISE_PDC20371:
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case PCI_PRODUCT_PROMISE_PDC20375:
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case PCI_PRODUCT_PROMISE_PDC20376:
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case PCI_PRODUCT_PROMISE_PDC20377:
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case PCI_PRODUCT_PROMISE_PDC20378:
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case PCI_PRODUCT_PROMISE_PDC20379:
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default:
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sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
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intrhandle, IPL_BIO, pdc203xx_pci_intr, sc);
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break;
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case PCI_PRODUCT_PROMISE_PDC40718:
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case PCI_PRODUCT_PROMISE_PDC40719:
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sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
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intrhandle, IPL_BIO, pdc205xx_pci_intr, sc);
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break;
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}
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if (sc->sc_pci_ih == NULL) {
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aprint_error("%s: couldn't establish native-PCI interrupt",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
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@ -199,10 +238,35 @@ pdcsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
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sc->sc_wdcdev.sc_atac.atac_set_modes = pdc203xx_setup_channel;
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sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x06c, 0x00ff0033);
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sc->sc_wdcdev.sc_atac.atac_nchannels =
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(bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x48) & 0x02) ?
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PDC203xx_NCHANNELS : 3;
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switch (sc->sc_pp->ide_product) {
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case PCI_PRODUCT_PROMISE_PDC20318:
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case PCI_PRODUCT_PROMISE_PDC20319:
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case PCI_PRODUCT_PROMISE_PDC20371:
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case PCI_PRODUCT_PROMISE_PDC20375:
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case PCI_PRODUCT_PROMISE_PDC20376:
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case PCI_PRODUCT_PROMISE_PDC20377:
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case PCI_PRODUCT_PROMISE_PDC20378:
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case PCI_PRODUCT_PROMISE_PDC20379:
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default:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x6c, 0x00ff0033);
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sc->sc_wdcdev.sc_atac.atac_nchannels =
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(bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x48) & 0x02) ?
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PDC203xx_NCHANNELS : 3;
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break;
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case PCI_PRODUCT_PROMISE_PDC40718:
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case PCI_PRODUCT_PROMISE_PDC40719:
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60, 0x00ff00ff);
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sc->sc_wdcdev.sc_atac.atac_nchannels = PDC40718_NCHANNELS;
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sc->sc_wdcdev.reset = pdc205xx_do_reset;
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sc->sc_wdcdev.sc_atac.atac_probe = pdc205xx_drv_probe;
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break;
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}
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wdc_allocate_regs(&sc->sc_wdcdev);
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sc->sc_wdcdev.dma_arg = sc;
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@ -337,6 +401,38 @@ pdc203xx_pci_intr(void *arg)
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return rv;
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}
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static int
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pdc205xx_pci_intr(void *arg)
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{
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struct pciide_softc *sc = arg;
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struct pciide_channel *cp;
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struct ata_channel *wdc_cp;
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int i, rv, crv;
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u_int32_t scr, status;
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rv = 0;
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scr = bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x40);
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x40, scr & 0x0000ffff);
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status = bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60);
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bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 0x60, status & 0x000000ff);
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for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
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cp = &sc->pciide_channels[i];
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wdc_cp = &cp->ata_channel;
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if (scr & (1 << (i + 1))) {
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crv = wdcintr(wdc_cp);
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if (crv == 0) {
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printf("%s:%d: bogus intr (reg 0x%x)\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
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i, scr);
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} else
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rv = 1;
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}
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}
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return rv;
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}
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static void
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pdc203xx_irqack(struct ata_channel *chp)
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{
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@ -397,3 +493,125 @@ pdc203xx_dma_finish(void *v, int channel, int drive, int force)
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return 0;
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}
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#define PDC205_REGADDR(base,ch) ((base)+((ch)<<8))
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#define PDC205_SSTATUS(ch) PDC205_REGADDR(0x400,ch)
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#define PDC205_SERROR(ch) PDC205_REGADDR(0x404,ch)
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#define PDC205_SCONTROL(ch) PDC205_REGADDR(0x408,ch)
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#define PDC205_MULTIPLIER(ch) PDC205_REGADDR(0x4e8,ch)
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#define SCONTROL_WRITE(sc,channel,scontrol) \
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bus_space_write_4((sc)->sc_ba5_st, (sc)->sc_ba5_sh, \
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PDC205_SCONTROL(channel), scontrol)
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#define SSTATUS_READ(sc,channel) \
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bus_space_read_4((sc)->sc_ba5_st, (sc)->sc_ba5_sh, \
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PDC205_SSTATUS(channel))
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static void
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pdc205xx_do_reset(struct ata_channel *chp, int poll)
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{
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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u_int32_t scontrol;
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wdc_do_reset(chp, poll);
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/* reset SATA */
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scontrol = SControl_DET_INIT | SControl_SPD_ANY | SControl_IPM_NONE;
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SCONTROL_WRITE(sc, chp->ch_channel, scontrol);
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delay(50*1000);
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scontrol &= ~SControl_DET_INIT;
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SCONTROL_WRITE(sc, chp->ch_channel, scontrol);
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delay(50*1000);
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}
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static void
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pdc205xx_drv_probe(struct ata_channel *chp)
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{
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
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u_int32_t scontrol, sstatus;
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u_int16_t scnt, sn, cl, ch;
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int i, s;
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/* XXX This should be done by other code. */
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for (i = 0; i < 2; i++) {
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chp->ch_drive[i].chnl_softc = chp;
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chp->ch_drive[i].drive = i;
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}
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SCONTROL_WRITE(sc, chp->ch_channel, 0);
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delay(50*1000);
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scontrol = SControl_DET_INIT | SControl_SPD_ANY | SControl_IPM_NONE;
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SCONTROL_WRITE(sc,chp->ch_channel,scontrol);
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delay(50*1000);
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scontrol &= ~SControl_DET_INIT;
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SCONTROL_WRITE(sc,chp->ch_channel,scontrol);
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delay(50*1000);
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sstatus = SSTATUS_READ(sc,chp->ch_channel);
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switch (sstatus & SStatus_DET_mask) {
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case SStatus_DET_NODEV:
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/* No Device; be silent. */
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break;
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case SStatus_DET_DEV_NE:
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aprint_error("%s: port %d: device connected, but "
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"communication not established\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel);
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break;
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case SStatus_DET_OFFLINE:
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aprint_error("%s: port %d: PHY offline\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel);
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break;
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case SStatus_DET_DEV:
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bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
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WDSD_IBM);
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delay(10); /* 400ns delay */
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scnt = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_seccnt], 0);
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sn = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_sector], 0);
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cl = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_cyl_lo], 0);
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ch = bus_space_read_2(wdr->cmd_iot,
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wdr->cmd_iohs[wd_cyl_hi], 0);
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#if 0
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printf("%s: port %d: scnt=0x%x sn=0x%x cl=0x%x ch=0x%x\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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scnt, sn, cl, ch);
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#endif
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/*
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* scnt and sn are supposed to be 0x1 for ATAPI, but in some
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* cases we get wrong values here, so ignore it.
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*/
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s = splbio();
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if (cl == 0x14 && ch == 0xeb)
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chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
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else
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chp->ch_drive[0].drive_flags |= DRIVE_ATA;
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splx(s);
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#if 0
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aprint_normal("%s: port %d: device present, speed: %s\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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sata_speed(sstatus));
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#endif
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break;
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default:
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aprint_error("%s: port %d: unknown SStatus: 0x%08x\n",
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel,
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sstatus);
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}
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}
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