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Add the brutal hack that allows us to limp along using the read/write 

cache line allocation policy on XScale CPUs: in pmap_enter(), if the
pmap is the kernel pmap, clear the X-bit in the PTE, thus disabling
read/write-allocate for managed kernel mappings.

Yes, this is ugly.  But it makes userland code run with r/w-allocate,
which is a huge improvement on systems with low core memory performance.
This commit is contained in:
thorpej 2002-08-13 03:36:30 +00:00
parent 17c9690153
commit 98d6ec0b89
1 changed files with 13 additions and 2 deletions
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15
sys/arch/arm/arm32/pmap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.108 2002/08/10 00:48:35 thorpej Exp $ */ /* $NetBSD: pmap.c,v 1.109 2002/08/13 03:36:30 thorpej Exp $ */
/* /*
* Copyright (c) 2002 Wasabi Systems, Inc. * Copyright (c) 2002 Wasabi Systems, Inc.
@ -143,7 +143,7 @@
#include <machine/param.h> #include <machine/param.h>
#include <arm/arm32/katelib.h> #include <arm/arm32/katelib.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.108 2002/08/10 00:48:35 thorpej Exp $"); __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.109 2002/08/13 03:36:30 thorpej Exp $");
#ifdef PMAP_DEBUG #ifdef PMAP_DEBUG
#define PDEBUG(_lev_,_stat_) \ #define PDEBUG(_lev_,_stat_) \
if (pmap_debug_level >= (_lev_)) \ if (pmap_debug_level >= (_lev_)) \
@ -2730,6 +2730,17 @@ pmap_enter(struct pmap *pmap, vaddr_t va, paddr_t pa, vm_prot_t prot,
npte |= L2_TYPE_INV; npte |= L2_TYPE_INV;
} }
#if ARM_MMU_XSCALE == 1 && defined(XSCALE_CACHE_READ_WRITE_ALLOCATE)
#if ARM_NMMUS > 1
# error "XXX Unable to use read/write-allocate and configure non-XScale"
#endif
/*
* XXX BRUTAL HACK! This allows us to limp along with
* XXX the read/write-allocate cache mode.
*/
if (pmap == pmap_kernel())
npte &= ~L2_XSCALE_T_TEX(TEX_XSCALE_X);
#endif
ptes[arm_btop(va)] = npte; ptes[arm_btop(va)] = npte;
if (pg != NULL) { if (pg != NULL) {