To reduce differences between ath(4)'s PCI attachment and its CardBus
attachment, delete several unnecessary #includes, re-order subroutines, move around line breaks, change to different names for the same constant, et cetera. Comparing this version of if_ath_pci.c with my uncommitted version of if_ath_cardbus.c, only about five lines are different.
This commit is contained in:
dyoung
parent
7ce5c4de22
commit
98aeca954e
@ -1,4 +1,4 @@
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/* $NetBSD: if_ath_pci.c,v 1.37 2010/02/24 22:38:00 dyoung Exp $ */
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/* $NetBSD: if_ath_pci.c,v 1.38 2010/04/28 22:00:39 dyoung Exp $ */
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/*-
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* Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
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@ -37,12 +37,7 @@
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*/
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#include <sys/cdefs.h>
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#ifdef __FreeBSD__
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__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $");
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#endif
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#ifdef __NetBSD__
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__KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.37 2010/02/24 22:38:00 dyoung Exp $");
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#endif
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__KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.38 2010/04/28 22:00:39 dyoung Exp $");
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/*
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* PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
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@ -50,24 +45,10 @@ __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.37 2010/02/24 22:38:00 dyoung Exp $
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <net80211/ieee80211_netbsd.h>
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#include <net80211/ieee80211_var.h>
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#ifdef INET
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#include <netinet/in.h>
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#endif
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#include <external/isc/atheros_hal/dist/ah.h>
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#include <dev/ic/ath_netbsd.h>
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@ -78,43 +59,37 @@ __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.37 2010/02/24 22:38:00 dyoung Exp $
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#include <dev/pci/pcidevs.h>
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/*
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* PCI glue.
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* PCI configuration space registers
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*/
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#define ATH_PCI_MMBA 0x10 /* memory mapped base */
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struct ath_pci_softc {
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struct ath_softc sc_sc;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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pcitag_t sc_tag;
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pci_intr_handle_t sc_pih;
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void *sc_ih; /* interrupt handler */
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void *sc_ih;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_size_t sc_mapsz;
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};
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#define BS_BAR 0x10
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static void ath_pci_attach(device_t, device_t, void *);
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static int ath_pci_detach(device_t, int);
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static int ath_pci_match(device_t, cfdata_t, void *);
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static bool ath_pci_setup(struct ath_pci_softc *);
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static void ath_pci_attach(device_t, device_t, void *);
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static int ath_pci_detach(device_t, int);
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static int ath_pci_match(device_t, cfdata_t, void *);
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CFATTACH_DECL_NEW(ath_pci,
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sizeof(struct ath_pci_softc),
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ath_pci_match,
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ath_pci_attach,
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ath_pci_detach,
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NULL);
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CFATTACH_DECL_NEW(ath_pci, sizeof(struct ath_pci_softc),
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ath_pci_match, ath_pci_attach, ath_pci_detach, NULL);
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static int
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ath_pci_match(device_t parent, cfdata_t match, void *aux)
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{
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const char* devname;
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const char *devname;
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struct pci_attach_args *pa = aux;
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devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
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if (devname != NULL)
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return 1;
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return 0;
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return (devname != NULL) ? 1 : 0;
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}
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static bool
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@ -123,9 +98,10 @@ ath_pci_suspend(device_t self, const pmf_qual_t *qual)
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struct ath_pci_softc *sc = device_private(self);
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ath_suspend(&sc->sc_sc);
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pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
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sc->sc_ih = NULL;
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if (sc->sc_ih != NULL) {
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pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
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sc->sc_ih = NULL;
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}
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return true;
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}
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@ -143,25 +119,127 @@ ath_pci_resume(device_t self, const pmf_qual_t *qual)
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return ath_resume(&sc->sc_sc);
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}
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static void
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ath_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct ath_pci_softc *psc = device_private(self);
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struct ath_softc *sc = &psc->sc_sc;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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const char *intrstr = NULL;
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pcireg_t mem_type;
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sc->sc_dev = self;
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sc->sc_dmat = pa->pa_dmat;
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psc->sc_pc = pc;
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psc->sc_tag = pa->pa_tag;
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aprint_normal("\n");
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if (!ath_pci_setup(psc))
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goto bad;
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/*
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* Setup memory-mapping of PCI registers.
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*/
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mem_type = pci_mapreg_type(pc, pa->pa_tag, ATH_PCI_MMBA);
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if (mem_type != PCI_MAPREG_TYPE_MEM &&
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mem_type != PCI_MAPREG_MEM_TYPE_64BIT) {
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aprint_error("bad pci register type %d\n", (int)mem_type);
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goto bad;
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}
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if (pci_mapreg_map(pa, ATH_PCI_MMBA, mem_type, 0, &psc->sc_iot,
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&psc->sc_ioh, NULL, &psc->sc_mapsz) != 0) {
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aprint_error("cannot map register space\n");
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goto bad;
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}
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sc->sc_st = HALTAG(psc->sc_iot);
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sc->sc_sh = HALHANDLE(psc->sc_ioh);
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/*
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* Arrange interrupt line.
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*/
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if (pci_intr_map(pa, &psc->sc_pih)) {
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aprint_error("couldn't map interrupt\n");
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goto bad1;
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}
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intrstr = pci_intr_string(pc, psc->sc_pih);
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psc->sc_ih = pci_intr_establish(pc, psc->sc_pih, IPL_NET, ath_intr, sc);
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if (psc->sc_ih == NULL) {
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aprint_error("couldn't map interrupt\n");
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goto bad1;
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}
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aprint_verbose_dev(self, "interrupting at %s\n", intrstr);
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ATH_LOCK_INIT(sc);
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if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) != 0)
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goto bad3;
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if (pmf_device_register(self, ath_pci_suspend, ath_pci_resume)) {
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pmf_class_network_register(self, &sc->sc_if);
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pmf_device_suspend(self, &sc->sc_qual);
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} else
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aprint_error_dev(self, "couldn't establish power handler\n");
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return;
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bad3:
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ATH_LOCK_DESTROY(sc);
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pci_intr_disestablish(pc, psc->sc_ih);
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bad1:
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bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz);
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bad:
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return;
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}
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static int
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ath_pci_detach(device_t self, int flags)
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{
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struct ath_pci_softc *psc = device_private(self);
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int rv;
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if ((rv = ath_detach(&psc->sc_sc)) != 0)
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return rv;
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pmf_device_deregister(self);
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if (psc->sc_ih != NULL)
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pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
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ATH_LOCK_DESTROY(&psc->sc_sc);
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bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz);
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return 0;
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}
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static bool
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ath_pci_setup(struct ath_pci_softc *sc)
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{
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int rc;
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pcireg_t bhlc, csr, icr, lattimer;
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if ((rc = pci_set_powerstate(sc->sc_pc, sc->sc_tag, PCI_PWR_D0)) != 0)
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aprint_debug("%s: pci_set_powerstate %d\n", __func__, rc);
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/*
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* Enable memory mapping and bus mastering.
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*/
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csr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
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csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, csr);
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csr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, csr);
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csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
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if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) {
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aprint_error("couldn't enable memory mapping\n");
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return 0;
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aprint_error_dev(sc->sc_sc.sc_dev,
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"couldn't enable memory mapping\n");
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return false;
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}
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if ((csr & PCI_COMMAND_MASTER_ENABLE) == 0) {
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aprint_error("couldn't enable bus mastering\n");
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return 0;
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aprint_error_dev(sc->sc_sc.sc_dev,
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"couldn't enable bus mastering\n");
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return false;
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}
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/*
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@ -185,107 +263,13 @@ ath_pci_setup(struct ath_pci_softc *sc)
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* I never set a Latency Timer less than 0x10, since that
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* is what the old code did.
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*/
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bhlc = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_BHLC_REG);
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icr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_INTERRUPT_REG);
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bhlc = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BHLC_REG);
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icr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_INTERRUPT_REG);
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lattimer = MAX(0x10, MIN(0xf8, 8 * PCI_MIN_GNT(icr)));
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if (PCI_LATTIMER(bhlc) < lattimer) {
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bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
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bhlc |= (lattimer << PCI_LATTIMER_SHIFT);
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pci_conf_write(sc->sc_pc, sc->sc_pcitag, PCI_BHLC_REG, bhlc);
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pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BHLC_REG, bhlc);
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}
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return 1;
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}
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static void
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ath_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct ath_pci_softc *psc = device_private(self);
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struct ath_softc *sc = &psc->sc_sc;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pcireg_t mem_type;
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const char *intrstr = NULL;
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sc->sc_dev = self;
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psc->sc_pc = pc;
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psc->sc_pcitag = pa->pa_tag;
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if (!ath_pci_setup(psc))
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goto bad;
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/*
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* Setup memory-mapping of PCI registers.
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*/
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mem_type = pci_mapreg_type(pc, pa->pa_tag, BS_BAR);
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if (mem_type != PCI_MAPREG_TYPE_MEM &&
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mem_type != PCI_MAPREG_MEM_TYPE_64BIT) {
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aprint_error("bad pci register type %d\n", (int)mem_type);
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goto bad;
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}
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if (pci_mapreg_map(pa, BS_BAR, mem_type, 0, &psc->sc_iot,
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&psc->sc_ioh, NULL, &psc->sc_mapsz)) {
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aprint_error("cannot map register space\n");
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goto bad;
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}
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sc->sc_st = HALTAG(psc->sc_iot);
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sc->sc_sh = HALHANDLE(psc->sc_ioh);
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/*
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* Arrange interrupt line.
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*/
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if (pci_intr_map(pa, &psc->sc_pih)) {
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aprint_error("couldn't map interrupt\n");
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goto bad1;
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}
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intrstr = pci_intr_string(pc, psc->sc_pih);
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psc->sc_ih = pci_intr_establish(pc, psc->sc_pih, IPL_NET, ath_intr, sc);
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if (psc->sc_ih == NULL) {
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aprint_error("couldn't map interrupt\n");
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goto bad2;
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}
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aprint_normal("\n");
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aprint_verbose_dev(self, "interrupting at %s\n", intrstr);
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sc->sc_dmat = pa->pa_dmat;
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ATH_LOCK_INIT(sc);
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if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) != 0)
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goto bad3;
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if (pmf_device_register(self, ath_pci_suspend, ath_pci_resume)) {
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pmf_class_network_register(self, &sc->sc_if);
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pmf_device_suspend(self, &sc->sc_qual);
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} else
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aprint_error_dev(self, "couldn't establish power handler\n");
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return;
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bad3:
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ATH_LOCK_DESTROY(sc);
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pci_intr_disestablish(pc, psc->sc_ih);
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bad2: /* XXX */
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bad1:
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bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz);
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bad: /* XXX */
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return;
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}
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static int
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ath_pci_detach(device_t self, int flags)
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{
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struct ath_pci_softc *psc = device_private(self);
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ath_detach(&psc->sc_sc);
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pmf_device_deregister(self);
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if (psc->sc_ih != NULL)
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pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
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bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz);
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ATH_LOCK_DESTROY(&psc->sc_sc);
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return (0);
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return true;
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}
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Block a user