diff --git a/sys/external/isc/atheros_hal/dist/ar5210/ar5210reg.h b/sys/external/isc/atheros_hal/dist/ar5210/ar5210reg.h
index db008ba0419e..77bada85224c 100644
--- a/sys/external/isc/atheros_hal/dist/ar5210/ar5210reg.h
+++ b/sys/external/isc/atheros_hal/dist/ar5210/ar5210reg.h
@@ -14,7 +14,7 @@
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
- * $Id: ar5210reg.h,v 1.1.1.1 2008/12/11 04:46:30 alc Exp $
+ * $Id: ar5210reg.h,v 1.2 2011/05/30 13:58:23 joerg Exp $
  */
 #ifndef _DEV_ATH_AR5210REG_H
 #define _DEV_ATH_AR5210REG_H
@@ -246,8 +246,8 @@
 #define	AR_SCR_SLE		0x00030000	/* sleep enable */
 #define	AR_SCR_SLE_S		16
 #define	AR_SCR_SLE_WAKE		0x00000000	/* force wake */
-#define	AR_SCR_SLE_SLP		0x00010000	/* force sleep */
-#define	AR_SCR_SLE_ALLOW	0x00020000	/* allow to control sleep */
+#define	AR_SCR_SLE_SLP		0x00010000U	/* force sleep */
+#define	AR_SCR_SLE_ALLOW	0x00020000U	/* allow to control sleep */
 #define	AR_SCR_BITS	"\20\20SLE_SLP\21SLE_ALLOW"
 
 #define	AR_INTPEND_IP		0x00000001	/* interrupt pending */
diff --git a/sys/external/isc/atheros_hal/dist/ar5211/ar5211reg.h b/sys/external/isc/atheros_hal/dist/ar5211/ar5211reg.h
index 6a24376713cb..2b91b545667e 100644
--- a/sys/external/isc/atheros_hal/dist/ar5211/ar5211reg.h
+++ b/sys/external/isc/atheros_hal/dist/ar5211/ar5211reg.h
@@ -14,7 +14,7 @@
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
- * $Id: ar5211reg.h,v 1.1.1.1 2008/12/11 04:46:34 alc Exp $
+ * $Id: ar5211reg.h,v 1.2 2011/05/30 13:58:24 joerg Exp $
  */
 #ifndef _DEV_ATH_AR5211REG_H
 #define _DEV_ATH_AR5211REG_H
@@ -619,8 +619,8 @@
 #define	AR_SCR_SLE	0x00030000	/* sleep enable mask */
 #define	AR_SCR_SLE_S	16		/* sleep enable bits shift */
 #define	AR_SCR_SLE_WAKE	0x00000000	/* force wake */
-#define	AR_SCR_SLE_SLP	0x00010000	/* force sleep */
-#define	AR_SCR_SLE_NORM	0x00020000	/* sleep logic normal operation */
+#define	AR_SCR_SLE_SLP	0x00010000U	/* force sleep */
+#define	AR_SCR_SLE_NORM	0x00020000U	/* sleep logic normal operation */
 #define	AR_SCR_SLE_UNITS	0x00000008	/* SCR units/TU */
 #define	AR_SCR_BITS	"\20\20SLE_SLP\21SLE"