Add very basic support for the Intel i31244 Serial ATA controller.
We only support legacy (i.e. PCI IDE compatible) mode, for now. Also note that DMA is disabled for rev 0 chips unless explicitly enabled with PCIIDE_I31244_ENABLEDMA.
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099d07f374
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@ -1,4 +1,4 @@
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/* $NetBSD: pciide.c,v 1.183 2003/03/15 12:23:34 bouyer Exp $ */
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/* $NetBSD: pciide.c,v 1.184 2003/03/18 01:13:08 thorpej Exp $ */
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/*
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@ -76,7 +76,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pciide.c,v 1.183 2003/03/15 12:23:34 bouyer Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pciide.c,v 1.184 2003/03/18 01:13:08 thorpej Exp $");
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#ifndef WDCDEBUG
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#define WDCDEBUG
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@ -157,6 +157,8 @@ pciide_pci_write(pc, pa, reg, val)
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void default_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
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void sata_setup_channel __P((struct channel_softc*));
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void piix_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
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void piix_setup_channel __P((struct channel_softc*));
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void piix3_4_setup_channel __P((struct channel_softc*));
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@ -227,6 +229,8 @@ int pciide_dma_finish __P((void*, int, int, int));
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void pciide_irqack __P((struct channel_softc *));
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void pciide_print_modes __P((struct pciide_channel *));
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void artisea_chip_map __P((struct pciide_softc*, struct pci_attach_args *));
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struct pciide_product_desc {
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u_int32_t ide_product;
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int ide_flags;
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@ -308,6 +312,11 @@ const struct pciide_product_desc pciide_intel_products[] = {
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"Intel 82801DB IDE Controller (ICH4)",
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piix_chip_map,
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},
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{ PCI_PRODUCT_INTEL_31244,
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0,
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"Intel 31244 Serial ATA Controller",
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artisea_chip_map,
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},
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{ 0,
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0,
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NULL,
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@ -1557,6 +1566,49 @@ next:
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}
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}
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void
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sata_setup_channel(chp)
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struct channel_softc *chp;
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{
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struct ata_drive_datas *drvp;
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int drive;
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u_int32_t idedma_ctl;
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struct pciide_channel *cp = (struct pciide_channel*)chp;
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struct pciide_softc *sc = (struct pciide_softc*)cp->wdc_channel.wdc;
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/* setup DMA if needed */
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pciide_channel_dma_setup(cp);
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idedma_ctl = 0;
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for (drive = 0; drive < 2; drive++) {
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drvp = &chp->ch_drive[drive];
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/* If no drive, skip */
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if ((drvp->drive_flags & DRIVE) == 0)
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continue;
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if (drvp->drive_flags & DRIVE_UDMA) {
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/* use Ultra/DMA */
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drvp->drive_flags &= ~DRIVE_DMA;
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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} else if (drvp->drive_flags & DRIVE_DMA) {
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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}
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}
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/*
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* Nothing to do to setup modes; it is meaningless in S-ATA
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* (but many S-ATA drives still want to get the SET_FEATURE
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* command).
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*/
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
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IDEDMA_CTL + (IDEDMA_SCH_OFFSET * chp->channel),
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idedma_ctl);
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}
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pciide_print_modes(cp);
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}
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void
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piix_chip_map(sc, pa)
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struct pciide_softc *sc;
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@ -5187,3 +5239,59 @@ serverworks_pci_intr(arg)
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}
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return rv;
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}
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void
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artisea_chip_map(sc, pa)
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struct pciide_softc *sc;
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struct pci_attach_args *pa;
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{
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struct pciide_channel *cp;
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bus_size_t cmdsize, ctlsize;
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pcireg_t interface;
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int channel;
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if (pciide_chipen(sc, pa) == 0)
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return;
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printf("%s: bus-master DMA support resent",
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sc->sc_wdcdev.sc_dev.dv_xname);
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#ifndef PCIIDE_I31244_ENABLEDMA
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if (PCI_REVISION(pa->pa_class) == 0) {
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printf(" but disabled due to rev. 0");
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sc->sc_dma_ok = 0;
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} else
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#endif
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pciide_mapreg_dma(sc, pa);
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printf("\n");
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/*
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* XXX Configure LEDs to show activity.
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*/
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sc->sc_wdcdev.PIO_cap = 4;
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if (sc->sc_dma_ok) {
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
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sc->sc_wdcdev.irqack = pciide_irqack;
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sc->sc_wdcdev.DMA_cap = 2;
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sc->sc_wdcdev.UDMA_cap = 6;
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}
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sc->sc_wdcdev.set_modes = sata_setup_channel;
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sc->sc_wdcdev.channels = sc->wdc_chanarray;
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sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
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interface = PCI_INTERFACE(pa->pa_class);
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for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
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cp = &sc->pciide_channels[channel];
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if (pciide_chansetup(sc, channel, interface) == 0)
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continue;
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pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
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pciide_pci_intr);
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if (cp->hw_ok == 0)
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continue;
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pciide_map_compat_intr(pa, cp, channel, interface);
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sata_setup_channel(&cp->wdc_channel);
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}
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}
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