amdgpu: Mark float-dependent variables volatile.

This way they are computed -- using FP instructions -- before
DC_FP_END, after which point FP instructions will trap or behave
unpredictably.

This is a workaround, not a proper solution -- really, the
DC_FP_START/END calls should happen in a separate compilation unit
built without -mhard-float or whatever, but that's a lot more work to
make happen for now.

PR kern/57059

XXX pullup-10
This commit is contained in:
riastradh 2023-07-20 21:48:49 +00:00
parent 2756562594
commit 97560bd7b0
2 changed files with 8 additions and 8 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: amdgpu_dcn_calcs.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $ */
/* $NetBSD: amdgpu_dcn_calcs.c,v 1.4 2023/07/20 21:48:49 riastradh Exp $ */
/*
* Copyright 2017 Advanced Micro Devices, Inc.
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn_calcs.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $");
__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn_calcs.c,v 1.4 2023/07/20 21:48:49 riastradh Exp $");
#include "dm_services.h"
#include "dc.h"
@ -626,7 +626,7 @@ static void calc_wm_sets_and_perf_params(
static bool dcn_bw_apply_registry_override(struct dc *dc)
{
bool updated = false;
volatile bool updated = false;
DC_FP_START();
if ((int)(dc->dcn_soc->sr_exit_time * 1000) != dc->debug.sr_exit_time_ns
@ -733,7 +733,7 @@ bool dcn_validate_bandwidth(
struct dcn_bw_internal_vars *v = &context->dcn_bw_vars;
int i, input_idx, k;
int vesa_sync_start, asic_blank_end, asic_blank_start;
bool bw_limit_pass;
volatile bool bw_limit_pass;
float bw_limit;
PERFORMANCE_TRACE_START();
@ -1502,7 +1502,7 @@ void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc)
{
struct pp_smu_funcs_rv *pp = NULL;
struct pp_smu_wm_range_sets ranges = {0};
int min_fclk_khz, min_dcfclk_khz, socclk_khz;
volatile int min_fclk_khz, min_dcfclk_khz, socclk_khz;
const int overdrive = 5000000; /* 5 GHz to cover Overdrive */
if (dc->res_pool->pp_smu)

View File

@ -1,4 +1,4 @@
/* $NetBSD: amdgpu_dcn20_resource.c,v 1.4 2021/12/19 11:59:31 riastradh Exp $ */
/* $NetBSD: amdgpu_dcn20_resource.c,v 1.5 2023/07/20 21:48:49 riastradh Exp $ */
/*
* Copyright 2016 Advanced Micro Devices, Inc.
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn20_resource.c,v 1.4 2021/12/19 11:59:31 riastradh Exp $");
__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn20_resource.c,v 1.5 2023/07/20 21:48:49 riastradh Exp $");
#include <linux/slab.h>
@ -2932,7 +2932,7 @@ validate_out:
bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
bool fast_validate)
{
bool voltage_supported = false;
volatile bool voltage_supported = false;
bool full_pstate_supported = false;
bool dummy_pstate_supported = false;
double p_state_latency_us;