Add 16650 hardware flowcontrol support. Basically PR 3844 from
Dave Huang <khym@bga.com>, with added check for broken early versions of the 16650, taken from the Linux driver. This should be extended to use, for example, higher trigger levels for the bigger 16650 FIFO, and its capability for using a smaller divisor and thus higher speeds. But this patch is very useful for 16650 users already.
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fvdl
parent
985cca83b6
commit
961e39030d
@ -1,4 +1,4 @@
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/* $NetBSD: com.c,v 1.115 1997/10/19 11:45:33 explorer Exp $ */
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/* $NetBSD: com.c,v 1.116 1997/10/19 14:26:16 fvdl Exp $ */
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/*-
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* Copyright (c) 1993, 1994, 1995, 1996, 1997
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@ -70,6 +70,7 @@
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/*
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* COM driver, uses National Semiconductor NS16450/NS16550AF UART
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* Supports automatic hardware flow control on StarTech ST16C650A UART
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*/
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#include "rnd.h"
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@ -98,6 +99,7 @@
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#include <dev/ic/ns16550reg.h>
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#include <dev/ic/st16650reg.h>
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#ifdef COM_HAYESP
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#include <dev/ic/hayespreg.h>
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#endif
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@ -348,6 +350,7 @@ com_attach_subr(sc)
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int iobase = sc->sc_iobase;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int8_t lcr;
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#ifdef COM_HAYESP
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int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
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int *hayespp;
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@ -403,7 +406,6 @@ com_attach_subr(sc)
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/* No ESP; look for other things. */
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if (*hayespp == 0) {
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#endif
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sc->sc_fifolen = 1;
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/* look for a NS 16550AF UART with FIFOs */
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bus_space_write_1(iot, ioh, com_fifo,
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@ -414,8 +416,39 @@ com_attach_subr(sc)
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if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14)
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== FIFO_TRIGGER_14) {
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SET(sc->sc_hwflags, COM_HW_FIFO);
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printf(": ns16550a, working fifo\n");
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sc->sc_fifolen = 16;
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/*
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* IIR changes into the EFR if LCR is set to LCR_EERS
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* on 16650s. We also know IIR != 0 at this point.
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* Write 0 into the EFR, and read it. If the result
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* is 0, we have a 16650.
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*
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* Older 16650s were broken; the test to detect them
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* is taken from the Linux driver. Apparently
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* setting DLAB enable gives access to the EFR on
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* these chips.
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*/
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lcr = bus_space_read_1(iot, ioh, com_lcr);
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bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
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bus_space_write_1(iot, ioh, com_efr, 0);
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if (bus_space_read_1(iot, ioh, com_efr) == 0) {
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bus_space_write_1(iot, ioh, com_lcr,
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lcr | LCR_DLAB);
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if (bus_space_read_1(iot, ioh, com_efr) == 0) {
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CLR(sc->sc_hwflags, COM_HW_FIFO);
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sc->sc_fifolen = 0;
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printf(": st16650, broken fifo\n");
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} else {
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SET(sc->sc_hwflags, COM_HW_FLOW);
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printf(": st16650a, working fifo\n");
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sc->sc_fifolen = 32;
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}
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} else {
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printf(": ns16550a, working fifo\n");
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sc->sc_fifolen = 16;
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}
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bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
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} else
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printf(": ns16550, broken fifo\n");
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else
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@ -950,6 +983,7 @@ comparam(tp, t)
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sc->sc_msr_cts = MSR_CTS;
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sc->sc_r_hiwat = RXHIWAT;
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sc->sc_r_lowat = RXLOWAT;
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sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
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} else if (ISSET(t->c_cflag, MDMBUF)) {
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/*
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* For DTR/DCD flow control, make sure we don't toggle DTR for
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@ -960,6 +994,7 @@ comparam(tp, t)
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sc->sc_msr_cts = MSR_DCD;
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sc->sc_r_hiwat = RXHIWAT;
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sc->sc_r_lowat = RXLOWAT;
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sc->sc_efr = 0;
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} else {
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/*
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* If no flow control, then always set RTS. This will make
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@ -971,6 +1006,7 @@ comparam(tp, t)
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sc->sc_msr_cts = 0;
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sc->sc_r_hiwat = 0;
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sc->sc_r_lowat = 0;
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sc->sc_efr = 0;
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if (ISSET(sc->sc_mcr, MCR_DTR))
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SET(sc->sc_mcr, MCR_RTS);
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else
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@ -1082,6 +1118,10 @@ com_loadchannelregs(sc)
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bus_space_write_1(iot, ioh, com_ier, 0);
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if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) {
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bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
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bus_space_write_1(iot, ioh, com_efr, sc->sc_efr);
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}
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bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB);
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bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl);
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bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh);
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@ -1689,6 +1729,8 @@ cominit(iot, iobase, rate, frequency, cflag, iohp)
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if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
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return (ENOMEM); /* ??? */
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bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
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bus_space_write_1(iot, ioh, com_efr, 0);
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bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
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rate = comspeed(rate, frequency);
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bus_space_write_1(iot, ioh, com_dlbl, rate);
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@ -1,4 +1,4 @@
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/* $NetBSD: comreg.h,v 1.10 1997/10/15 21:13:36 thorpej Exp $ */
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/* $NetBSD: comreg.h,v 1.11 1997/10/19 14:26:21 fvdl Exp $ */
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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@ -45,6 +45,8 @@
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#define IER_ETXRDY 0x2 /* Enable transmitter empty interrupt */
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#define IER_ERLS 0x4 /* Enable line status interrupt */
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#define IER_EMSC 0x8 /* Enable modem status interrupt */
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#define IER_ERTS 0x40 /* Enable RTS interrupt */
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#define IER_ECTS 0x80 /* Enable CTS interrupt */
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/* interrupt identification register */
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#define IIR_IMASK 0xf
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@ -66,7 +68,22 @@
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#define FIFO_TRIGGER_8 0x80 /* ibid 8 */
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#define FIFO_TRIGGER_14 0xc0 /* ibid 14 */
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/* enhanced feature register */
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#define EFR_AUTOCTS 0x80 /* Automatic CTS flow control */
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#define EFR_AUTORTS 0x40 /* Automatic RTS flow control */
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#define EFR_SPECIAL 0x20 /* Special char detect */
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#define EFR_EFCR 0x10 /* Enhanced function control bit */
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#define EFR_TXFLOWBOTH 0x0c /* Automatic transmit XON/XOFF 1 and 2 */
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#define EFR_TXFLOW1 0x08 /* Automatic transmit XON/XOFF 1 */
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#define EFR_TXFLOW2 0x04 /* Automatic transmit XON/XOFF 2 */
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#define EFR_TXFLOWNONE 0x00 /* No automatic XON/XOFF transmit */
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#define EFR_RXFLOWBOTH 0x03 /* Automatic receive XON/XOFF 1 and 2 */
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#define EFR_RXFLOW1 0x02 /* Automatic receive XON/XOFF 1 */
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#define EFR_RXFLOW2 0x01 /* Automatic receive XON/XOFF 2 */
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#define EFR_RXFLOWNONE 0x00 /* No automatic XON/XOFF receive */
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/* line control register */
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#define LCR_EERS 0xBF /* Enable access to Enhanced Register Set */
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#define LCR_DLAB 0x80 /* Divisor latch access enable */
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#define LCR_SBREAK 0x40 /* Break Control */
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#define LCR_PZERO 0x38 /* Space parity */
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@ -1,4 +1,4 @@
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/* $NetBSD: comvar.h,v 1.17 1997/10/19 11:45:45 explorer Exp $ */
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/* $NetBSD: comvar.h,v 1.18 1997/10/19 14:26:23 fvdl Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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@ -47,6 +47,7 @@ int com_is_console __P((bus_space_tag_t, int, bus_space_handle_t *));
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#define COM_HW_NOIEN 0x01
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#define COM_HW_FIFO 0x02
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#define COM_HW_HAYESP 0x04
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#define COM_HW_FLOW 0x08
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#define COM_HW_CONSOLE 0x40
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#define COM_HW_KGDB 0x80
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@ -77,7 +78,7 @@ struct com_softc {
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int sc_fifolen;
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u_char sc_msr, sc_msr_delta, sc_msr_mask, sc_mcr, sc_mcr_active, sc_lcr,
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sc_ier, sc_fifo, sc_dlbl, sc_dlbh;
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sc_ier, sc_fifo, sc_dlbl, sc_dlbh, sc_efr;
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u_char sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd;
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int sc_r_hiwat;
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