Annotate the RISC-V signal trampoline with CFI attributes.
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skrll
parent
588e74af68
commit
95bbc8c712
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.3 2023/05/19 06:31:01 skrll Exp $
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# $NetBSD: genassym.cf,v 1.4 2024/05/30 15:56:43 skrll Exp $
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#
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# Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -37,9 +37,40 @@ include <sys/ucontext.h>
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include <machine/setjmp.h>
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define UC_GREGS_RA offsetof(ucontext_t, uc_mcontext.__gregs[_REG_RA])
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define UC_GREGS_SP offsetof(ucontext_t, uc_mcontext.__gregs[_REG_SP])
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define UC_GREGS_GP offsetof(ucontext_t, uc_mcontext.__gregs[_REG_GP])
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define UC_GREGS_TP offsetof(ucontext_t, uc_mcontext.__gregs[_REG_TP])
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define UC_GREGS_T0 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T0])
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define UC_GREGS_T1 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T1])
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define UC_GREGS_T2 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T2])
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define UC_GREGS_S0 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S0])
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define UC_GREGS_S1 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S1])
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define UC_GREGS_A0 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A0])
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define UC_GREGS_A1 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A1])
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define UC_GREGS_A2 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A2])
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define UC_GREGS_A3 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A3])
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define UC_GREGS_A4 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A4])
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define UC_GREGS_A5 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A5])
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define UC_GREGS_A6 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A6])
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define UC_GREGS_A7 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_A7])
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define UC_GREGS_S2 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S2])
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define UC_GREGS_S3 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S3])
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define UC_GREGS_S4 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S4])
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define UC_GREGS_S5 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S5])
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define UC_GREGS_S6 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S6])
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define UC_GREGS_S7 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S7])
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define UC_GREGS_S8 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S8])
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define UC_GREGS_S9 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S9])
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define UC_GREGS_S10 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S10])
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define UC_GREGS_S11 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_S11])
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define UC_GREGS_T3 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T3])
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define UC_GREGS_T4 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T4])
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define UC_GREGS_T5 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T5])
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define UC_GREGS_T6 offsetof(ucontext_t, uc_mcontext.__gregs[_REG_T6])
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define UC_GREGS_RV offsetof(ucontext_t, uc_mcontext.__gregs[_REG_RV])
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define UC_GREGS_PC offsetof(ucontext_t, uc_mcontext.__gregs[_REG_PC])
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define UC_GREGS offsetof(ucontext_t, uc_mcontext.__gregs[0])
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define SIG_BLOCK SIG_BLOCK
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define SIG_SETMASK SIG_SETMASK
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@ -1,4 +1,4 @@
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/* $NetBSD: __sigtramp2.S,v 1.4 2024/05/28 06:57:17 skrll Exp $ */
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/* $NetBSD: __sigtramp2.S,v 1.5 2024/05/30 15:56:43 skrll Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -33,7 +33,7 @@
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#include "assym.h"
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#if defined(SYSLIBC_SCCS) && !defined(lint)
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RCSID("$NetBSD: __sigtramp2.S,v 1.4 2024/05/28 06:57:17 skrll Exp $")
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RCSID("$NetBSD: __sigtramp2.S,v 1.5 2024/05/30 15:56:43 skrll Exp $")
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#endif /* SYSLIBC_SCCS and not lint */
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@ -45,9 +45,67 @@
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*
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* sp -> siginfo_t structure
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* sp + SIGINFO_SIZE -> ucontext_t structure
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*
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* The DWARF register numbers for the general purpose registers are the
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* same as the architected register numbers. For RISC-V, there is a DWARF
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* pseudo-register for signal handler return address.
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*/
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#if defined(__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__)
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#define DWARF_SIGRETURN_REG __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__
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#else
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#define DWARF_SIGRETURN_REG 64
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#endif
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.text
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.cfi_startproc
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.cfi_signal_frame
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.cfi_def_cfa sp, SIGINFO_SIZE
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.cfi_offset ra, UC_GREGS_RA
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.cfi_offset sp, UC_GREGS_SP
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.cfi_offset gp, UC_GREGS_GP
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.cfi_offset tp, UC_GREGS_TP
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.cfi_offset t0, UC_GREGS_T0
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.cfi_offset t1, UC_GREGS_T1
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.cfi_offset t2, UC_GREGS_T2
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.cfi_offset s0, UC_GREGS_S0
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.cfi_offset s1, UC_GREGS_S1
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.cfi_offset a0, UC_GREGS_A0
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.cfi_offset a1, UC_GREGS_A1
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.cfi_offset a2, UC_GREGS_A2
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.cfi_offset a3, UC_GREGS_A3
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.cfi_offset a4, UC_GREGS_A4
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.cfi_offset a5, UC_GREGS_A5
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.cfi_offset a6, UC_GREGS_A6
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.cfi_offset a7, UC_GREGS_A7
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.cfi_offset s2, UC_GREGS_S2
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.cfi_offset s3, UC_GREGS_S3
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.cfi_offset s4, UC_GREGS_S4
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.cfi_offset s5, UC_GREGS_S5
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.cfi_offset s6, UC_GREGS_S6
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.cfi_offset s7, UC_GREGS_S7
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.cfi_offset s8, UC_GREGS_S8
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.cfi_offset s9, UC_GREGS_S9
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.cfi_offset s10, UC_GREGS_S10
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.cfi_offset s11, UC_GREGS_S11
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.cfi_offset t3, UC_GREGS_T3
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.cfi_offset t4, UC_GREGS_T4
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.cfi_offset t5, UC_GREGS_T5
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.cfi_offset t6, UC_GREGS_T6
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.cfi_return_column DWARF_SIGRETURN_REG
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.cfi_offset DWARF_SIGRETURN_REG, UC_GREGS_PC
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/*
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* The unwind entry includes one instruction slot prior to the trampoline
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* because the unwinder will look up to (return PC - 1 insn) while unwinding.
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* Normally this would be the jump / branch, but since there isn't one in
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* this case, we place an explicit nop there instead.
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*/
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nop
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ENTRY_NP(__sigtramp_siginfo_2)
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addi a0, sp, SIGINFO_SIZE /* address of ucontext */
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SYSTRAP_NOERROR(setcontext) /* and do setcontext */
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SYSTRAP(exit) /* if sigreturn fails */
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.cfi_endproc
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END(__sigtramp_siginfo_2)
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